Ville Syrjälä
6a8915d0f8
drm/i915: Don't oops during modeset shutdown after lpe audio deinit
...
We deinit the lpe audio device before we call
drm_atomic_helper_shutdown(), which means the platform device
may already be gone when it comes time to shut down the crtc.
As we don't know when the last reference to the platform
device gets dropped by the audio driver we can't assume that
the device and its data are still around when turning off the
crtc. Mark the platform device as gone as soon as we do the
audio deinit.
Cc: stable@vger.kernel.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181105194604.6994-1-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
(cherry picked from commit f45a7977d1joonas.lahtinen@linux.intel.com >
2018-11-06 17:18:01 +02:00
Chris Wilson
0014868b9c
drm/i915: Mark pin flags as u64
...
Since the flags are being used to operate on a u64 variable, they too
need to be marked as such so that the inverses are full width (and not
zero extended on 32b kernels and bdw+).
Reported-by: Sergii Romantsov <sergii.romantsov@globallogic.com >
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: stable@vger.kernel.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181102161232.17742-2-chris@chris-wilson.co.uk
(cherry picked from commit 83b466b1dcjoonas.lahtinen@linux.intel.com >
2018-11-06 17:17:50 +02:00
Manasi Navare
e528c2affc
drm/i915/icl: Fix the macros for DFLEXDPMLE register bits
...
This patch fixes the macros used for defining the DFLEXDPMLE
register bit fields. This accounts for changes in the spec.
Fixes: a2bc69a1a9animesh.manna@intel.com >
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Cc: Jose Roberto de Souza <jose.souza@intel.com >
Cc: <stable@vger.kernel.org > # v4.19+
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181023191248.26418-1-manasi.d.navare@intel.com
(cherry picked from commit b4335ec0a3joonas.lahtinen@linux.intel.com >
2018-11-06 17:17:42 +02:00
Ville Syrjälä
f42f343887
drm/i915: Fix error handling for the NV12 fb dimensions check
...
Let's not leak obj->framebuffer_references when we decide that
the framebuffer domensions are not suitable for NV12.
Cc: stable@vger.kernel.org
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Cc: Vidya Srinivas <vidya.srinivas@intel.com >
Fixes: e44134f267ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181029140031.11765-1-ville.syrjala@linux.intel.com
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
(cherry picked from commit 3b90946fcbjoonas.lahtinen@linux.intel.com >
2018-11-06 17:17:37 +02:00
Dhinakaran Pandiyan
76271ef263
drm/i915: Fix VIDEO_DIP_CTL bit shifts
...
The shifts for VSC_SELECT bits are wrong, fix it. Good thing is the
definitions are unused.
v2: Moves definitions in another patch (Manasi)
Cc: Manasi Navare <manasi.d.navare@intel.com >
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Fixes: 7af2be6d54dhinakaran.pandiyan@intel.com >
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181005185643.31660-1-dhinakaran.pandiyan@intel.com
(cherry picked from commit 0920966261joonas.lahtinen@linux.intel.com >
2018-11-06 17:17:31 +02:00
Rodrigo Vivi
2c2f6e30d5
drm/i915/glk: Remove 99% limitation.
...
While checking the opportunity to add a display_gen
check to allow glk and cnl to be on same bucket I noticed
these FIXME cases here.
So I got the confirmation from HW architect that we actually
never needed this workaround.
"GLK supports 2 pixel per clock, so pixel clock can be up to 2 * cdclk."
So, this reverts commit 97f55ca5b697f55ca5b6ville.syrjala@linux.intel.com >
Cc: Madhav Chauhan <madhav.chauhan@intel.com >
Cc: Jani Nikula <jani.nikula@intel.com >
Cc: Clinton Taylor <clinton.a.taylor@intel.com >
Cc: Arthur J Runyan <arthur.j.runyan@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181026005636.22274-1-rodrigo.vivi@intel.com
(cherry picked from commit 42882336e6joonas.lahtinen@linux.intel.com >
2018-11-06 17:17:26 +02:00
Chris Wilson
0856032874
drm/i915: Compare user's 64b GTT offset even on 32b
...
Beware mixing unsigned long constants and 64b values, as on 32b the
constant will be zero extended and discard the high 32b when used as
a mask!
Reported-by: Sergii Romantsov <sergii.romantsov@globallogic.com >
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108282
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Cc: stable@vger.kernel.org
Reviewed-by: Matthew Auld <matthew.auld@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181025091823.20571-2-chris@chris-wilson.co.uk
(cherry picked from commit 6fc4e48f9ejoonas.lahtinen@linux.intel.com >
2018-11-06 17:17:19 +02:00
Chris Wilson
c58281056a
drm/i915: Mark up GTT sizes as u64
...
Since we use a 64b virtual GTT irrespective of the system, we want to
ensure that the GTT computations remains 64b even on 32b systems,
including treatment of huge virtual pages.
No code generation changes on 64b:
Reported-by: Sergii Romantsov <sergii.romantsov@globallogic.com >
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108282
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Cc: stable@vger.kernel.org
Reviewed-by: Matthew Auld <matthew.auld@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181025091823.20571-1-chris@chris-wilson.co.uk
(cherry picked from commit 9125963a94joonas.lahtinen@linux.intel.com >
2018-11-06 17:17:14 +02:00
Clint Taylor
6503493145
drm/i915/hdmi: Add HDMI 2.0 audio clock recovery N values
...
HDMI 2.0 594Mhz modes were incorrectly selecting 25.200Mhz Automatic N value
mode instead of HDMI specification values.
V2: Fix 88.2 Hz N value
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Cc: stable@vger.kernel.org
Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/1540493521-1746-2-git-send-email-clinton.a.taylor@intel.com
(cherry picked from commit 5a400aa3c5joonas.lahtinen@linux.intel.com >
2018-11-06 17:17:09 +02:00
Ville Syrjälä
18354b422c
drm/i915: Don't apply the 16Gb DIMM wm latency w/a to BXT/GLK
...
The 16Gb DIMM w/a is not applicable to BXT or GLK. Limit it to
the appropriate platforms.
This was especially harsh on GLK since we don't even try to read
the DIMM information on that platforms, hence valid_dimm was
always false and thus we always tried to apply the w/a.
Furthermore the w/a pushed the level 0 latency above the
level 1 latency, which doesn't really make sense.
v2: Do the check when populating is_16gb_dimm (Mahesh)
Cc: Mahesh Kumar <mahesh1.kumar@intel.com >
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Fixes: 86b592876cville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181023182102.31549-1-ville.syrjala@linux.intel.com
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Reviewed-by: Mahesh Kumar <mahesh1.sh.kumar@gmail.com >
(cherry picked from commit 5d6f36b27djoonas.lahtinen@linux.intel.com >
2018-11-06 17:17:02 +02:00
Ville Syrjälä
f45a7977d1
drm/i915: Don't oops during modeset shutdown after lpe audio deinit
...
We deinit the lpe audio device before we call
drm_atomic_helper_shutdown(), which means the platform device
may already be gone when it comes time to shut down the crtc.
As we don't know when the last reference to the platform
device gets dropped by the audio driver we can't assume that
the device and its data are still around when turning off the
crtc. Mark the platform device as gone as soon as we do the
audio deinit.
Cc: stable@vger.kernel.org
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181105194604.6994-1-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk >
2018-11-06 15:17:26 +02:00
Chris Wilson
e6db7f4d7c
drm/i915: Break long iterations for get/put shmemfs pages
...
As we may have to iterate a few thousand elements to acquire and release
the shmemfs backing storage for a GPU object, we need to break up the
long loop with cond_resched() to retain a modicum of low latency for
other processes.
Testcase: igt/benchmarks/gem_syslatency
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Kuo-Hsin Yang <vovoy@chromium.org >
Cc: Matthew Auld <matthew.auld@intel.com >
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181105170640.26905-1-chris@chris-wilson.co.uk
2018-11-06 13:14:05 +00:00
Uma Shankar
bfe60a0272
drm/i915/icl: Enable Plane Input CSC for YUV to RGB Conversion
...
Plane input CSC needs to be enabled to convert frambuffers from
YUV to RGB. This is needed for bottom 3 planes on ICL, rest of
the planes have hardcoded conversion and taken care by the legacy
code.
This patch defines the co-efficient values for YUV to RGB conversion
in BT709 and BT601 formats. It programs the coefficients and enables
the plane input csc unit in hardware.
This has been verified and tested by Maarten and the change is working
as expecpted.
v2: Addressed Maarten's and Ville's review comments and added the
coefficients in a 2D array instead of independent Macros.
v3: Added individual coefficient matrix (9 values) instead of 6
register values as per Maarten's comment. Also addresed a shift
issue with B channel coefficient.
v4: Added support for Limited Range Color Handling
v5: Fixed Matt and Maarten's review comments.
v6: Added human readable matrix values for YUV to RGB Conversion along
with just the bspec register values, as per Matt's suggestion.
v7: Refactored the code, move csc coefficient programming function to
intel_sprite.c and made it static as per Ville's review comment.
v8: Addressed Ville's review comment. Called the coefficient programming
from within the skl_program_plane and used I915_WRITE_FW instead of
I915_WRITE.
v9: Fixed Ville's review comments.
Signed-off-by: Uma Shankar <uma.shankar@intel.com >
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/1541099420-12419-3-git-send-email-uma.shankar@intel.com
2018-11-06 12:28:43 +01:00
Uma Shankar
6a255da783
drm/i915/icl: Define Plane Input CSC Coefficient Registers
...
Defined the plane input csc coefficient registers and macros.
6 registers are used to program a total of 9 coefficients,
added macros to define each of them for all the planes
supporting the feature on pipes. On ICL, bottom 3 planes
have this capability.
v2: Segregated the register macro definition as separate patch
as per Maarten's suggestion.
v3: Removed a redundant 3rd Pipe register definition and
simplified the equally spaced register definition by adding an
offset as per Matt's comment.
v4: No Change
v5: Renamed the register Macro as per Matt's suggestion.
v6: No Change
v7: No Change
v8: No Change
v9: No Change
Signed-off-by: Uma Shankar <uma.shankar@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/1541099420-12419-2-git-send-email-uma.shankar@intel.com
2018-11-06 12:28:26 +01:00
Ville Syrjälä
a748faea3b
drm/i915: Fix ilk+ watermarks when disabling pipes
...
We're no longer programming any watermarks when we're disabling
a pipe. That means ilk_wm_merge() & co. will keep considering
the any pipe that is getting disabled as still enabled. Thus we
either get no LP1+ watermakrs (ilk-ivb), or we get suboptimal
ones (hsw-bdw).
This seems to have been broken by commit b6b178a772stable@vger.kernel.org
Cc: Matt Roper <matthew.d.roper@intel.com >
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Fixes: b6b178a772ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181025130536.29024-1-ville.syrjala@linux.intel.com
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com > #irc
2018-11-05 21:47:16 +02:00
Imre Deak
34b2f8da9d
drm/i915/gen9_lp: Fix DMC DC counter debugfs output
...
On GEN9 LP (BXT/GLK) DC6 is not supported, so don't print the counter
on those platforms. So far we did this on GLK too.
While at it warn if we forgot to adjust the printout properly for a
new platform. (Rodrigo)
Testcase: igt/pm_dc/dc6-dpms
Cc: Jyoti Yadav <jyoti.r.yadav@intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181031200220.11608-1-imre.deak@intel.com
2018-11-05 16:40:46 +02:00
Imre Deak
93b662d329
drm/i915/icl: Configure MG DP mode for HDMI ports too
...
The MG DP mode needs to be configured for Type C static/fixed/legacy
HDMI ports too, the same way as it's configured for Type C
static/fixed/legacy, fix this.
Bspec: 4232, 21735
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com >
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Tested-by: José Roberto de Souza <jose.souza@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181102192656.4472-3-imre.deak@intel.com
2018-11-05 15:54:50 +02:00
Imre Deak
cb9ff51943
drm/i915/icl: Configure MG PHY gating for HDMI ports too
...
The MG PHY clock gating needs to be configured for Type C
static/fixed/legacy HDMI ports the same way it's configured for Type C
static/fixed/legacy and aternate mode DP ports, fix this.
Bspec: 4232, 21735
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com >
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Cc: Manasi Navare <manasi.d.navare@intel.com >
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Tested-by: José Roberto de Souza <jose.souza@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181102192656.4472-2-imre.deak@intel.com
2018-11-05 15:54:40 +02:00
Anusha Srivatsa
08cadae8e1
i915/dp/fec: Cache the FEC_CAPABLE DPCD register
...
Similar to DSC DPCD registers, let us cache
FEC_CAPABLE register to avoid using stale
values. With this we can avoid aux reads
everytime and instead read the cached values.
v2: Avoid using memset and array for a single
field. (Manasi,Jani)
v3: Print FEC CAPABILITY value. (Manasi)
Suggested-by: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Ville Syrjala <ville.syrjala@linux.intel.com >
Cc: Manasi Navare <manasi.d.navare@intel.com >
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com >
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181102041455.15818-1-anusha.srivatsa@intel.com
2018-11-02 18:21:21 -07:00
Chris Wilson
83b466b1dc
drm/i915: Mark pin flags as u64
...
Since the flags are being used to operate on a u64 variable, they too
need to be marked as such so that the inverses are full width (and not
zero extended on 32b kernels and bdw+).
Reported-by: Sergii Romantsov <sergii.romantsov@globallogic.com >
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk >
Cc: stable@vger.kernel.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181102161232.17742-2-chris@chris-wilson.co.uk
2018-11-02 20:28:26 +00:00
Linus Torvalds
bc6080ae38
Merge tag 'drm-next-2018-11-02' of git://anongit.freedesktop.org/drm/drm
...
Pull drm fixes from Dave Airlie:
"Pretty much a normal fixes pull pre-rc1, mostly amdgpu fixes, one i915
link training regression fix, and a couple of minor panel/bridge fixes
and a panel quirk"
* tag 'drm-next-2018-11-02' of git://anongit.freedesktop.org/drm/drm: (37 commits)
drm/amdgpu: revert "enable gfxoff in non-sriov and stutter mode by default"
drm/amd/pp: Print warning if od_sclk/mclk out of range
drm/amd/pp: Fix pp_sclk/mclk_od not work on Vega10
drm/amd/pp: Fix pp_sclk/mclk_od not work on smu7
drm/amd/powerplay: no MGPU fan boost enablement on DPM disabled
drm/amdgpu: Fix skipping hangged job reset during gpu recover.
drm/amd/powerplay: revise Vega20 pptable version check
drm/amd/display: set backlight level limit to 1
drm/panel: simple: Innolux TV123WAM is actually P120ZDG-BF1
dt-bindings: drm/panel: simple: Innolux TV123WAM is actually P120ZDG-BF1
drm/bridge: ti-sn65dsi86: Remove the mystery delay
drm/panel: simple: Add "no-hpd" delay for Innolux TV123WAM
drm/panel: simple: Support panels with HPD where HPD isn't connected
dt-bindings: drm/panel: simple: Add no-hpd property
drm/edid: Add 6 bpc quirk for BOE panel.
drm/amdgpu: fix reporting of failed msg sent to SMU (v2)
drm/amdgpu: Fix compute ring 1.0.0 failure after reset
drm/amdgpu: fix VM leaf walking
drm/amdgpu: fix amdgpu_vm_fini
drm/amd/powerplay: commonize the API for retrieving current clocks
...
2018-11-02 10:58:20 -07:00
Anusha Srivatsa
a6576a8d71
drm/i915/fia: FIA registers offset implementation.
...
The registers DPCSSS,DPSP,DPMLE1 and DPPMS are all at an offset
from the base - which is the FLexi IO Adaptor. Lets follow the
offset calculation while accessing these registers.
v2:
- Follow spec for numbering - s/0/1(Lucas)
- s/FIA_1/FIA1_BASE (Anusha)
v3:
- Remove register offset defines. (Jani)
- Update comment. (Anusha)
v4: rebase. Remove comment.(Lucas)
Cc: Jani Nikula <jani.nikula@intel.com >
Cc: Lucas De Marchi <lucas.demarchi@intel.com >
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181101185557.29585-1-anusha.srivatsa@intel.com
2018-11-02 10:43:59 -07:00
Radhakrishna Sripada
f1a1217222
drm/i915: Allow "max bpc" property to limit pipe_bpp
...
Use the newly added "max bpc" connector property to limit pipe bpp.
V3: Use drm_connector_state to access the "max bpc" property
V4: Initialize the drm property, add suuport to DP(Ville)
V5: Use the property in the connector and fix CI failure(Ville)
V6: Use the core function to attach max_bpc property, remove the redundant
clamping of pipe bpp based on connector info
V7: Fix Checkpatch warnings
V9: Cleanup connected_sink_max_bpp and fix initial value in DP(Ville)
V12: Fix debug message(Ville)
V13: Remove the redundant check and simplify the check logic(Stan)
V14: Fix the check in connected_sink_max_bpp(Stan)
v15 (From Manasi): Add missing break (Stan)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Cc: Daniel Vetter <daniel.vetter@ffwll.ch >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Cc: Kishore Kadiyala <kishore.kadiyala@intel.com >
Cc: Manasi Navare <manasi.d.navare@intel.com >
Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181023014400.16055-1-manasi.d.navare@intel.com
2018-11-02 09:16:03 -07:00
Jani Nikula
5468a54340
drm/i915: Update DRIVER_DATE to 20181102
...
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2018-11-02 12:04:11 +02:00
Jani Nikula
a7c0149f16
drm/i915: also group device info array helper macros with others
...
Keep the register choosing macros together. No functional changes.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181031110453.12722-4-jani.nikula@intel.com
2018-11-02 09:17:13 +02:00
Jani Nikula
8d97b4a936
drm/i915: reorder and reindent the register choosing helper wrappers
...
Try to make it slightly less of an eye sore. No functional changes.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181031110453.12722-3-jani.nikula@intel.com
2018-11-02 09:17:03 +02:00
Jani Nikula
2fcc2fd0d6
drm/i915: define _MMIO_PLANE() in terms of _PLANE() not _MMIO_PIPE()
...
Minor semantic nit, no functional changes.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181031110453.12722-2-jani.nikula@intel.com
2018-11-02 09:16:52 +02:00
Jani Nikula
74c1e82642
drm/i915: remove palette_offsets from device info in favor of _PICK()
...
The device info offset arrays for unevenly spaced register offsets is
great for widely used registers. However, the palette registers are only
used in one function, i9xx_load_luts_internal(), and only for GMCH
platforms, wasting device info. Replace palette_offsets with _PICK() in
palette register definition.
While the use of _PICK() does not check for pipe C existence, neither
does the current offset array usage, and leads to bogus address when
pipe C is passed to PALETTE() on non-CHV. Using _PICK() at least leads
to a sensible register offset, just non-existing on non-CHV. Either way,
this shouldn't happen anyway.
Remove unused old palette macros while at it.
Bloat-o-meter results below for completeness.
add/remove: 0/0 grow/shrink: 3/6 up/down: 94/-278 (-184)
Function old new delta
i9xx_load_luts_internal 394 483 +89
i915_driver_load 5103 5107 +4
g4x_pre_enable_dp 378 379 +1
intel_engines_init_mmio 1117 1116 -1
intel_engine_lookup_user 47 46 -1
hdmi_port_clock_valid 310 309 -1
gen11_irq_handler 707 706 -1
intel_device_info_dump_runtime 329 311 -18
intel_device_info_runtime_init 5166 4910 -256
Total: Before=918650, After=918466, chg -0.02%
add/remove: 0/0 grow/shrink: 0/48 up/down: 0/-576 (-576)
Data old new delta
intel_valleyview_info 200 188 -12
intel_skylake_gt4_info 200 188 -12
intel_skylake_gt3_info 200 188 -12
intel_skylake_gt2_info 200 188 -12
intel_skylake_gt1_info 200 188 -12
intel_sandybridge_m_gt2_info 200 188 -12
intel_sandybridge_m_gt1_info 200 188 -12
intel_sandybridge_d_gt2_info 200 188 -12
intel_sandybridge_d_gt1_info 200 188 -12
intel_pineview_info 200 188 -12
intel_kabylake_gt3_info 200 188 -12
intel_kabylake_gt2_info 200 188 -12
intel_kabylake_gt1_info 200 188 -12
intel_ivybridge_q_info 200 188 -12
intel_ivybridge_m_gt2_info 200 188 -12
intel_ivybridge_m_gt1_info 200 188 -12
intel_ivybridge_d_gt2_info 200 188 -12
intel_ivybridge_d_gt1_info 200 188 -12
intel_ironlake_m_info 200 188 -12
intel_ironlake_d_info 200 188 -12
intel_icelake_11_info 200 188 -12
intel_i965gm_info 200 188 -12
intel_i965g_info 200 188 -12
intel_i945gm_info 200 188 -12
intel_i945g_info 200 188 -12
intel_i915gm_info 200 188 -12
intel_i915g_info 200 188 -12
intel_i865g_info 200 188 -12
intel_i85x_info 200 188 -12
intel_i845g_info 200 188 -12
intel_i830_info 200 188 -12
intel_haswell_gt3_info 200 188 -12
intel_haswell_gt2_info 200 188 -12
intel_haswell_gt1_info 200 188 -12
intel_gm45_info 200 188 -12
intel_geminilake_info 200 188 -12
intel_g45_info 200 188 -12
intel_g33_info 200 188 -12
intel_coffeelake_gt3_info 200 188 -12
intel_coffeelake_gt2_info 200 188 -12
intel_coffeelake_gt1_info 200 188 -12
intel_cherryview_info 200 188 -12
intel_cannonlake_info 200 188 -12
intel_broxton_info 200 188 -12
intel_broadwell_rsvd_info 200 188 -12
intel_broadwell_gt3_info 200 188 -12
intel_broadwell_gt2_info 200 188 -12
intel_broadwell_gt1_info 200 188 -12
Total: Before=195529, After=194953, chg -0.29%
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181031110453.12722-1-jani.nikula@intel.com
2018-11-02 09:16:33 +02:00
Jani Nikula
7a085c3aad
Merge drm/drm-next into drm-intel-next-queued
...
Although there's nothing crucial missing, it's been a long time since
the last backmerge. Catch up with drm-next.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2018-11-02 09:01:28 +02:00
Anusha Srivatsa
18cde299df
drm/i915/icl: Fix DSS_CTL register names
...
This patch fixes the naming of the registers:
s/PIPE_DSS_CTL/ICL_PIPE_DSS_CTL
And also fix the hex values to lower case, to match
rest of the definitions.
Manasi noticed this with the patch that was merged.
v2: fix "Fixes" tag.
Fixes: 8b1b558d69manasi.d.navare@intel.com >
Cc: Jani Nikula <jani.nikula@intel.com >
Cc: Manasi Navare <manasi.d.navare@intel.com >
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com >
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181101214216.8958-1-anusha.srivatsa@intel.com
2018-11-01 22:00:04 -07:00
Imre Deak
70332ac539
drm/i915/icl+: Sanitize port to PLL mapping
...
BIOS can leave the PLL to port mapping enabled, even if the
corresponding encoder is disabled. Disable the port mapping in this
case.
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Cc: José Roberto de Souza <jose.souza@intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181101140427.31026-9-imre.deak@intel.com
2018-11-02 01:24:04 +02:00
Imre Deak
c7375d9542
drm/i915: Configure AUX_CH_CTL when enabling the AUX power domain
...
Most of the AUX_CH_CTL flags are concerned with DP AUX transfer
parameters. As opposed to this the flag specifying the thunderbolt vs.
non-thunderbolt mode of the port is not related to AUX transfers at all
(rather it's repurposed to enable either TBT or non-TBT PHY HW blocks).
The programming has to be done before enabling the corresponding AUX
power well, so make it part of the power well code.
v3:
- Use existing enable/disable helpers instead of opencoding. (Jose)
- Fix type of is_tc_tbt to remain a bitfield. (Lucas)
- Add comment describing the is_tc_tbt power well flag. (Lucas)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108548
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Cc: José Roberto de Souza <jose.souza@intel.com >
Cc: Lucas De Marchi <lucas.demarchi@intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181101140427.31026-8-imre.deak@intel.com
2018-11-02 01:24:03 +02:00
Imre Deak
8e4a3ad9b8
drm/i915: Enable AUX power for HDMI DDI/TypeC main link too
...
DDI/TypeC ports need the AUX power domain for main link functionality
even when they operate in HDMI static mode, so enable the power domain
for these ports too.
v4:
- Rebase on the upstream ICL pre_pll_enable change.
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Cc: José Roberto de Souza <jose.souza@intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Cc: Manasi Navare <manasi.d.navare@intel.com >
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181101140427.31026-7-imre.deak@intel.com
2018-11-02 01:24:02 +02:00
Imre Deak
bdaa29b6be
drm/i915: Enable AUX power earlier
...
For DDI/TypeC ports the AUX power domain needs to be enabled before the
port's PLL is enabled, so move the enabling earlier accordingly.
v2:
- Preserve the pre_pll hook for GEN9_LP. (Ville)
v3:
- Add related BSpec entries to commit log. (Jose)
v4:
- Rebase on the upstream ICL pre_pll_enable change.
BSpec: 21750, 22243
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Cc: José Roberto de Souza <jose.souza@intel.com >
Cc: Manasi Navare <manasi.d.navare@intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181101140427.31026-6-imre.deak@intel.com
2018-11-02 01:24:02 +02:00
Imre Deak
337837ac3a
drm/i915: Use a helper to get the aux power domain
...
From ICL onwards the AUX power domain may change dynamically based on
whether a DDI/TypeC port is in thunderbolt or non-thunderbolt mode, so
use a helper function instead of a static field to get the current
domain.
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Cc: José Roberto de Souza <jose.souza@intel.com >
Cc: Lucas De Marchi <lucas.demarchi@intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181101140427.31026-5-imre.deak@intel.com
2018-11-02 01:24:00 +02:00
Imre Deak
ac897d6bd7
drm/i915: Init aux_ch for HDMI ports too
...
From ICL onwards DDI/TypeC ports - even in HDMI static mode - need to know
which AUX CH belongs to them, so initialize aux_ch for those ports too.
For consistency do this for all HDMI ports, not only for DDI/TypeC ones.
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Cc: José Roberto de Souza <jose.souza@intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181101140427.31026-4-imre.deak@intel.com
2018-11-02 01:24:00 +02:00
Imre Deak
563d22a039
drm/i915: Move aux_ch to intel_digital_port
...
From ICL onwards all DDI/TypeC ports - even working in HDMI mode - need
to know their corresponding AUX CH, so move the field to a common
struct.
No functional change.
v3:
- Add code comment about which ports aux_ch is used for. (Jose)
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Cc: José Roberto de Souza <jose.souza@intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181101140427.31026-3-imre.deak@intel.com
2018-11-02 01:23:59 +02:00
Imre Deak
15d248ae37
drm/i915: Move intel_aux_ch() to intel_bios.c
...
From ICL onwards all the DDI/TypeC ports - even working in HDMI mode -
need to know their corresponding AUX channel, so move the corresponding
helper to a common place.
No functional change.
v4:
- Fix 'no space is necessary after a cast' checkpatch warn.
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Cc: José Roberto de Souza <jose.souza@intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Imre Deak <imre.deak@intel.com >
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181101140427.31026-2-imre.deak@intel.com
2018-11-02 01:23:58 +02:00
Oscar Mateo
f57f9371e2
drm/i915/icl: WaAllowUMDToModifySamplerMode
...
Required for Bindless samplers.
Userspace consumer: mesa
V2: Rebase
V3: Update commit message
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com >
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181030084504.21537-4-radhakrishna.sripada@intel.com
2018-11-01 12:28:54 -07:00
Oscar Mateo
6a00b8feb8
drm/i915/icl: WaAllowUMDToModifyHalfSliceChicken7
...
Required to dinamically set 'Trilinear Filter Quality Mode'
Userpsace consumer is mesa.
V2: Rebase
V3: Update commit message
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com >
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Oscar Mateo <oscar.mateo@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181030084504.21537-3-radhakrishna.sripada@intel.com
2018-11-01 12:28:53 -07:00
Radhakrishna Sripada
22dae8a0cc
drm/i915/icl: Implement Display WA_1405510057
...
Display WA_1405510057 asks to not enable YUV 420 HDMI
10bpc when horizontal blank size mod 8 reminder is 2.
V2: Rebase(r-b: Anusha)
V3: crtc_state->s/ycbcr420/output_format/
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com >
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181030084504.21537-2-radhakrishna.sripada@intel.com
2018-11-01 12:28:53 -07:00
Radhakrishna Sripada
622b3f6813
drm/i915/icl: Add WaEnable32PlaneMode
...
Gen11 Display suports 32 planes in total. Enable the new format in context
status to be used and expanded to 32 planes.
V2: Move the WA to display WA's(Chris)
Cc: Chris Wilson <chris@chris-wilson.co.uk >
Cc: Michel Thierry <michel.thierry@intel.com >
Cc: James Ausmus <james.ausmus@intel.com >
Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181030084504.21537-1-radhakrishna.sripada@intel.com
2018-11-01 12:28:52 -07:00
Rodrigo Vivi
1347d3ce5b
drm/i915: Remove CNL from WA 827
...
CNL A stepping was the only affected there.
But also it is time to clean old pre-production
CNL Workarounds, so let's just remove and clean
this W/A.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181031162845.12419-4-rodrigo.vivi@intel.com
2018-11-01 11:25:37 -07:00
Rodrigo Vivi
d521361755
drm/i915: Define WA 0870 and kill dead code.
...
Let's introduce the WA number that is the
cause of having NV12 disabled on both SLK and BXT.
According to Spec:
WA 0870: "Display flickers with NV12 video playback in
Y tiling mode.
WA: Use YUV422 surface format instead of NV12."
v2: remove the useless dead code and consequently
avoiding device info flag. (Ville)
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181031162845.12419-3-rodrigo.vivi@intel.com
2018-11-01 11:25:35 -07:00
Rodrigo Vivi
28b2f4e196
drm/i915: Kill WA 0826
...
According to BSpec this is not needed anymore:
"This workaround is no longer needed since NV12
support is dropped for the affected projects.
"
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181031162845.12419-2-rodrigo.vivi@intel.com
2018-11-01 11:25:33 -07:00
Rodrigo Vivi
efb818f105
drm/i915: Kill WA 0528
...
First of all I believe this WA as written here was wrong.
Because it is listed on BSpec only for SKL and BXT, exactly
the only 2 platforms skipped here.
But also it is written there that we don't need this WA
anymore:
"This workaround is no longer needed since NV12 support is
dropped for the affected projects in #0870."
SO, let's kill it.
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Cc: Vidya Srinivas <vidya.srinivas@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20181031162845.12419-1-rodrigo.vivi@intel.com
2018-11-01 11:25:30 -07:00
Anusha Srivatsa
3b6ac43b48
drm/i915/icl: Fix DC9 Suspend for ICL.
...
Add missing block that takes care of inline intel_suspend_complete
for DC9 on ICL.
Daniele noticed this was part of original patch but missed on
on merged commit ("drm/i915/icl: Enable DC9 as lowest possible
state during screen-off").
Fixes: 3e68928b7dimre.deak@intel.com >
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Cc: Animesh Manna <animesh.manna@intel.com >
Cc: James Ausmus <james.ausmus@intel.com >
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com >
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
[Rodrigo added a commit message while merging]
Link: https://patchwork.freedesktop.org/patch/msgid/20181031202726.4021-1-anusha.srivatsa@intel.com
2018-11-01 11:21:26 -07:00
Anusha Srivatsa
8b1b558d69
drm/i915/icl: Add DSS_CTL Registers
...
Add defines for DSS_CTL registers.
These registers specify the big joiner, splitter,
overlap pixels and info regarding
compression enabled on left or right branch.
v2:
- rebase. Remove overlapping defines(James Ausmus)
- Rename the register to ICL_DSS_CTL1/2_PIPE_ (manasi)
- take pixels as an argument for overlap.(Manasi)
v3:
- rebase. merge DSS_CTL1/2 introduced in Madhav's patch
to avoid confusion (madhav chauhan)
- Rename registers in accordance to BSpec (Madhav, Rodrigo)
- Add define to conditionally check the buffer target depth (James Ausmus)
v4:
- remove redundant definitions.(madhav)
v5:
- Add mask for overlap pixels.
- Code Style changes.(Madhav)
v6:
- Code style changes. (Madhav)
Suggested-by: Madhav Chauhan <madhav.chauhan@intel.com >
Cc: Madhav Chauhan <madhav.chauhan@intel.com >
cc: Rodrigo Vivi <rodrigo.vivi@intel.com >
Cc: James Ausmus <james.ausmus@intel.com >
Cc: Gaurav Singh <gaurav.k.singh@intel.com >
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Cc: Manasi Navare <manasi.d.navare@intel.com >
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com >
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/07021336cb87d09e8f97fbff709c4e686d7de536.1540900289.git.jani.nikula@intel.com
2018-11-01 17:27:18 +02:00
Madhav Chauhan
f968c85bce
drm/i915/icl: Don't wait for empty FIFO
...
For Gen11 DSI, we don't need to wait for getting
DSI FIFO empty after sending DCS commands.
Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com >
Reviewed-by: Jani Nikula <jani.nikula@intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/5e078a0274c1fba2521cb14d7d02fd1038ec1b0e.1540900289.git.jani.nikula@intel.com
2018-11-01 12:24:56 +02:00
Madhav Chauhan
bf4d57ff41
drm/i915/icl: Find DSI presence for ICL
...
This patch detects DSI presence for ICL platform
by reading VBT. DSI detection is done while initializing
DSI using newly added function intel_gen11_dsi_init.
v2 by Jani:
- Preserve old behavour of intel_bios_is_dsi_present()
- s/intel_gen11_dsi_init/icl_dsi_init/g
Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/2324cdfc8918bda3165354e5e0d15053b1074f14.1540900289.git.jani.nikula@intel.com
2018-11-01 12:23:40 +02:00
