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6 Commits

Author SHA1 Message Date
Ben Skeggs
641d0b3056 drm/nouveau/fifo/tu104: initial support 
Various different bits and pieces vs GV100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-12-11 15:37:55 +10:00
Ben Skeggs
9d24907ccf drm/nouveau/fifo/gv100: return work submission token in channel ctor args 
The token will also contain runlist ID on Turing, so instead expose it as
an opaque value from NVKM so the client doesn't need to care.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-12-11 15:37:49 +10:00
Ben Skeggs
a98a3c52f8 drm/nouveau/fifo/gv100: allocate method buffer 
The GPU saves off some stuff to the address specified in this part of RAMFC
when the channel faults, so we should probably point it at a valid address.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-12-11 15:37:49 +10:00
Ben Skeggs
85532bd984 drm/nouveau/fifo/gk104-: support enabling privileged ce functions 
Will be used by SVM code to allow direct (without going through MMU) memcpy
using the GPU copy engines.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-12-11 15:37:47 +10:00
Ben Skeggs
86b442d74c drm/nouveau/fifo/gk104-: return channel instance in ctor args 
Will be used to match fault buffer entries with a channel.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-12-11 15:37:47 +10:00
Ben Skeggs
37e1c45a58 drm/nouveau/fifo/gv100: initial support 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
 2018-05-18 15:01:46 +10:00