Commit Graph

693 Commits

Author SHA1 Message Date
Dara Stotland
93ff968622 arm64: tegra: Add thermal nodes to AGX Orin SKU8
One of the key differences between p3701-0000 and p3701-0008 is the
temperature range. Add this info for p3701-0008.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
1f190117a1 arm64: tegra: Move BPMP nodes to AGX Orin module
All SKUs of the p3701 module contain a temp sensor connected to the
BPMP I2C. Move the associated nodes from tegra234-p3701-0008.dtsi
to tegra234-p3701.dtsi. Add missing compatible.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
7662fe9639 arm64: tegra: Move padctl supply nodes to AGX Orin module
Some padctl supply nodes currently reside in board file, when they
should reside on module level. The nodes are part of module,
not board. Move these nodes to the correct AGX Orin
module file.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
d075995c11 arm64: tegra: Move AGX Orin nodes to correct location
Some of the nodes inside the AGX Orin module file are in the
wrong location. In particular, the SD card interface and
two of the PCIe regulators in the module file should instead
reside in the board file. These components are not part of the
module. They are part of the carrier board. Move these
nodes to the correct location.

Fixes: cd42b26a52 ("arm64: tegra: Add regulators required for PCIe")
Fixes: d71b893a11 ("arm64: tegra: Add Tegra234 SDMMC1 device tree node")
Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
a034db9e4d arm64: tegra: Combine IGX Orin board files
Current IGX Orin structure has both a top-level module+board
file as well as a board file. Most of the data in the board-file
is closely related to the module itself. The benefit of this
extra file is outweighed by the additional complexity. Merge
the board file into the module+board file for simplicity.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:35 +02:00
Dara Stotland
7a3f6cb1de arm64: tegra: Combine AGX Orin board files
The current AGX Orin structure has both a top-level module+board
file as well as a board file. Most of the data in the board-file
is closely related to the module itself. The benefit of this
extra file is outweighed by the additional complexity. Merge
the board file into the module+board file for simplicity.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:34 +02:00
Dara Stotland
ab9cd79d41 arm64: tegra: Add common nodes to AGX Orin module
The AGX Orin module boards contain common nodes that can
be moved to the included module dtsi. This eliminates
redundancy within the files and reduces lines of code.
Data from tegra234-p3701-0000 and tegra234-p3701-0008 that
is common is now in tegra234-p3701.dtsi.

Signed-off-by: Dara Stotland <dstotland@nvidia.com>
Reviewed-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:40:13 +02:00
Tomasz Maciej Nowak
a50d5dcd28 arm64: tegra: Wire up WiFi on Jetson TX1 module
P2180 modules have WiFi in form of BCM4354 chip, and kernel driver
supports this one, so enable it for all users. The necessary calibration
file can be obtained from Jetson Linux Archive. nvram.txt file is
located in "Driver Package (BSP)" in
nv_tegra/l4t_deb_packages/nvidia-l4t-firmware_<version>_arm64.deb
archive. The rest of necessary blobs can be obtained from official
Linux Firmware repository or (newer ones) from Infineon
ifx-linux-firmware repository (look in older releases).

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:35:11 +02:00
Tomasz Maciej Nowak
6eba6471bb arm64: tegra: Wire up Bluetooth on Jetson TX1 module
P2180 modules have Bluetooth in form of BCM4354 chip, and kernel driver
supports this one, so enable it for all users. The necessary firmware
can be obtained from Jetson Linux Archive. bcm4354.hcd file is located
in "Driver Package (BSP)" in
nv_tegra/l4t_deb_packages/nvidia-l4t-firmware_<version>_arm64.deb
archive.

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:34:57 +02:00
Tomasz Maciej Nowak
3ed4e09860 arm64: tegra: Wire up power sensors on Jetson TX1 DevKit
One INA3221 sensor is located on P2180 module and the other two are on
P2597 base board.

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:34:48 +02:00
Vedant Deshpande
6e1a196425 arm64: tegra: Add p3767 PCIe C4 EP details
Add implementation details for Orin NX/Nano PCIe EP on C4.

Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:32:16 +02:00
Vedant Deshpande
0580286d0d arm64: tegra: Add Tegra234 PCIe C4 EP definition
Add PCIe C4 EP controller definition in device tree for Tegra234
devices.

Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:32:01 +02:00
Diogo Ivo
ebe899563a arm64: tegra: Add wp-gpio for P2597's external card slot
Add the definition for the wp-gpio of the P2597's external card slot,
enabling this functionality.

Tested on a P2597 board.

Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:29:13 +02:00
Diogo Ivo
46a26db827 arm64: tegra: Fix gpio for P2597 vmmc regulator
The current declaration is off-by-one and actually corresponds to the
wp-gpio of the external slot.

Tested on a P2597 board.

Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Tested-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:29:13 +02:00
Jon Hunter
b93679b8f1 arm64: tegra: Correct location of power-sensors for IGX Orin
The power-sensors are located on the carrier board and not the
module board and so update the IGX Orin device-tree files to fix this.

Fixes: 9152ed0930 ("arm64: tegra: Add power-sensors for Tegra234 boards")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-27 16:28:05 +02:00
Vedant Deshpande
92331cc63c arm64: tegra: enable same UARTs for Orin NX/Nano
This patch ensures that Orin NX and Orin Nano enable an identical
set of serial ports. UARTA/UARTE will be enabled by adding
respective nodes to the board dtsi file.

Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-27 16:27:07 +02:00
Vedant Deshpande
7ac0be7a4c arm64: tegra: Add DMA properties for Tegra234 UARTA
Adding the missing dmas and dma-names properties which are required
for UARTA when using with the Tegra HSUART driver.

Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-27 16:27:07 +02:00
Vedant Deshpande
5e4bbe5220 arm64: tegra: Restructure Orin NX/Nano device tree
The Orin NX and Orin Nano boards share a common carrier board and the
module boards for both platforms are very similar. Therefore,
restructure the Orin NX/Nano device-tree source files to adhere to a
simple hierarchical format. This will help make clear where changes
should go, and eliminates redundancy within the files.

Previously the carrier board file was independent. However, given
that it is so tightly coupled with the module design, it will be
more practical to combine files together for a simpler layout.

Following changes are made to restructure the device tree source files:
1) Change include hierarchy. Top-level dts includes board dtsi.
   Board dtsi includes module dtsi. Module dtsi includes SoC dtsi.
2) Data from the top level dts file that is common to both Orin NX
   and Orin Nano is in tegra234-p3768-0000+p3767.dtsi.
3) Only data that is unique to NX/Nano is present in the top-level dts.

Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-06-28 17:37:19 +02:00
Rob Herring
5c04a5b065 arm64: dts: Add/fix /memory node unit-addresses
'/memory' nodes always have a 'reg' property, and therefore should have
a unit-address with just plain hex (i.e. no commas). Fix all the arm64
'/memory' nodes.

It's possible that some bootloader depends on /memory (arm32 ATAG to DT
code does for example). If so, the memory node should be commented with
that requirement.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Chanho Min <chanho.min@lge.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240430191856.874600-2-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-05-02 14:56:02 +02:00
Arnd Bergmann
d4c74f6b02 Merge tag 'tegra-for-6.10-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt
arm64: tegra: Changes for v6.10-rc1

Adds the Security Engine devices found on Tegra234 and fixes RTC aliases
by referencing them by label rather than path so that errors can be
detected more easily.

* tag 'tegra-for-6.10-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: tegra: Add Tegra Security Engine DT nodes
  arm64: tegra: Correct Tegra132 I2C alias

Link: https://lore.kernel.org/r/20240426180519.3972626-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29 16:31:47 +02:00
Rob Herring
8b40a46966 arm/arm64: dts: Drop "arm,armv8-pmuv3" compatible usage
The "arm,armv8-pmuv3" compatible is intended only for s/w models. Primarily,
it doesn't provide any detail on uarch specific events.

There's still remaining cases for CPUs without any corresponding PMU
definition and for big.LITTLE systems which only have a single PMU node
(there should be one per core type).

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Bjorn Andersson <andersson@kernel.org>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
Acked-by: Alim Akhtar <alim.akhtar@samsung.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Link: https://lore.kernel.org/r/20240417203853.3212103-1-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29 10:27:52 +02:00
Akhil R
0d23cacb2a arm64: tegra: Add Tegra Security Engine DT nodes
Add device tree nodes for Tegra AES and HASH engines.

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-04-26 18:57:11 +02:00
Krzysztof Kozlowski
2633c58e13 arm64: tegra: Correct Tegra132 I2C alias
There is no such device as "as3722@40", because its name is "pmic".  Use
phandles for aliases to fix relying on full node path.  This corrects
aliases for RTC devices and also fixes dtc W=1 warning:

  tegra132-norrin.dts:12.3-36: Warning (alias_paths): /aliases:rtc0: aliases property is not a valid node (/i2c@7000d000/as3722@40)

Fixes: 0f279ebdf3 ("arm64: tegra: Add NVIDIA Tegra132 Norrin support")
Cc: stable@vger.kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-04-26 18:57:06 +02:00
Linus Torvalds
306bee64b7 Merge tag 'soc-dt-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC device tree updates from Arnd Bergmann:
 "There is very little going on with new SoC support this time, all the
  new chips are variations of others that we already support, and they
  are all based on ARMv8 cores:

   - Mediatek MT7981B (Filogic 820) and MT7988A (Filogic 880) are
     networking SoCs designed to be used in wireless routers, similar to
     the already supported MT7986A (Filogic 830).

   - NXP i.MX8DXP is a variant of i.MX8QXP, with two CPU cores less.
     These are used in many embedded and industrial applications.

   - Renesas R8A779G2 (R-Car V4H ES2.0) and R8A779H0 (R-Car V4M) are
     automotive SoCs.

   - TI J722S is another automotive variant of its K3 family, related to
     the AM62 series.

  There are a total of 7 new arm32 machines and 45 arm64 ones, including

   - Two Android phones based on the old Tegra30 chip

   - Two machines using Cortex-A53 SoCs from Allwinner, a mini PC and a
     SoM development board

   - A set-top box using Amlogic Meson G12A S905X2

   - Eight embedded board using NXP i.MX6/8/9

   - Three machines using Mediatek network router chips

   - Ten Chromebooks, all based on Mediatek MT8186

   - One development board based on Mediatek MT8395 (Genio 1200)

   - Seven tablets and phones based on Qualcomm SoCs, most of them from
     Samsung.

   - A third development board for Qualcomm SM8550 (Snapdragon 8 Gen 2)

   - Three variants of the "White Hawk" board for Renesas automotive
     SoCs

   - Ten Rockchips RK35xx based machines, including NAS, Tablet, Game
     console and industrial form factors.

   - Three evaluation boards for TI K3 based SoCs

  The other changes are mainly the usual feature additions for existing
  hardware, cleanups, and dtc compile time fixes. One notable change is
  the inclusion of PowerVR SGX GPU nodes on TI SoCs"

* tag 'soc-dt-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (824 commits)
  riscv: dts: Move BUILTIN_DTB_SOURCE to common Kconfig
  riscv: dts: starfive: jh7100: fix root clock names
  ARM: dts: samsung: exynos4412: decrease memory to account for unusable region
  arm64: dts: qcom: sm8250-xiaomi-elish: set rotation
  arm64: dts: qcom: sm8650: Fix SPMI channels size
  arm64: dts: qcom: sm8550: Fix SPMI channels size
  arm64: dts: rockchip: Fix name for UART pin header on qnap-ts433
  arm: dts: marvell: clearfog-gtr-l8: align port numbers with enclosure
  arm: dts: marvell: clearfog-gtr-l8: add support for second sfp connector
  dt-bindings: soc: renesas: renesas-soc: Add pattern for gray-hawk
  dtc: Enable dtc interrupt_provider check
  arm64: dts: st: add video encoder support to stm32mp255
  arm64: dts: st: add video decoder support to stm32mp255
  ARM: dts: stm32: enable crypto accelerator on stm32mp135f-dk
  ARM: dts: stm32: enable CRC on stm32mp135f-dk
  ARM: dts: stm32: add CRC on stm32mp131
  ARM: dts: add stm32f769-disco-mb1166-reva09
  ARM: dts: stm32: add display support on stm32f769-disco
  ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f769-disco
  ARM: dts: stm32: add DSI support on stm32f769
  ...
2024-03-12 10:29:57 -07:00
sheetal
cc36acb8a6 arm64: tegra: Remove Jetson Orin NX and Jetson Orin Nano DTSI
Jetson Orin NX and Jetson Orin Nano DTSI files just define the HDA label
and it is already added as part of base DTS files.
Hence, removing these files.

Signed-off-by: sheetal <sheetal@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-02-23 18:20:02 +01:00
sheetal
5f360dbc22 arm64: tegra: Add audio support for Jetson Orin NX and Jetson Orin Nano
Add audio support for the NVIDIA Jetson Orin NX (p3767, SKU0) module and
Jetson Orin Nano (p3767, SKU5) module Developer Kit with P3768 carrier
board.

APE and HDA sound cards are enabled.

Supported IO interfaces: I2S2 and I2S4.

Signed-off-by: sheetal <sheetal@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-02-23 18:20:02 +01:00
sheetal
f5c8e31e71 arm64: tegra: Define missing IO ports
I2S3, I2S5, DMIC1, DMIC2, DMIC4, DSPK1 and DSPK2 IO ports are not
defined. Those are not defined earlier because it was inside platform
DT and defined only for supported IOs by the platform.
Now these are part of SoC DTSI, all IOs ports are defined
so that all the ports are available to be used by platforms.

Signed-off-by: sheetal <sheetal@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-02-23 18:20:02 +01:00
sheetal
71a3b9b175 arm64: tegra: Move AHUB ports to SoC DTSI
AHUB and its child nodes ports are part of platform DTS and with new
platform support these entries need to be defined again.
As they are common across the platforms, moving them to SoC
DTSI to avoid code duplicacy.

AHUB HW accelerators are used for audio processing and typically all of
these are made available. Platforms can enable all of these just by
enabling the AHUB parent device. However IO interfaces (which are also
children of AHUB) are selectively enabled based on what the platform
actually exposes for interaction with external world.

Signed-off-by: sheetal <sheetal@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-02-23 18:20:02 +01:00
Jon Hunter
006fc90c2a arm64: tegra: Add USB Type-C controller for Jetson AGX Xavier
Populate the Cypress USB Type-C controller for Tegra194 Jetson AGX
Xavier board.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-02-23 18:20:02 +01:00
Jon Hunter
fddef3b9ad arm64: tegra: Add USB device support for Jetson AGX Xavier
Enable the USB device support for the Jetson AGX Xavier platform.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-02-23 18:20:02 +01:00
Jon Hunter
32ecead6a5 arm64: tegra: Add current monitors for Jetson Xavier
Add the INA3221 current monitors that are present on the Jetson AGX
Xavier and Jetson Xavier NX boards.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-02-23 18:20:02 +01:00
Thierry Reding
81695da63b arm64: tegra: Add AXI configuration for Tegra234 MGBE
The MGBE devices found on Tegra234 need their AXI interface configured
to operate at peak performance. Ideally we would do this in the driver
based off the compatible string, but the DT bindings already specify a
separate mechanism, so reuse that.

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-02-23 18:19:46 +01:00
Jon Hunter
ff6bd76f4d arm64: tegra: Fix Tegra234 MGBE power-domains
The MGBE power-domains on Tegra234 are mapped to the MGBE controllers as
follows:

 MGBE0 (0x68000000) --> Power-Domain MGBEB
 MGBE1 (0x69000000) --> Power-Domain MGBEC
 MGBE2 (0x6a000000) --> Power-Domain MGBED

Update the device-tree nodes for Tegra234 to correct this.

Fixes: 610cdf3186 ("arm64: tegra: Add MGBE nodes on Tegra234")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-02-22 17:58:59 +01:00
Thierry Reding
57cfb0aba2 arm64: tegra: Use consistent SD/MMC aliases on Tegra234
Tegra234 boards use a mixture of aliases for the SD/MMC hardware blocks,
which can lead to confusion. A common method was to use mmc3 as the
alias for the eMMC because "SDMMC3" happens to be the name of the
corresponding controller in the reference manual. This isn't a great
choice because there is no hardware named SDMMC0, so the mmc0 alias
would never get used with that nomenclature and in fact mmc1 and mmc2
wouldn't either in many configurations, thereby creating weird
discontiguous enumeration.

Instead of trying to match the aliases to the hardware block names, use
mmc0 to denote the device's primary SD/MMC controller (typically eMMC)
and mmc1 for the secondary SD/MMC controller (typically removable SD).
In cases where eMMC is the only controller we can omit the mmc1 alias
and if a device has no eMMC, the removable SD card can be aliased to
mmc0 instead.

Co-developed-by: Russell Xiao <russellx@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-02-21 17:12:32 +01:00
Mark Hasemeyer
341233b839 arm64: tegra: Enable cros-ec-spi as wake source
The cros_ec driver currently assumes that cros-ec-spi compatible device
nodes are a wakeup-source even though the wakeup-source property is not
defined.

Some Chromebooks use a separate wake pin, while others overload the
interrupt for wake and IO. With the current assumption, spurious wakes
can occur on systems that use a separate wake pin. It is planned to
update the driver to no longer assume that the EC interrupt pin should
be enabled for wake.

Add the wakeup-source property to all cros-ec-spi compatible device
nodes to signify to the driver that they should still be a valid wakeup
source.

Signed-off-by: Mark Hasemeyer <markhas@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-02-16 12:31:24 +01:00
Thierry Reding
4c892121d4 arm64: tegra: Set the correct PHY mode for MGBE
The PHY is configured in 10GBASE-R, so make sure to reflect that in DT.

Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-02-16 12:05:33 +01:00
Thierry Reding
c0b80988eb arm64: tegra: Use correct interrupts for Tegra234 TKE
The shared interrupts 0-9 of the TKE are mapped to interrupts 0-9, but
shared interrupts 10-15 are mapped to 256-261. Correct the mapping for
the final 6 interrupts. This prevents the TKE from requesting the RTC
interrupt (along with several GTE and watchdog interrupts).

Reported-by: Shubhi Garg <shgarg@nvidia.com>
Fixes: 28d860ed02 ("arm64: tegra: Enable native timers on Tegra234")
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-13 14:43:05 +02:00
Jon Hunter
9152ed0930 arm64: tegra: Add power-sensors for Tegra234 boards
Populate the ina219 and ina3221 power-sensors for the various Tegra234
boards. These sensors are located on the Tegra234 module boards and the
configuration of some sensors is common across the different Tegra234
modules. Therefore, add any common sensor configurations to appropriate
device tree source file so it can be re-used across modules.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-13 14:34:31 +02:00
Thierry Reding
5023dfa6d5 arm64: tegra: Mark Tegra234 SPI as compatible with Tegra114
According to the bindings, both Tegra210 and Tegra114 compatible strings
need to be specified since the version of this hardware block found in
Tegra210 is backwards-compatible.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10 17:37:35 +02:00
Thierry Reding
ea314b01f7 arm64: tegra: Add dmas and dma-names for Tegra234 UARTE
Commit 940acdac99 ("arm64: tegra: Add UARTE device tree node on
Tegra234") added the device tree node for the UARTE on Tegra234 but
didn't include the "dmas" and "dma-names" properties required for this
device when it's used in high-speed mode.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10 17:37:35 +02:00
Thierry Reding
036f15c248 arm64: tegra: Use correct format for clocks property
phandle and clock specifier pairs should be enclosed in angular
brackets.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10 17:37:35 +02:00
Thierry Reding
4bf7fa33d1 arm64: tegra: Remove duplicate nodes on Jetson Orin NX
The SBSA UART and TCU as well as the TCU alias and the stdout-path are
configured via the P3768 carrier board DTS include, so the can be
removed from the system DTS file.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10 17:37:35 +02:00
Thierry Reding
f7a9a7d9e9 arm64: tegra: Add missing current-speed for SBSA UART
The SBSA UART device tree bindings require a current-speed property that
specifies the baud rate configured by the firmware. Add it on Jetson AGX
Orin and Jetson Orin Nano/NX.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10 17:37:35 +02:00
Diogo Ivo
ed80bb2350 arm64: tegra: Add display panel node on Smaug
The Google Pixel C has a JDI LPM102A188A display panel, so add a
DT node for it.

Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10 17:37:35 +02:00
Diogo Ivo
a64bec3155 arm64: tegra: Add backlight node on Smaug
The Google Pixel C has a TI LP8557 backlight controller, so add a
DT node for it.

Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10 17:37:35 +02:00
Diogo Ivo
6a4908de6a arm64: tegra: Add DSI/CSI regulator on Smaug
Add the node for the DSI/CSI regulator in the Pixel C.

Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10 17:37:35 +02:00
Rayyan Ansari
0cb028a2a4 arm64: tegra: Enable IOMMU for host1x on Tegra132
Add the iommu property to the host1x node to register it with its
swgroup.

Signed-off-by: Rayyan Ansari <rayyan@ansari.sh>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10 17:37:35 +02:00
Brad Griffis
57ea99ba17 arm64: tegra: Fix P3767 QSPI speed
The QSPI device used on Jetson Orin NX and Nano modules (p3767) is
the same as Jetson AGX Orin (p3701) and should have a maximum speed of
102 MHz.

Fixes: 13b0aca303 ("arm64: tegra: Support Jetson Orin NX")
Signed-off-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10 17:37:35 +02:00
Brad Griffis
c6b7a1d11d arm64: tegra: Fix P3767 card detect polarity
The SD card detect pin is active-low on all Orin Nano and NX SKUs that
have an SD card slot.

Fixes: 13b0aca303 ("arm64: tegra: Support Jetson Orin NX")
Signed-off-by: Brad Griffis <bgriffis@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-10-10 17:37:35 +02:00
Thierry Reding
d7fb6468ec arm64: tegra: Add blank lines for better readability
Add a few blank lines to visually separate blocks in the Jetson AGX Orin
device tree.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-07-27 16:48:25 +02:00