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14766 Commits

Author SHA1 Message Date
Jack Xiao
3dc434ad26 drm/amdgpu: add module parameter 'amdgpu_uni_mes' 
Add module parameter 'amdgpu_uni_mes' to enable/disable unified
mes fw support.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
Jack Xiao
ad5c0a79df drm/amdgpu/mes12: add legacy setting hw resource interface 
For unified mes fw, add the legacy interface to set hardware
resources.

v2: remove warning (Alex)

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
shaoyunl
fcc5df722d drm/amdgpu: Disable unmapped doorbell handling basic mode on mes 12 
The new mechanism for unmapped doorbell handling requires both driver side and
MES fw side change. The FW side changes are still not released.

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Harish Kasiviswanthan <Harish.Kasiviswanthan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
Jack Xiao
663bbfaf68 drm/amdgpu/gfx: enable mes to map legacy queue support 
Enable mes to map legacy queue support.

v2: drop unused gfx_v12_0_kiq_enable_kgq() (Alex)

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:14 -04:00
Jack Xiao
4c2439f908 drm/amdgpu/mes12: add mes mapping legacy queue support 
Add mes12 map legacy queue packet submission.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:13 -04:00
Jack Xiao
6ce03bd3a4 drm/amdgpu/mes12: enable uni_mes fw on mes pipe0 
Enable the unified mes firmware on mes pipe0.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:13 -04:00
Jack Xiao
d2e2c9be78 drm/amdgpu/mes12: add uni_mes fw loading support 
Add the unified mes firmware loading support.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:13 -04:00
Jack Xiao
15ddc4e693 drm/amdgpu/mes: add uni_mes fw loading support 
Add the unified mes firmware loading support.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:13 -04:00
Sreekant Somasekharan
628e1ace23 drm/amdkfd: mark GFX12 system and peer GPU memory mappings as MTYPE_NC 
Due to a HW bug, the system memory mappings and peer GPU mappings
on GFX12 need to be marked as MTYPE_NC.

Cc: Joe Greathouse <joseph.greathouse@amd.com>
Cc: David Belanger <david.belanger@amd.com>
Signed-off-by: Rajneesh Bhardwaj <rajneesh.bhardwaj@amd.com>
Signed-off-by: Sreekant Somasekharan <sreekant.somasekharan@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:13 -04:00
Jonathan Kim
984b265ff6 drm/amdkfd: fix support for trap on wave start and end for gfx12 
Similar to GFX11, GFX12 supports trapping on wave start and end.

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:13 -04:00
Jonathan Kim
fda3f378c4 drm/amdkfd: always enable ttmp setup for gfx12 
Similar to GFX11, always enable the setup of trap temporaries on GFX12.

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:13 -04:00
David Belanger
90e4fc8369 drm/amdkfd: Added gfx_v12_kfd2kgd interface for GFX12. 
Initial implementation, based on GFX11.

v2: Removed functions not needed by cp scheduler.
v3: Fixed typos.
v4: squash in warning fix (Alex)

Signed-off-by: David Belanger <david.belanger@amd.com>
Acked-by: Jonathan Kim <jonathan.kim@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:12 -04:00
shaoyunl
2f983d3ca5 drm/amdgpu: Enable event log on MES 12 
Enable event log through the HW specific FW API

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Harish Kasiviswanthan <Harish.Kasiviswanthan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:12 -04:00
shaoyunl
19e69a5d28 drm/amdgpu: Enable unmapped doorbell handling basic mode on mes 12 
Enable basic mode handling for doorbell ring on unmapped CP queue.
In this mode, MES can start schedule the queue mapping based on HW
interrupt instead of timer.

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Harish Kasiviswanthan <Harish.Kasiviswanthan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:12 -04:00
Hawking Zhang
a2211e475c drm/amdgpu: Switch to smuio func to get gpu clk counter 
Switch to smuio callback to query gpu clock counter

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:12 -04:00
Likun Gao
e781af6663 drm/amdgpu: init gfxhub setting to align with mmhub 
Align gfxhub settings with mmhub when program rlc ram.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:12 -04:00
Likun Gao
b32edc2340 drm/amdgpu: skip dpm check to init imu fw 
Skip dpm check to init imu firmware for imu v12.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:11 -04:00
Likun Gao
044feb8e2a drm/amdgpu: fix active rb and cu number for gfx12 
Correct the algorithm of active CU and RB to bypass
the disabled SA for gfx12.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:11 -04:00
Likun Gao
56159fffaa drm/amdgpu: use new method to program rlc ram 
Program rlc ram with golden setting data instead.
The old method (program_imu_rlc_ram_old) should be
retired in the future.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:11 -04:00
Kenneth Feng
043869be5a drm/amd/amdgpu: add cgcg&cgls interface for gfx 12.0 
add cgcg&cgls interface for gfx 12.0

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:11 -04:00
Tom St Denis
60917ce8f8 drm/amd/amdgpu: update GFX12 wave data registers 
Update the registers for gfx12.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Jonathan Kim <jonathan.kim@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:11 -04:00
Likun Gao
53efeba35d drm/amdgpu: set different fw data addr for mec pipe 
For MEC fw data, different pipe should programed into
different address.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:11 -04:00
Kenneth Feng
1e740df77f drm/amd/amdgpu: workaround for the imu fw loading 
workaournd for the imu fw loading on gfx 12.0 without psp

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:11 -04:00
Likun Gao
f5b4c3236f drm/amd: Move fw init from sw_init to early_init for imu v12 
Move microcode loading from sw_init to early_init to align with
the perious version of imu init sequence.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:11 -04:00
Likun Gao
2502af906b drm/amdgpu: support S&R fw load for gfx v12 
Support Save & Restore related fw load with backdoor RLC
autoload type on gfx v12.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:11 -04:00
Jack Xiao
36b2ce4775 drm/amdgpu/gfx12: recalculate available compute rings to use 
Recalculate the number of compute rings to use based on
the gfx hardware configuration. As needed reserve half of
compute rings for mes, kgd can't use up all compute rings.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:11 -04:00
Likun Gao
29d36a9cfd drm/amdgpu: skip imu related function if dpm=0 
Only execute IMU related functions if dpm>0.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:11 -04:00
Kenneth Feng
32d1637689 drm/amd/amdgpu: imu fw loading support 
support imu related function for gfx v12.

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:11 -04:00
Likun Gao
af204b76a7 drm/amdgpu: set cp fw address set for gfx v12 
Split PFF/ME/MEC firmware address setting function
from related load microcode funtion, as it's also
needed for rlc autolad.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:10 -04:00
Likun Gao
52cb80c12e drm/amdgpu: Add gfx v12_0 ip block support (v6) 
Initial support for GFX 12.

v1: Add gfx v12_0 ip block support. (Likun)
v2: Switch to gfx.kiq array.
    Move the vmhub from ring callback to ring. (Hawking)
v3: Update various callback function impl. (Hawking)
v4: Warning fixes (Alex)
v5: squash in imu fix, csb, rlc autoload implementations (Alex)
v6: Rebase (Alex)

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:10 -04:00
Jack Xiao
4632bec9fa drm/amdgpu/mes12: update data cache boundary 
Enlarge the data cache boundary.

v2: use the fix data cache boundary.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:10 -04:00
Jonathan Kim
46c4766610 drm/amdgpu: fix trap enablement for gfx12 
Fix request to MES to set SQ_SHADER_TBA_HI.trap_en for GFX12.

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:10 -04:00
shaoyunl
d817c470cb drm/amdgpu: Enable MES to handle doorbell ring on unmapped queue 
On MES12, HW can monitor up to 2048 doorbells that not be
mapped currently and trigger the interrupt to MES when these unmapped
doorbell been ringed.

Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:10 -04:00
Jack Xiao
745f46b6a9 drm/amdgpu: enable mes v12 self test 
1. fix available compute queue to use
2. enable mes v12 self test

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:10 -04:00
Likun Gao
6628f7762b drm/amdgpu: set mes fw address for mes v12 
Split the function of mes fimrware address setting
from mes firmware load for mes v12, as it's also
needed for rlc autoload.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:10 -04:00
Jack Xiao
785f0f9fe7 drm/amdgpu: Add mes v12_0 ip block support (v4) 
v1: Add mes v12_0 ip block support. (Jack)
v2: Switch to gfx.kiq array. (Hawking)
v3: Switch to AMDGPU_GFXHUB(0). (Hawking)
v4: Rebase (Alex)

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:10 -04:00
Likun Gao
69d4c44e51 drm/amdgpu: init mes ucode name for gfx v12 
Keep gfx v12 mes fw name to gc_12_x_x_mes.bin
and gc_12_x_x_mes1.bin.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:10 -04:00
Likun Gao
00c9035633 drm/amdgpu: add rlc TOC header file for soc24 
Add RLC autoload TOC header file for soc24 ASIC.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:10 -04:00
Likun Gao
e3a911bb38 drm/amdgpu: add new TOC structure 
Add new RLC_TABLE_OF_CONTENT structure definition.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:10 -04:00
Likun Gao
d8fd91f905 drm/amdgpu: add gfx12 clearstate header 
Add gfx12 clearstate register arrays.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:10 -04:00
Likun Gao
5638b1cfa7 drm/amdgpu/discovery: Set GC family for GC 12.0 IP 
Set GC family for GC 12.0 IPs.

v2: squash in updates (Alex)

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:18:09 -04:00
Sonny Jiang
e56b042118 drm/amdgpu: IB test encode test package change for VCN5 
VCN5 session info package interface changed

Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 16:17:55 -04:00
Hawking Zhang
5f571c61b9 drm/amdgpu: Add gfx v9_4_4 ip block 
Add gfx v9_4_4 ip block support

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 15:49:16 -04:00
Hawking Zhang
a6bcffa596 drm/amdgpu: Add smu v13_0_14 ip block 
Add smu v13_0_14 ip block support

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 15:49:11 -04:00
Hawking Zhang
1dbd59f3f4 drm/amdgpu: Add psp v13_0_14 ip block 
Add psp v13_0_14 ip block support.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 15:49:05 -04:00
Hawking Zhang
3d1bb1a2e0 drm/amdgpu: Add sdma v4_4_5 ip block 
Add sdma v4_4_5 ip block support

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 15:48:57 -04:00
Aurabindo Pillai
c45211adfa drm/amd: Override DCN410 IP version 
Override DCN IP version to 4.0.1 from 4.1.0 temporarily until change is
made in DC codebase to use 4.1.0

Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 15:48:46 -04:00
Lang Yu
2d6f49ee84 drm/amdkfd: handle duplicate BOs in reserve_bo_and_cond_vms 
Observed on gfx8 ASIC where KFD_IOC_ALLOC_MEM_FLAGS_AQL_QUEUE_MEM is used.
Two attachments use the same VM, root PD would be locked twice.

[   57.910418] Call Trace:
[   57.793726]  ? reserve_bo_and_cond_vms+0x111/0x1c0 [amdgpu]
[   57.793820]  amdgpu_amdkfd_gpuvm_unmap_memory_from_gpu+0x6c/0x1c0 [amdgpu]
[   57.793923]  ? idr_get_next_ul+0xbe/0x100
[   57.793933]  kfd_process_device_free_bos+0x7e/0xf0 [amdgpu]
[   57.794041]  kfd_process_wq_release+0x2ae/0x3c0 [amdgpu]
[   57.794141]  ? process_scheduled_works+0x29c/0x580
[   57.794147]  process_scheduled_works+0x303/0x580
[   57.794157]  ? __pfx_worker_thread+0x10/0x10
[   57.794160]  worker_thread+0x1a2/0x370
[   57.794165]  ? __pfx_worker_thread+0x10/0x10
[   57.794167]  kthread+0x11b/0x150
[   57.794172]  ? __pfx_kthread+0x10/0x10
[   57.794177]  ret_from_fork+0x3d/0x60
[   57.794181]  ? __pfx_kthread+0x10/0x10
[   57.794184]  ret_from_fork_asm+0x1b/0x30

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 15:44:10 -04:00
Yunxiang Li
4752cac300 drm/amdgpu: Move ras resume into SRIOV function 
This is part of the reset, move it into the reset function.

Signed-off-by: Yunxiang Li <Yunxiang.Li@amd.com>
Reviewed-by: Emily Deng <Emily.Deng@amd.com>
Reviewed-by: Zhigang Luo <zhigang.luo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 15:44:02 -04:00
Peyton Lee
3f19cffde9 drm/amdgpu/vpe: fix vpe dpm clk ratio setup failed 
Some version of BIOS does not enable all clock levels,
resulting in high level clock frequency of 0.
The number of valid CLKs must be confirmed in advance.

Signed-off-by: Peyton Lee <peytolee@amd.com>
Reviewed-by: Lang Yu <lang.yu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-05-02 15:43:48 -04:00