Commit Graph

2 Commits

Author SHA1 Message Date
Piyush Mehta
737af37e9c dt-bindings: reset: Updated binding for Versal-NET reset driver
Added dt-binding documentation for Versal NET platforms.

Versal Net is a new AMD/Xilinx  SoC.

The SoC and its architecture is based on the Versal ACAP device.
The Versal Net  device includes more security features in the
platform management controller (PMC) and increases the number
of CPUs in the application processing unit (APU) and the
real-time processing unit (RPU).

Signed-off-by: Piyush Mehta <piyush.mehta@amd.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230721041119.4058430-2-piyush.mehta@amd.com
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2023-07-28 18:07:01 +02:00
Piyush Mehta
c43e7983fc dt-bindings: reset: convert the xlnx,zynqmp-reset.txt to yaml
Convert the binding to DT schema format. It also updates the
reset-controller description.

Signed-off-by: Piyush Mehta <piyush.mehta@amd.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Message-ID: <20230613123048.2935502-1-piyush.mehta@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-06-15 11:46:53 +02:00