4 Commits

Author	SHA1	Message	Date
Dmytro Laktyushkin	75c2b7ed08	drm/amd/display: fix seamless odm transitions ... Add missing programming and function pointers Cc: Mario Limonciello <mario.limonciello@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org Acked-by: Stylon Wang <stylon.wang@amd.com> Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com> Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2023-06-09 12:37:46 -04:00
Chris Park	34fd6df788	drm/amd/display: Simplify register offsets ... [Why] Runtime initialization of register addresses define duplicate register offsets in resource file, and makes register offsets in sub-block defined for compile time initialization obsolete. [How] Remove obsolete sub block register offsets that is no longer referenced. Reviewed-by: Martin Leung <Martin.Leung@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Chris Park <chris.park@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2023-03-07 14:22:40 -05:00
Samson Tam	327f79d7a1	drm/amd/display: Updates for OTG and DCCG clocks ... Use DTBCLK for valid pixel clock generation Signed-off-by: Samson Tam <Samson.Tam@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2022-06-03 16:45:01 -04:00
Aurabindo Pillai	235c676342	drm/amd/display: add DCN32/321 specific files for Display Core ... Add core DC support for DCN 3.2.x. v2: squash in fixup (Alex) Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>	2022-06-03 16:43:37 -04:00