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9974 Commits

Author SHA1 Message Date
Alex Deucher
d1daf8502e drm/amdgpu: consolidate navi14 IP init 
It's the same as navi10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:18:01 -05:00
Alex Deucher
2665ec4171 drm/amdgpu: disable concurrent flushes on Navi14 
Same thing applies to navi14 as navi10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:18:01 -05:00
Jack Xiao
ba02636de5 drm/amdgpu: enable gfxoff code path for navi14 
Based on navi10 gfxoff logic, enable the related code
path for navi14.

Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:18:01 -05:00
Xiaojie Yuan
0377b08823 drm/amdgpu/vcn: enable indirect DPG SRAM mode for navi14 
Enable VCN dynamic powergating for navi14.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:18:01 -05:00
Xiaojie Yuan
03917df7e5 drm/amdgpu/nv: set vcn pg flag for navi14 
Enable VCN power gating by default.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:18:00 -05:00
Xiaojie Yuan
5e0f378d8a drm/amdgpu: enable async gfx ring for navi14 
Same as navi10.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:18:00 -05:00
Xiaojie Yuan
d0c39f8cbf drm/amdgpu: enable clock gatings for navi14 
Set appropriate CG flags for navi14.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:18:00 -05:00
Xiaojie Yuan
29e6fd7c86 drm/amdgpu/athub2: set clock gating for navi14 
same as navi10.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:18:00 -05:00
Xiaojie Yuan
408c49de9b drm/amdgpu/mmhub2: set clock gating for navi14 
same as navi10.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:18:00 -05:00
Xiaojie Yuan
8687b47e3a drm/amdgpu: declare asd firmware for navi14 
So the dependency gets properly tracked.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Snow Zhang <snow.zhang@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:18:00 -05:00
James Zhu
e149a2f6ed drm/amdgpu: Enable VCN on navi14 
Add navi14 vcn firmware, and enable VCN on navi14.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:18:00 -05:00
Xiaojie Yuan
e470d287c3 drm/amdgpu: skip to load ta firmware for navi14 
Not relevant on navi14.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:18:00 -05:00
Bhawanpreet Lakha
8fceceb69e drm/amd/display: add dm block 
enable DC for navi14.

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:18:00 -05:00
Xiaojie Yuan
ab5e51211c drm/amdgpu: enable sw smu ip for navi14 
same as navi10.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:18:00 -05:00
Xiaojie Yuan
7840d8babe drm/amdgpu/psp: start rlc autoload after psp received rlcg for navi14 
Update for navi14.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:18:00 -05:00
Xiaojie Yuan
4adc0732fc drm/amdgpu: enable psp ip block for navi14 
Same as navi10.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Snow Zhang <Snow.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:18:00 -05:00
Xiaojie Yuan
82522b2d7f drm/amdgpu/psp: add psp support for navi14 (v3) 
Same as navi10.

v2: squash in logic fix (Colin Ian King)
v3: squash in logic simplification (Alex)

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Snow Zhang <Snow.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:59 -05:00
Xiaojie Yuan
691f69b6a6 drm/amdgpu: enable virtual display for navi14 
Virtual display is a sw based kms interface for virtualization
and emulation.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:59 -05:00
Xiaojie Yuan
a29bfd1283 drm/amdgpu: add ip blocks for navi14 
Add the initial IP blocks for navi14

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:59 -05:00
Xiaojie Yuan
5e71e011ff drm/amdgpu/soc15: add support for navi14 
same as navi10

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:59 -05:00
Jack Xiao
b8cb98cd3e drm/amdgpu/gfx10: fix programming of SC_HIZ_TILE_FIFO_SIZE field 
max fifo size is 128 and PA_SC_FIFO_SIZE[20:15]=SC_HIZ_TILE_FIFO_SIZE
field is programmed in units of two entries, but 6 bits is insufficient
to hold value 128/2 = 64, so set this field as 0 which is interpreted by
the hardware as maximum physical fifo size(128).

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Jack Xiao <Jack.Xiao@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:59 -05:00
Tao Zhou
3ddec51511 drm/amdgpu/gfx10: update gfx golden settings for navi14 
Updated settings from hw team.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:59 -05:00
Xiaojie Yuan
4904ede127 drm/amdgpu/gfx10: update gfx golden settings for navi14 
Add updated settings from hw team.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:59 -05:00
Xiaojie Yuan
be184b4ccc drm/amdgpu/gfx: update gc_v10_1_1 golden setting 
Updated settings for hw team.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:59 -05:00
Xiaojie Yuan
7417846725 drm/amdgpu/gfx10: add gfx v10_1_1 golden settings for navi14 
Add golden settings for navi14.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Snow Zhang <Snow.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:59 -05:00
Xiaojie Yuan
58acab6629 drm/amdgpu/gfx: add definition of mmCGTT_GS_NGG_CLK_CTRL 
Needed for clockgating.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:59 -05:00
Xiaojie Yuan
d55c193dbd drm/amdgpu/gfx10: set tcp harvest for navi14 
Update settings for navi14.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:59 -05:00
Xiaojie Yuan
e938ded648 drm/amdgpu: set rlc funcs for navi14 
Same as navi10.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:59 -05:00
Xiaojie Yuan
0c090023c6 drm/amdgpu: add me/mec configurations for navi14 
Add navi14 to appropriate cases.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:59 -05:00
Xiaojie Yuan
41957a8ea9 drm/amdgpu/gfx10: add clockgating support for navi14 
Same as navi10.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:59 -05:00
Xiaojie Yuan
4bd80a4663 drm/amdgpu/gfx10: add gfx config for navi14 
Add gfx config details for navi14.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:59 -05:00
Xiaojie Yuan
47b67bd7d4 drm/amdgpu/gfx10: add placeholder for navi14 golden settings 
To be filled in once available.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:59 -05:00
Xiaojie Yuan
654bcee0e4 drm/amdgpu/gfx10: add support for navi14 firmware 
Add support for navi14 CP firmware files.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:59 -05:00
Xiaojie Yuan
9571710f0c drm/amdgpu/sdma5: set clock gating for navi14 
same as navi10.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:59 -05:00
tiancyin
a994b742b8 drm/amdgpu/sdma5: update sdma5 golden settings for navi14 
add new registers:
	mmSDMA0_RLC3_RB_WPTR_POLL_CNTL,
	mmSDMA1_RLC3_RB_WPTR_POLL_CNTL

Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Signed-off-by: tiancyin <tianci.yin@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:58 -05:00
Xiaojie Yuan
c049af3e85 drm/amdgpu/sdma5: add sdma5_0 golden settings for navi14 
Add settings for navi14.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Snow Zhang <Snow.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:58 -05:00
Xiaojie Yuan
06823925ad drm/amdgpu/sdma5: add placeholder for navi14 golden settings 
To be filled in once they are available.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:58 -05:00
Xiaojie Yuan
6041f2a281 drm/amdgpu/sdma5: add support for navi14 firmware 
Add support for navi14 sdma firmware files.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:58 -05:00
Xiaojie Yuan
05d72b8d36 drm/amdgpu/gmc10: add navi14 support 
same as navi10

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:58 -05:00
Xiaojie Yuan
c8ff09bf41 drm/amdgpu: increase max instance number for hw ip 
max instance number is 6 for navi10 and 7 for navi14, and we increase the
reg_offset array size to avoid out-of-bound access

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:58 -05:00
Xiaojie Yuan
c20697674d drm/amdgpu/discovery: init reg base offset via ip discovery for navi14 
Add IP discovery for navi14.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:58 -05:00
Xiaojie Yuan
a0f6d926f1 drm/amdgpu/soc15: initialize reg base for navi14 (v2) 
Initialize the IP register base offsets for navi14.

v2: squash in MP, CLK, THM updates

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:58 -05:00
Xiaojie Yuan
e2d2607f90 drm/amdgpu: add navi14 ucode loading method 
Same as navi10.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:58 -05:00
Xiaojie Yuan
7ecb5cd451 drm/amdgpu: set asic family and ip blocks for navi14 
same with navi10

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:58 -05:00
Xiaojie Yuan
ed42cfe1ac drm/amdgpu: add gpu_info firmware for navi14 
Add navi14 to case statement to load the GPU info firmware.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:58 -05:00
Xiaojie Yuan
87dbad02d2 drm/amdgpu: add navi14 asic type 
Add CHIP_NAVI14 to the list of asic types.

Signed-off-by: Xiaojie Yuan <xiaojie.yuan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jack Xiao <Jack.Xiao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:58 -05:00
Leo Liu
c6d5245d41 drm/amdgpu: use VCN firmware offset for cache window 
Since we are using the signed FW now, and also using PSP firmware loading,
but it's still potential to break driver when loading FW directly
instead of PSP, so we should add offset.

Signed-off-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:18 -05:00
Hawking Zhang
578a4daa1c drm/amdgpu: drop ras self test 
this function is not needed any more. error injection is
the only way to validate ras but it can't be executed in
amdgpu_ras_init, where gpu is even not initialized

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:18 -05:00
Hawking Zhang
29bd650809 drm/amdgpu: only allow error injection to UMC IP block 
error injection to other IP blocks (except UMC) will be enabled
until RAS feature stablize on those IP blocks

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:18 -05:00
Hawking Zhang
59d9c0ab71 drm/amdgpu: disable GFX RAS by default 
GFX RAS has not been stablized yet. disable GFX ras until
it is fully funcitonal.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2019-07-18 14:17:18 -05:00