Commit Graph

6 Commits

Author SHA1 Message Date
Conor Dooley
fb4b06f521 dt-bindings: drop Sagar Kadam from SiFive binding maintainership
Sagar's email listed in maintainers is bouncing as his division was sold
off by the company. I attempted to contact him some days ago on what the
bounce email told me was his new contact information, but am yet to
receive a response.

Paul and Palmer are listed on each of the bindings, both of whom were
alive & well as of Wednesday so the bindings remain maintained.

CC: Sagar Kadam <sagar.kadam@openfive.com>
CC: Sagar Kadam <sagar.kadam@sifive.com>
Link: https://lore.kernel.org/all/785425ca-4000-a7e4-16d6-4d68c91b158d@kernel.org/
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/20230217180035.39658-1-conor@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
2023-02-21 10:22:04 -06:00
Linus Torvalds
74164d284b Merge tag 'pwm/for-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm
Pull pwm updates from Thierry Reding:
 "This contains conversions of some more drivers to the atomic API as
  well as the addition of new chip support for some existing drivers.

  There are also various minor fixes and cleanups across the board, from
  drivers to device tree bindings"

* tag 'pwm/for-5.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (45 commits)
  pwm: rcar: Simplify multiplication/shift logic
  dt-bindings: pwm: renesas,tpu: Do not require pwm-cells twice
  dt-bindings: pwm: tiehrpwm: Do not require pwm-cells twice
  dt-bindings: pwm: tiecap: Do not require pwm-cells twice
  dt-bindings: pwm: samsung: Do not require pwm-cells twice
  dt-bindings: pwm: intel,keembay: Do not require pwm-cells twice
  dt-bindings: pwm: brcm,bcm7038: Do not require pwm-cells twice
  dt-bindings: pwm: toshiba,visconti: Include generic PWM schema
  dt-bindings: pwm: renesas,pwm: Include generic PWM schema
  dt-bindings: pwm: sifive: Include generic PWM schema
  dt-bindings: pwm: rockchip: Include generic PWM schema
  dt-bindings: pwm: mxs: Include generic PWM schema
  dt-bindings: pwm: iqs620a: Include generic PWM schema
  dt-bindings: pwm: intel,lgm: Include generic PWM schema
  dt-bindings: pwm: imx: Include generic PWM schema
  dt-bindings: pwm: allwinner,sun4i-a10: Include generic PWM schema
  pwm: pwm-mediatek: Beautify error messages text
  pwm: pwm-mediatek: Allocate clk_pwms with devm_kmalloc_array
  pwm: pwm-mediatek: Simplify error handling with dev_err_probe()
  pwm: brcmstb: Remove useless locking
  ...
2022-03-30 11:00:33 -07:00
Krzysztof Kozlowski
e040921c9b dt-bindings: pwm: sifive: Include generic PWM schema
Include generic pwm.yaml schema, which enforces PWM node naming and
brings pwm-cells requirement.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2022-02-24 15:06:48 +01:00
Krzysztof Kozlowski
34f3eda8c8 MAINTAINERS: sifive: drop Yash Shah
Emails to Yash Shah bounce with "The email account that you tried to
reach does not exist.", so drop him from all maintainer entries.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220214082349.162973-1-krzysztof.kozlowski@canonical.com
2022-02-22 15:15:39 -06:00
Yash Shah
b1f592d5c1 dt-bindings: pwm: Update DT binding docs to support SiFive FU740 SoC
Add new compatible strings to the DT binding documents to support SiFive
FU740-C000.

Signed-off-by: Yash Shah <yash.shah@sifive.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2021-01-07 17:37:29 -08:00
Sagar Kadam
6b49329ae6 dt-bindings: riscv: convert pwm bindings to json-schema
Convert device tree bindings for SiFive's PWM controller to YAML
format.

Signed-off-by: Sagar Kadam <sagar.kadam@sifive.com>
Link: https://lore.kernel.org/r/1601393531-2402-4-git-send-email-sagar.kadam@sifive.com
Signed-off-by: Rob Herring <robh@kernel.org>
2020-10-06 13:44:42 -05:00