A generic GIC block embedded in an SoC may be connected to an on-SoC
reset controller. Hence allow the DTS writer to describe this relation,
by documenting the optional presence of a "reset" property.
This gets rid of "make dtbs_check" warnings like:
arch/arm/boot/dts/r8a7791-porter.dt.yaml: interrupt-controller@f1001000: 'resets' does not match any of the regexes: '^v2m@[0-9a-f]+$', 'pinctrl-[0-9]+'
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
The arm,gic-400 compatible is probably the best matching string for the
GIC in most modern SoCs, but was only introduced later into the kernel.
For historic reasons and to keep compatibility, some SoC DTs were thus
using a combination of this name and one of the older strings, which
currently the binding denies.
Add a stanza to the DT binding to allow "arm,gic-400", followed by
either "arm,cortex-a15-gic" or "arm,cortex-a7-gic". This fixes binding
compliance for quite some SoC .dtsi files in the kernel tree.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Validating the examples against the schema have a few errors:
arm,gic.example.dt.yaml: 'ranges' does not match any of the regexes: '^v2m@[0-9a-f]+$', 'pinctrl-[0-9]+'
arm,gic.example.dt.yaml: #address-cells:0:0: 2 is not one of [0, 1]
arm,gic.example.dt.yaml: #size-cells:0:0: 1 was expected
'ranges' is valid, but missing from the schema, so add it. The reg
addresses and sizes don't match the schema requirements and the example
template. We could just override the example template to use 64-bit
addresses, but there's not really any value showing that in the example.
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
