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2 Commits

Author SHA1 Message Date
Heiko Stuebner
dd5bdb797f clk: rockchip: document hdmi_phy external input for rk3328 
The hdmi-phy block inside the soc also loops its pll output back
into the clock controller, so document that already used input clock.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Rob Herring <robh@kernel.org>
 2018-02-12 15:00:58 +01:00
Elaine Zhang
b51af0bad8 dt-bindings: add bindings for rk3328 clock controller 
Add devicetree bindings for Rockchip cru which found on
Rockchip SoCs.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2017-01-05 13:07:59 +01:00