Commit Graph

11 Commits

Author SHA1 Message Date
William Qiu
0d2b6a1b85 dt-bindings: qspi: cdns,qspi-nor: Add clocks for StarFive JH7110 SoC
The QSPI controller needs three clock items to work properly on StarFive
JH7110 SoC, so there is need to change the maxItems's value to 3.

Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230804020254.291239-2-william.qiu@starfivetech.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-08-04 13:29:49 +01:00
Brad Larson
f2156989bf spi: cdns: Add compatible for AMD Pensando Elba SoC
Document the cadence qspi controller compatible for AMD Pensando
Elba SoC boards.  The Elba qspi fifo size is 1024.

Signed-off-by: Brad Larson <blarson@amd.com
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org
Link: https://lore.kernel.org/r/20230515181606.65953-3-blarson@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org
2023-05-17 10:38:58 +09:00
William Qiu
13f1033e07 dt-bindings: qspi: cdns,qspi-nor: constrain minItems/maxItems of resets
The QSPI controller needs three reset items to work properly on JH7110 SoC,
so there is need to change the maxItems's value to 3 and add minItems
whose value is equal to 2. Other platforms do not have this constraint.

Signed-off-by: William Qiu <william.qiu@starfivetech.com>
Link: https://lore.kernel.org/r/20230302105221.197421-2-william.qiu@starfivetech.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-03-05 23:38:57 +00:00
Krzysztof Kozlowski
ee8d422c91 spi: dt-bindings: cleanup examples - indentation, lowercase hex
Cleanup examples:
 - use 4-space indentation (for cases when it is neither 4 not 2 space),
 - drop redundant blank lines,
 - use lowercase hex.

No functional impact except adjusting to preferred coding style.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> # renesas
Reviewed-by: Andrew Jeffery <andrew@aj.id.au> # aspeed
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> # meson
Link: https://lore.kernel.org/r/20230124083342.34869-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-01-25 12:39:14 +00:00
Krzysztof Kozlowski
99a7fa0e75 spi: dt-bindings: drop unneeded quotes
Cleanup by removing unneeded quotes from refs and redundant blank lines.
No functional impact except adjusting to preferred coding style.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au> # aspeed
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> # meson
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> # st
Reviewed-by: Heiko Stuebner <heiko@sntech.de> # rockchip
Reviewed-by: Serge Semin <fancer.lancer@gmail.com> # synopsys
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230124083342.34869-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2023-01-25 12:39:13 +00:00
Krzysztof Kozlowski
2fd92c7b8f spi: dt-bindings: Drop Pratyush Yadav
Emails to Pratyush Yadav bounce ("550 Invalid recipient").  Generic SPI
properties should be maintained by subsystem maintainer (Mark).  Add
recent contributor Vaishnav Achath to the Cadence SPI bindings.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220811063826.7620-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
2022-08-11 18:41:45 +01:00
Linus Torvalds
282aa44c21 Merge tag 'spi-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
 "This has mostly been a quiet release for the SPI subsystem, almost all
  cleanups and fixes to existing drivers.

  A couple of changes that stand out:

   - Cleanups and support for version specific features in the
     DesignWare controller.

   - Removal of support for Netlogic devices from the XLP driver, the
     platform had previously been removed by MIPS so the support
     couldn't be used.

   - Conversion of several DT bindings to YAML format"

* tag 'spi-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (53 commits)
  spi: don't include ptp_clock_kernel.h in spi.h
  spi: spi-meson-spifc: Add missing pm_runtime_disable() in meson_spifc_probe
  spi: atmel: Fix typo
  spi: dt-bindings: mediatek,spi-mtk-nor: Fix example 'interrupts' property
  spi: qcom: geni: handle timeout for gpi mode
  spi: qcom: geni: set the error code for gpi transfer
  spi: spi-mux: Add reference to spi-peripheral-props.yaml schema
  spi: ar934x: fix transfer size
  spi: pxa2xx: Propagate firmware node
  spi: dw: Propagate firmware node
  spi: dln2: Propagate firmware node
  spi: ar934x: fix transfer and word delays
  spi: uniphier: Fix a bug that doesn't point to private data correctly
  spi: spi-mtk-nor: add new clock name 'axi' for spi nor
  spi: atmel,quadspi: Define sama7g5 QSPI
  spi: atmel,quadspi: Convert to json-schema
  spi: Fix incorrect cs_setup delay handling
  dt-bindings: mtd: spi-nor: Add a reference to spi-peripheral-props.yaml
  spi: dt-bindings: cdns,qspi-nor: Move peripheral-specific properties out
  spi: dt-bindings: add schema listing peripheral-specific properties
  ...
2022-01-11 12:19:47 -08:00
Dinh Nguyen
f34e8875ae dt-bindings: spi: cadence-quadspi: document "intel,socfpga-qspi"
The QSPI controller on Intel's SoCFPGA platform does not implement the
CQSPI_REG_WR_COMPLETION_CTRL register, thus a write to this register
results in a crash.

Introduce the dts compatible "intel,socfpga-qspi" to differentiate the
hardware.

Acked-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v3: revert to "intel,socfpga-qspi"
v2: change binding to "cdns,qspi-nor-0010" to be more generic for other
    platforms
2021-12-27 04:20:05 -06:00
Pratyush Yadav
b6bdc6e043 spi: dt-bindings: cdns,qspi-nor: Move peripheral-specific properties out
The spi-peripheral-props.yaml schema contains peripheral-specific
properties for SPI controllers that should be present in the peripheral
node. Move peripheral-specific properties to a separate file and refer
to it in spi-peripheral-props.yaml.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211109181911.2251-3-p.yadav@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-12-01 14:15:46 +00:00
Sai Krishna Potthuri
8db76cfae1 dt-bindings: spi: cadence-quadspi: Add support for Xilinx Versal OSPI
Add new compatible to support Cadence Octal SPI(OSPI) controller on
Xilinx Versal SoCs, also add power-domains property to the properties
list and marked as required for Xilinx Versal OSPI compatible.

Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Link: https://lore.kernel.org/r/1632478031-12242-3-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-10-01 20:50:50 +01:00
Ramuthevar Vadivel Murugan
e54338004c spi: Convert cadence-quadspi.txt to cadence-quadspi.yaml
There is no way as of now to have a parent or bus defining properties
for child nodes. For now, avoid it in the example to silence warnings on
dt_schema_check. We can figure out how to deal with actual dts files
later.

[p.yadav@ti.com: Fix how compatible is defined, make reset optional, fix
minor typos, remove subnode properties in example, update commit
message.]

Signed-off-by: Ramuthevar Vadivel Murugan <vadivel.muruganx.ramuthevar@linux.intel.com>
Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210326130034.15231-5-p.yadav@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-04-01 08:31:53 +01:00