Biju Das
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078a5babf2
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dt-bindings: timer: renesas,rz-mtu3: Document RZ/{G2UL,Five} SoCs
Add MTU3a binding documentation for Renesas RZ/{G2UL,Five} SoCs.
MTU3a block is identical to one found on RZ/G2L, so no driver changes are
required. The fallback compatible string "renesas,rz-mtu3" will be used
on RZ/{G2UL,Five}.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230727081848.100834-4-biju.das.jz@bp.renesas.com
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2023-10-11 09:03:55 +02:00 |
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Biju Das
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b121e7881b
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dt-bindings: timer: renesas,rz-mtu3: Improve documentation
Fix the documentation issues pointed by Pavel while backporting
it to 6.1.y-cip.
- Replace '32- bit'->'32-bit'
- Consistently remove '.' at the end of line for the specifications
- Replace ' (excluding MTU8)'-> '(excluding MTU8)'
Reported-by: Pavel Machek <pavel@denx.de>
Closes: https://lore.kernel.org/all/ZH79%2FUjgYg+0Ruiu@duo.ucw.cz
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230727081848.100834-3-biju.das.jz@bp.renesas.com
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2023-10-11 09:03:54 +02:00 |
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Biju Das
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b7a8f1f7a8
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dt-bindings: timer: renesas,rz-mtu3: Fix overflow/underflow interrupt names
As per R01UH0914EJ0130 Rev.1.30 HW manual the MTU3 overflow/underflow
interrupt names starts with 'tci' instead of 'tgi'.
Fix this documentation issue by replacing below overflow/underflow
interrupt names:
- tgiv0->tciv0
- tgiv1->tciv1
- tgiu1->tciu1
- tgiv2->tciv2
- tgiu2->tciu2
- tgiv3->tciv3
- tgiv4->tciv4
- tgiv6->tciv6
- tgiv7->tciv7
- tgiv8->tciv8
- tgiu8->tciu8
Fixes: 0a9d6b5429 ("dt-bindings: timer: Document RZ/G2L MTU3a bindings")
Cc: stable@kernel.org
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20230727081848.100834-2-biju.das.jz@bp.renesas.com
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2023-10-11 09:03:54 +02:00 |
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Biju Das
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0a9d6b5429
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dt-bindings: timer: Document RZ/G2L MTU3a bindings
The RZ/G2L multi-function timer pulse unit 3 (MTU3a) is embedded in
the Renesas RZ/G2L family SoC's. It consists of eight 16-bit timer
channels and one 32-bit timer channel. It supports the following
functions
- Counter
- Timer
- PWM
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20230330111632.169434-2-biju.das.jz@bp.renesas.com
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2023-04-26 11:40:34 +01:00 |
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