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29 Commits

Author SHA1 Message Date
Rob Herring
96fd598e9c arm: dts: Fix dtc interrupt_provider warnings 
The dtc interrupt_provider warning is off by default. Fix all the warnings
so it can be enabled.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Reviewed-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> #Broadcom
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20240213-arm-dt-cleanups-v1-2-f2dee1292525@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2024-02-20 21:47:41 +01:00
Lukas Wunner
8412c47d68 ARM: dts: Fix TPM schema violations 
Since commit 26c9d152eb ("dt-bindings: tpm: Consolidate TCG TIS
bindings"), several issues are reported by "make dtbs_check" for ARM
devicetrees:

The nodename needs to be "tpm@0" rather than "tpmdev@0" and the
compatible property needs to contain the chip's name in addition to the
generic "tcg,tpm_tis-spi" or "tcg,tpm-tis-i2c":

  tpmdev@0: $nodename:0: 'tpmdev@0' does not match '^tpm(@[0-9a-f]+)?$'
        from schema $id: http://devicetree.org/schemas/tpm/tcg,tpm_tis-spi.yaml#

  tpm@2e: compatible: 'oneOf' conditional failed, one must be fixed:
        ['tcg,tpm-tis-i2c'] is too short
        from schema $id: http://devicetree.org/schemas/tpm/tcg,tpm-tis-i2c.yaml#

Fix these schema violations.

Aspeed Facebook BMCs use an Infineon SLB9670:
https://lore.kernel.org/all/ZZSmMJ%2F%2Fl972Qbxu@fedora/
https://lore.kernel.org/all/ZZT4%2Fw2eVzMhtsPx@fedora/
https://lore.kernel.org/all/ZZTS0p1hdAchIbKp@heinlein.vulture-banana.ts.net/

Aspeed Tacoma uses a Nuvoton NPCT75X per commit 39d8a73c53 ("ARM: dts:
aspeed: tacoma: Add TPM").

phyGATE-Tauri uses an Infineon SLB9670:
https://lore.kernel.org/all/ab45c82485fa272f74adf560cbb58ee60cc42689.camel@phytec.de/

A single schema violation remains in am335x-moxa-uc-2100-common.dtsi
because it is unknown which chip is used on the board.  The devicetree's
author has been asked for clarification but has not responded so far:
https://lore.kernel.org/all/20231220090910.GA32182@wunner.de/

Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Bruno Thomsen <bruno.thomsen@gmail.com>
 2024-01-25 18:09:51 +01:00
Chanh Nguyen
d024ca2792 ARM: dts: aspeed: mtmitchell: Add I2C NVMe alias port 
Adds the I2C alias ports to each NVMe drive via the
backplane card.

Besides that, it also adds the eeprom and temperature sensor
on the backplane card.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-8-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-10-13 14:59:03 +10:30
Chanh Nguyen
8098d06af1 ARM: dts: aspeed: mtmitchell: Remove redundant ADC configurations 
Mt.Mitchell DVT and later hardware do not use adc1. It only uses
adc0 with channels 0, 1 and 2. This commit removes redundant ADC
configurations.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-7-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-10-13 14:59:03 +10:30
Chanh Nguyen
e998856086 ARM: dts: aspeed: mtmitchell: Add inlet temperature sensor 
Add the inlet temperature at address 0x48, which is connected
via BMC I2C8.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-6-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-10-13 14:59:03 +10:30
Chanh Nguyen
1edcc7251f ARM: dts: aspeed: mtjade: Add the gpio-hog 
Add the GPIOR5 as a gpio-hog with output high so that can
power the OCP card once the BMC booting.

Add the GPIOAC5 as a gpio-hog with output high to notice
the BMC state.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-4-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-10-13 14:59:03 +10:30
Chanh Nguyen
e71d1a9255 ARM: dts: aspeed: mtjade, mtmitchell: Add new gpio-line-names 
Add new gpio-line-names from the Mt.Jade and Mt.Mitchell
HW schematic.

Mt.Jade
  GPIOB5: presence-cpu0
  GPIOF0: ps0-pgood
  GPIOF1: ps1-pgood
  GPIOG2: host0-shd-ack-n
  GPIOH0: uart1-mode1
  GPIOH1: uart2-mode1
  GPIOH2: uart3-mode1
  GPIOH3: uart4-mode1
  GPIOH7: i2c6-reset-n
  GPIOH3: host0-reboot-ack-n
  GPIOM4: s0-i2c9-alert-n
  GPIOM5: s1-i2c9-alert-n
  GPIOQ6: led-identify
  GPIOS0: s0-vr-hot-n
  GPIOS1: s1-vr-hot-n
  GPIOS5: vr-pmbus-sel-n
  GPIOY3: bmc-vga-en-n
  GPIOZ3: s0-rtc-lock
  GPIOAC2: spi0-program-sel
  GPIOAC3: spi0-backup-sel

Mt.Mitchell:
  GPIOC3: bmc-debug-mode
  GPIOE1: eth-phy-int-n
  GPIOH0: jtag-program-sel
  GPIOH1: fpga-program-b
  GPIOW3: s1-pcp-pgood

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-3-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-10-13 14:59:03 +10:30
Chanh Nguyen
081404fe01 ARM: dts: aspeed: mtjade, mtmitchell: Update gpio-line-names 
Update GPIO line-name to follow naming convention specified at
github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-2-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-10-13 14:59:03 +10:30
Yang Chen
fe93af8652 ARM: dts: aspeed: Minerva: Add Facebook Minerva CMC board 
Add linux device tree entry related to the Minerva Chassis Management
Controller (CMC) specific devices connected to the Aspeed SoC (AST2600).

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20230914125648.3966519-3-yangchen.openbmc@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-10-13 14:59:03 +10:30
Eddie James
d2f6fc54fc ARM: dts: aspeed: bonnell: Add reserved memory for TPM event log 
Trusted boot support requires the platform event log passed up
from the bootloader. In U-Boot, this can now be accomplished with
a reserved memory region, so add a region for this purpose to the
Bonnell BMC devicetree.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20230616142610.356623-1-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-09-22 15:08:23 +09:30
Geert Uytterhoeven
4b46d86c97 ARM: dts: aspeed: Fix pca954x i2c-mux node names 
"make dtbs_check":

    arch/arm/boot/dts/aspeed-bmc-bytedance-g220a.dtb: i2c-switch@70: $nodename:0: 'i2c-switch@70' does not match '^(i2c-?)?mux'
	    From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
    arm/boot/dts/aspeed-bmc-bytedance-g220a.dtb: i2c-switch@70: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'i2c@0', 'i2c@1', 'i2c@2', 'i2c@3' were unexpected)
	    From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
    ...

Fix this by renaming PCA954x nodes to "i2c-mux", to match the I2C bus
multiplexer/switch DT bindings and the Generic Names Recommendation in
the Devicetree Specification.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2023-08-12 14:11:04 +02:00
Dylan Hung
32b7343226 ARM: dts: aspeed: Add AST2600 I3C control pins 
Add pinctrl support for the I3C1 and I3C2 pins.

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Jeremy Kerr <jk@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20230809134413.3614535-1-dylan_hung@aspeedtech.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-08-10 21:39:42 +09:30
Joel Stanley
7f2938d250 ARM: dts: aspeed: everest: Move common devices up 
Other systems have the SoC devices listed before the FSI description.
Move them up in order to make them similar.

Link: https://lore.kernel.org/r/20230809074921.116987-6-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-08-10 21:33:54 +09:30
Eddie James
f0eb62ece2 ARM: dts: aspeed: everest: Reorganise FSI description 
Use the P10 quad FSI CFAM description to reduce duplication and add the
I2C responders and associated engines.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20230809074921.116987-5-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-08-10 21:33:54 +09:30
Joel Stanley
71354f7702 ARM: dts: aspeed: rainier: Reorganise FSI description 
Use the P10 quad FSI CFAM description to reduce duplication.

Link: https://lore.kernel.org/r/20230809074921.116987-4-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-08-10 21:33:53 +09:30
Joel Stanley
f868aab874 ARM: dts: aspeed: bonnell: Reorganise FSI description 
Use the P10 dual FSI CFAM description to reduce duplication.

Link: https://lore.kernel.org/r/20230809074921.116987-3-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-08-10 21:33:53 +09:30
Eddie James
fa9d3b8be2 ARM: dts: aspeed: Add P10 FSI descriptions 
These will be used by BMCs attached to a IBM Power10 server CPU.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20230809074921.116987-2-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-08-10 21:33:53 +09:30
Delphine CC Chiu
2b8d94f4b4 ARM: dts: aspeed: yosemite4: add Facebook Yosemite 4 BMC 
Add linux device tree entry for Yosemite 4 devices connected to BMC.
The Yosemite 4 is a Meta multi-node server platform, based on AST2600 SoC.

Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20230810070032.335161-3-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-08-10 21:33:53 +09:30
Tao Ren
8dc783d9e2 ARM: dts: aspeed: wedge400: Set eMMC max frequency 
Set eMMC max frequency to 25MHz to prevent intermittent eMMC access
failures.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20230803230324.731268-4-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-08-10 21:33:53 +09:30
Tao Ren
2901b71c0c ARM: dts: aspeed: wedge400: Enable more ADC channels 
Enable ASPEED-ADC channels 5-8 to support voltage monitoring of all the
Wedge400 hardware revisions.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20230803230324.731268-3-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-08-10 21:33:53 +09:30
Tao Ren
285396979f ARM: dts: aspeed: Update spi alias in Facebook AST2500 Common dtsi 
Set FMC controller to "spi0" in ast2500-facebook-netbmc-common.dtsi so
the spi bus is consistent with the flash labels defined in flash layout.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20230803230324.731268-2-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-08-10 21:33:53 +09:30
Lakshmi Yadlapati
bca5bf0eca ARM: dts: aspeed: rainier: Remove TPM device 
TPM is disabled in Rainier, remove TPM device.

Signed-off-by: Lakshmi Yadlapati <lakshmiy@us.ibm.com>
Link: https://lore.kernel.org/r/20230725141606.1641080-2-lakshmiy@us.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-08-10 21:33:53 +09:30
Joel Stanley
dda28c0952 ARM: dts: aspeed: Add AST2600 VUARTs 
The AST2600 has two more vuarts, placed between the existing two in the
memory map.

Link: https://lore.kernel.org/r/20230620042257.73665-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-08-10 21:33:53 +09:30
Chanh Nguyen
962047a354 ARM: dts: aspeed: mtmitchell: Add MCTP 
Enable MCTP driver on I2C3 bus for MCTP transaction

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20230620092537.20007-4-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-08-10 21:33:53 +09:30
Chanh Nguyen
acde9078d9 ARM: dts: aspeed: mtmitchell: Update ADC sensors for Mt.Mitchell DVT systems 
Change to use I2C ADC controller (ltc2497) for Mt.Mitchell DVT and
later hardware.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20230620092537.20007-3-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-08-10 21:33:53 +09:30
Chanh Nguyen
d50b1baf4f ARM: dts: aspeed: mtmitchell: Enable the BMC UART8 and UART9 
The BMC UART8 and UART9 were connected to the Secpro and Mpro console
of socket S1 on the Mt.Mitchell system.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20230620092537.20007-2-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-08-10 21:33:52 +09:30
Chen PJ
3f2879e404 ARM: dts: aspeed: Adding Inventec Starscream BMC 
Initial introduction of Inventec Starscream x86 family
equipped with AST2600 BMC SoC.

Signed-off-by: Chen PJ <Chen.pj@inventec.com>
Link: https://lore.kernel.org/r/20230703060222.24263-2-chen.pj@inventec.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-07-10 13:44:20 +09:30
Eddie James
267c95dc9f ARM: dts: aspeed: bonnell: Add DIMM SPD 
Add the DIMM SPD to the processor I2C busses.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20230322140348.569397-5-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
 2023-07-10 13:41:38 +09:30
Rob Herring
724ba67515 ARM: dts: Move .dts files to vendor sub-directories 
The arm dts directory has grown to 1559 boards which makes it a bit
unwieldy to maintain and use. Past attempts stalled out due to plans to
move .dts files out of the kernel tree. Doing that is no longer planned
(any time soon at least), so let's go ahead and group .dts files by
vendors. This move aligns arm with arm64 .dts file structure.

There's no change to dtbs_install as the flat structure is maintained on
install.

The naming of vendor directories is roughly in this order of preference:
- Matching original and current SoC vendor prefix/name (e.g. ti, qcom)
- Current vendor prefix/name if still actively sold (SoCs which have
  been aquired) (e.g. nxp/imx)
- Existing platform name for older platforms not sold/maintained by any
  company (e.g. gemini, nspire)

The whole move was scripted with the exception of MAINTAINERS and a few
makefile fixups.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Paul Barker <paul.barker@sancloud.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Nick Hawkins <nick.hawkins@hpe.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Peter Rosin <peda@axentia.se>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Patrice Chotard <patrice.chotard@foss.st.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
 2023-06-21 11:39:50 -06:00