As part of general housekeeping, change the defconfig files to
sort lines based on the 'make savedefconfig' output, to make
it easier to do additional changes on top.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
A lot of Kconfig options have changed over the years, and we tend
to not do a blind 'make defconfig' to refresh the files, to ensure
we catch options that should not have gone away.
I used some a bit of scripting to only rework the bits where an
option moved around in any of the defconfig files, without also
dropping any of the other lines, to make it clearer which options
we no longer have.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
It doesn't actually do anything. Merge its help text into
EXTRA_FIRMWARE.
Fixes: 5620a0d1aa ("firmware: delete in-kernel firmware")
Fixes: 0946b2fb38 ("firmware: cleanup FIRMWARE_IN_KERNEL message")
Signed-off-by: Benjamin Gilbert <benjamin.gilbert@coreos.com>
Signed-off-by: Robin H. Johnson <robbat2@gentoo.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Enable EXT4_FS to have rootfs in EXT[2-4].
Other changes are result of savedefconfig keeping minimal config (even
without enabling EXT4_FS, these would be present).
Signed-off-by: afzal mohammed <afzal.mohd.ma@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add defconfig for Linux on Vybrid (vf610) on the secondary Cortex-
M4 CPU. The use of a XIP image has been tested which needs to be
loaded (e.g. using the custom m4boot loader) to the end of the
available RAM at address 0x8f000000. The Cortex-M4 has a code-alias
which makes sure that the instructions get fetched through the code
bus (alias starts at 0x00800000 => 0x80800000 in system address).
Hence, to get optimal performance, use 0x0f000000 as XIP_PHYS_ADDR.
This address is additionally shifted by the length of the minimal
loader which is inserted by m4boot. Currently, this offset is 0x80.
The standard DRAM base address is configured to 0x8C000000, which
gives the Cortex-M4 48MiB of RAM.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
