altr,dw-mshc-ciu-div and altr,dw-mshc-sdr-timing are neither documented
nor used by Linux, so remove them to fix dtbs_check warnings like:
socfpga_stratix10_swvp.dtb: mmc@ff808000: Unevaluated properties are not allowed
('altr,dw-mshc-ciu-div', 'altr,dw-mshc-sdr-timing' were unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Bindings expect NAND child node name to match certain patterns:
socfpga_agilex_socdk_nand.dtb: nand-controller@ffb90000: Unevaluated properties are not allowed ('flash@0' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The "soc" node has ranges with addresses, so it is should have unit
address to fix dtc W=1 warnings like:
socfpga_stratix10.dtsi:128.6-636.4: Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The "soc" node is supposed to have only MMIO children, so move the
firmware/svc node to top level to fix dtc W=1 warnings like:
socfpga_stratix10.dtsi:625.12-635.5: Warning (simple_bus_reg): /soc@0/firmware: missing or empty reg/ranges property
The node should still be instantiated by drivers/of/platform.c, just
like in all other platforms.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The "soc" node is supposed to have only MMIO children, so move the FPGA
region node to top level to fix dtc W=1 warnings like:
socfpga_stratix10.dtsi:136.20-141.5: Warning (simple_bus_reg): /soc@0/base_fpga_region: missing or empty reg/ranges property
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
pinctrl-single bindings require pin configuration node names to match
certain patterns:
socfpga_stratix10_socdk.dtb: pinctrl@ffd13000: 'i2c1-pmx-func', 'i2c1-pmx-func-gpio'
do not match any of the regexes: '-pins(-[0-9]+)?$|-pin$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The DWC2 USB bindings require clock-names property, to provide such to
fix warnings like:
socfpga_stratix10_swvp.dtb: usb@ffb40000: 'clock-names' is a required property
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
cdns,page-size and cdns,block-size are neither documented nor used by
Linux, so remove them to fix dtbs_check warnings like:
socfpga_n5x_socdk.dtb: flash@0: Unevaluated properties are not allowed ('cdns,block-size', 'cdns,page-size' were unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Pull ARM devicetree updates from Arnd Bergmann:
"These are the devicetree updates for Arm and RISC-V based SoCs, mainly
from Qualcomm, NXP/Freescale, Aspeed, TI, Rockchips, Samsung, ST and
Starfive.
Only a few new SoC got added:
- TI AM62P5, a variant of the existing Sitara AM62x family
- Intel Agilex5, an FPGFA platform that includes an Cortex-A76/A55
SoC.
- Qualcomm ipq5018 is used in wireless access points
- Qualcomm SM4450 (Snapdragon 4 Gen 2) is a new low-end mobile phone
platform.
In total, 29 machines get added, which is low because of the summer
break. These cover SoCs from Aspeed, Broadcom, NXP, Samsung, ST,
Allwinner, Amlogic, Intel, Qualcomm, Rockchip, TI and T-Head. Most of
these are development and reference boards.
Despite not adding a lot of new machines, there are over 700 patches
in total, most of which are cleanups and minor fixes"
* tag 'soc-dt-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (735 commits)
arm64: dts: use capital "OR" for multiple licenses in SPDX
ARM: dts: use capital "OR" for multiple licenses in SPDX
arm64: dts: qcom: sdm845-db845c: Mark cont splash memory region as reserved
ARM: dts: qcom: apq8064: add support to gsbi4 uart
riscv: dts: change TH1520 files to dual license
riscv: dts: thead: add BeagleV Ahead board device tree
dt-bindings: riscv: Add BeagleV Ahead board compatibles
ARM: dts: stm32: add SCMI PMIC regulators on stm32mp135f-dk board
ARM: dts: stm32: STM32MP13x SoC exposes SCMI regulators
dt-bindings: rcc: stm32: add STM32MP13 SCMI regulators IDs
ARM: dts: stm32: support display on stm32f746-disco board
ARM: dts: stm32: rename mmc_vcard to vcc-3v3 on stm32f746-disco
ARM: dts: stm32: add pin map for LTDC on stm32f7
ARM: dts: stm32: add ltdc support on stm32f746 MCU
arm64: dts: qcom: sm6350: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sdm670: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sa8775p: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sc8280xp: Hook up PDC as wakeup-parent of TLMM
arm64: dts: qcom: sdm670: Add PDC
riscv: dts: starfive: fix jh7110 qspi sort order
...
The "stmmaceth-ocp" reset line on the SoCFPGA stmmac ethernet driver is
the same as the "ahb" reset on a standard stmmac ethernet.
commit ("843f603762a5 dt-bindings: net: snps,dwmac: Add 'ahb'
reset/reset-name") documented the second reset signal as 'ahb' instead
of 'stmmaceth-ocp'. Change the reset-names of the SoCFPGA DWMAC driver to
'ahb'. In order not to break ABI, we will keep support in thedwmac-socfpga
driver to still make use of "stmmaceth-ocp".
This also fixes the dtbs_check warning:
ethernet@ff802000: reset-names:1: 'ahb' was expected
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: update commit message to further describe the reason for the change
The correct dts property for the SCL falling time is
"i2c-scl-falling-time-ns".
Fixes: c8da1d15b8 ("arm64: dts: stratix10: i2c clock running out of spec")
Cc: stable@vger.kernel.org
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Non-UBIFS related boot and fpga data should be stored in qspi_boot (mtd0)
while keeping the rootfs with UBIFS in the root partition "mtd1".
Thus, update the QSPI flash layout to support UBIFS in the mtd root
partition.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@intel.com>
Signed-off-by: Kah Jing Lee <kah.jing.lee@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Although, we expect the bootloader to full memory details but passing empty
values can give warning, so add a default value.
memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 0, 0, 0]]}
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
sram@ffe00000: 'ranges' is a required property
sram@ffe00000: '#size-cells' is a required property
sram@ffe00000: '#address-cells' is a required property
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Add the I2C pins definition to the Stratix10 devkit. This allows for the
I2C driver to use pinctrl on the pins to allow for GPIO recovery.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: remove underscores in node names
The Stratix10/Agilex has a pin control IP that can make use of the
pinctrl-single driver.
Add the pinctrl-single dts property for the Stratix10/Agilex
platforms.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: no changes
The node names should be generic and DT schema expects certain pattern:
altera/socfpga_stratix10_socdk.dtb: leds: 'hps0', 'hps1', 'hps2' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The sdmmc controller's CIU(Card Interface Unit) clock's phase can be
adjusted through the register in the system manager. Add the binding
"altr,sysmgr-syscon" to the SDMMC node for the driver to access the
system manager. Add the "clk-phase-sd-hs" property in the SDMMC node to
designate the smpsel and drvsel properties for the CIU clock.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The clocks are not part of the SoC but provided on the board
(external oscillators). Moving them out of soc node.
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Fix whitespace coding style: use single space instead of tabs or
multiple spaces around '=' sign in property assignment. No functional
changes (same DTB).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The pl330 DMA controller provides number of DMA channels and requests
through its registers, so duplicating this information (with a chance of
mistakes) in DTS is pointless. Additionally the DTS used always wrong
property names which causes DT schema check failures - the bindings
documented 'dma-channels' and 'dma-requests' properties without leading
hash sign.
Reported-by: Rob Herring <robh@kernel.org>
Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220430121902.59895-4-krzysztof.kozlowski@linaro.org
USB DWC2 requires clock-names:
arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dt.yaml:
usb@ffb00000: 'clock-names' is a required property
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Fixes dtbs_check warnings like:
pdma@ffda0000: $nodename:0: 'pdma@ffda0000' does not match '^dma-controller(@.*)?$'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The devicetree specification requires that node name should be generic.
The dtschema complains if name does not match pattern, so make the
0.33 V regulator node name more generic.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The Synopsys DW MSHC bindings require node name to be 'mmc':
dwmmc0@ff808000: $nodename:0: 'dwmmc0@ff808000' does not match '^mmc(@.*)?$'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The ARM timer is usually considered not part of SoC node, just like
other ARM designed blocks (PMU, PSCI). This fixes dtbs_check warning:
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dt.yaml: soc: timer:
{'compatible': ['arm,armv8-timer'], 'interrupts': [[1, 13, 3848], [1, 14, 3848], [1, 11, 3848], [1, 10, 3848]]} should not be valid under {'type': 'object'}
From schema: dtschema/schemas/simple-bus.yaml
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The Altera SoCFPGA Stratix 10 SoC Development Kit is a board with
Stratix 10, so it needs its own compatible.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Pull ARM SoC devicetree updates from Arnd Bergmann:
"As usual, this is the bulk of the updates for the SoC tree, adding
more devices to existing files, addressing issues from ever improving
automated checking, and fixing minor issues.
The most interesting bits as usual are the new platforms. All the
newly supported SoCs belong into existing families this time:
- Qualcomm gets support for two newly announced platforms, both of
which can now work in production environments: the SDX65 5G modem
that can run a minimal Linux on its Cortex-A7 core, and the
Snapdragon 8 Gen 1, their latest high-end phone SoC.
- Renesas adds support for R-Car S4-8, the most recent automotive
Server/Communication SoC.
- TI adds support for J721s2, a new automotive SoC in the K3 family.
- Mediatek MT7986a/b is a SoC used in Wifi routers, the latest
generation following their popular MT76xx series. Only basic
support is added for now.
- NXP i.MX8 ULP8 is a new low-power variant of the widespread i.MX8
series.
- TI SPEAr320s is a minor variant of the old SPEAr320 SoC that we
have supported for a long time.
New boards with the existing SoCs include
- Aspeed AST2500/AST2600 BMCs in TYAN, Facebook and Yadro servers
- AT91/SAMA5 based evaluation board
- NXP gains twenty new development and industrial boards for their
i.MX and Layerscape SoCs
- Intel IXP4xx now supports the final two machines in device tree
that were previously only supported in old style board files.
- Mediatek MT6589 is used in the Fairphone FP1 phone from 2013, while
MT8183 is used in the Acer Chromebook 314.
- Qualcomm gains support for the reference machines using the two new
SoCs, plus a number of Chromebook variants and phones based on the
Snapdragon 7c, 845 and 888 SoCs, including various Sony Xperia
devices and the Microsoft Surface Duo 2.
- ST STM32 now supports the Engicam i.Core STM32MP1 carrier board.
- Tegra now boots various older Android devices based on 32-bit chips
out of the box, including a number of ASUS Transformer tablets.
There is also a new Jetson AGX Orin developer kit.
- Apple support adds the missing device trees for all the remaining
M1 Macbook and iMac variants, though not yet the M1 Pro/Max
versions.
- Allwinner now supports another version of the Tanix TX6 set-top box
based on the H6 SoC.
- Broadcom gains support for the Netgear RAXE500 Wireless router
based on BCM4908"
* tag 'dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (574 commits)
Revert "ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U"
arm64: dts: qcom: sm6125: Avoid using missing SM6125_VDDCX
arm64: dts: qcom: sm8450-qrd: Enable USB nodes
arm64: dts: qcom: sm8450: Add usb nodes
ARM: dts: aspeed: add LCLK setting into LPC KCS nodes
dt-bindings: ipmi: bt-bmc: add 'clocks' as a required property
ARM: dts: aspeed: add LCLK setting into LPC IBT node
ARM: dts: aspeed: p10: Add TPM device
ARM: dts: aspeed: p10: Enable USB host ports
ARM: dts: aspeed: Add TYAN S8036 BMC machine
ARM: dts: aspeed: tyan-s7106: Add uart_routing and fix vuart config
ARM: dts: aspeed: Adding Facebook Bletchley BMC
ARM: dts: aspeed: g220a: Enable secondary flash
ARM: dts: Add openbmc-flash-layout-64-alt.dtsi
ARM: dts: aspeed: Add secure boot controller node
dt-bindings: aspeed: Add Secure Boot Controller bindings
ARM: dts: Remove "spidev" nodes
dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
dt-bindings: arm: samsung: Document E850-96 board binding
dt-bindings: Add vendor prefix for WinLink
...
Because of commit 9cb2ff1117 ("spi: cadence-quadspi: Disable Auto-HW polling"),
which does a write to the CQSPI_REG_WR_COMPLETION_CTRL register
regardless of any condition. Well, the Cadence QuadSPI controller on
Intel's SoCFPGA platforms does not implement the
CQSPI_REG_WR_COMPLETION_CTRL register, thus a write to this register
results in a crash!
So starting with v5.16, I introduced the patch
98d948eb83 ("spi: cadence-quadspi: fix write completion support"),
which adds the dts compatible "intel,socfpga-qspi" that is specific for
versions that doesn't have the CQSPI_REG_WR_COMPLETION_CTRL register implemented.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v3: revert back to "intel,socfpga-qspi"
v2: use both "cdns,qspi-nor" and "cdns,qspi-nor-0010"
Change NAND flash MTD partition in device tree after implementation of
UBI and UBIFS. "u-boot" partition remain for raw u-boot image, but "root"
partition is use for UBI image containing all other components.
Signed-off-by: Sin Hui Kho <sin.hui.kho@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only
one for both of them. This the common practice for other platforms.
Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come
from multiple vendors.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
This is to remove similar errors as below:
OF: /.../gpio-port@0: could not find phandle
Commit 7569486d79 ("gpio: dwapb: Add ngpios DT-property support")
explained the reason of above errors well and added the generic
"ngpios" property, let's use it.
Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The QSPI flash node needs to have the required "jedec,spi-nor"
in the compatible string.
Fixes: 0cb140d07f ("arm64: dts: stratix10: Add QSPI support for Stratix10")
Cc: stable@vger.kernel.org
Suggested-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Pull ARM SoC DT updates from Arnd Bergmann:
"As usual, there are many patches addressing minor issues in existing
DTS files, such as DTC warnings, or adding support for additional
peripherals.
There are three added SoCs in existing product families:
- Amazon:
Alpine v3 is a 16-core Cortex-A72 SoC from Amazon's Annapurna Labs,
otherwise known as AL73400 or first-generation Graviton, and
following the already supported Cortex-A1`5 and Cortex-A57 based
Alpine chips. This one is added together with the official
Evaluation platform.
- Qualcomm:
The Snapdragon SDM630 platform is a family of mid-range mobile
phone chips from 2017 based on Cortex-A53 or Kryo 260 CPUs. A total
of five end-user products are added based on these, all Android
phones from Sony: Xperia 10, 10 Plus, XA2, XA2 Plus and XA2 Ultra.
- Renesas:
RZ/G2H (r8a774e1) is currently the top model in the Renesas RZ/G
family, and apparently closely related to the RZ/G2N and RZ/G2M
models we already support but has a faster GPU and additional
on-chip peripherals. It is added along with the HopeRun HiHope
RZ/G2H development board
A small number of new boards for already supported SoCs also debut:
- Allwinner sunxi:
Only one new machine, revision v1.2 of the Pine64 PinePhone
(non-Android) smartphone, containing minor changes compared to
earlier versions.
- Amlogic Meson:
WeTek Core2 is an Amlogic S912 (GXM) based Set-top-box
- Aspeed:
EthanolX is AMD's EPYC data center rerence platform, using an
ASpeed AST2600 baseboard management controller.
- Mediatek:
Lenovo IdeaPad Duet 10.1" (kukui/krane) is a new Chromebook based
on the MT8183 (Helio P60t) SoC.
- Nvidia Tegra:
ASUS Google Nexus 7 and Acer Iconia Tab A500 are two Android
tablets from around 2012 using Tegra 3 and Tegra 2, respectively.
Thanks to PostmarketOS, these can now run mainline kernels and
become useful again.
The Jetson Xavier NX Developer Kit uses a SoM and carrier board for
the Tegra194, their latest 64-bit chip based on Carmel CPU cores
and Volta graphics.
- NXP i.MX:
Five new boards based on the 32-bit i.MX6 series are added: The
MYiR MYS-6ULX single-board computer, and four different models of
industrial computers from Protonic.
- Qualcomm:
MikroTik RouterBoard 3011 is a rackmounted router based on the
32-bit IPQ8064 networking SoC
Three older phones get added, the Snapdragon 808 (msm8992) based
Xiaomi Libra (Mi 4C) and Microsoft Lumia 950, originally running
Windows Phone, and the Snapdragon 810 (msm8994) based Sony Xperia
Z5.
- Renesas:
In addition to the HiHope RZ/G2H board mentioned above, we gain
support for board versions 3.0 and 4.0 of the earlier RZ/G2M and
RZ/G2N reference boards. Beacon EmbeddedWorks adds another
SoM+Carrier development board for RZ/G2M.
- Rockchips:
Radxa Rock Pi N8 development board and the VMARC RK3288 SoM it is
based on, using the high-end 32-bit rk3288 SoC.
Notable updates to existing platforms are usually for added on-chip
peripherals, including:
- ASpeed AST2xxx (various)
- Allwinner (cpufreq, thermal, Pinephone touchscreen)
- Amlogic Meson (audio, gpu dvdfs, board updates)
- Arm Versatile
- Broadcom (board updates for switch ports, Raspberry pi clock updates)
- Hisilicon (various)
- Intel/Altera SoCFPGA (various)
- Marvell Armada 7xxx/8xxx (smmu)
- Marvell MMP (GPU on mmp2/mmp3)
- Mediatek mt8183 (USB, pericfg)
- NXP Layerscape (VPU, thermal, DSPI)
- NXP i.MX (VPU, bindings, board updates)
- Nvidia Tegra194 (GPU)
- Qualcomm (GPU, Interconnect, ...)
- Renesas R-Car (SPI, IPMMU, board updates)
- STMicroelectronics STM32 (various)
- Samsung Exynos (various)
- Socionext Uniphier (updates to serial, and pcie)
- TI K3 (serdes, usb3, audio, sd, chipid)
- TI OMAP (IPU/DSP remoteproc changes, dropping platform data)"
* tag 'arm-dt-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (605 commits)
arm64: dts: meson: odroid-n2: add jack audio output support
arm64: dts: meson: odroid-n2: enable audio loopback
ARM: dts: berlin: Align L2 cache-controller nodename with dtschema
arm64: dts: qcom: Add Microsoft Lumia 950 (Talkman) device tree
arm64: dts: qcom: Add Xiaomi Libra (Mi 4C) device tree
arm64: dts: qcom: msm8992: Add RPMCC node
arm64: dts: qcom: msm8992: Add PSCI support.
arm64: dts: qcom: msm8992: Add PMU node
arm64: dts: qcom: msm8992: Add BLSP2_UART2 and I2C nodes
arm64: dts: qcom: msm8992: Add SPMI PMIC arbiter device
arm64: dts: qcom: msm8992: Add a SCM node
arm64: dts: qcom: msm8992: Add a proper CPU map
arm64: dts: qcom: bullhead: Move UART pinctrl to SoC
arm64: dts: qcom: bullhead: Add qcom,msm-id
arm64: dts: qcom: msm8992: Fix SDHCI1
arm64: dts: qcom: msm8992: Modernize the DTS style
arm64: dts: qcom: Add support for Sony Xperia Z5 (SoMC Sumire-RoW)
arm64: dts: qcom: Move msm8994-smd-rpm contents to lg-bullhead.
arm64: dts: qcom: msm8994: Add support for SMD RPM
arm64: dts: qcom: msm8992: Add a label to rpm-requests
...
Match the QSPI reg address in the socfpga_stratix10_socdk.dts file.
Fixes: 80f132d737 ("arm64: dts: increase the QSPI reg address for Stratix10 and Agilex")
Cc: linux-stable <stable@vger.kernel.org> # >= v5.6
Signed-off-by: Dinh Nguyen <dinh.nguyen@intel.com>
This patch increases the reg addresses for QSPI boot and QSPI rootfs for
Stratix10 and Agilex to cater for the increased size of kernel Image.
Signed-off-by: Joyce Ooi <joyce.ooi@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
The Stratix10 and Agilex devkits support a separate NAND daughter card.
The NAND daughter card replaces the SDMMC slot that is on the default
daughter card thus requires a separate board dts file.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
This patch updates the reg addresses for QSPI boot and QSPI rootfs in
the device tree for Stratix10
Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
