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245 Commits

Author SHA1 Message Date
Michal Simek
237a1bbc32 arm64: zynqmp: Align usb clock nodes with binding 
dwc3-xilinx.yaml defines 2 clocks which are not defined that's why define
them (bus_early clock is moved to bus_clk in glue logic).
With also describing kv260 assigned clock rates with assigned clocks.
Also add missing status property to standard dwc3 core.

Link: https://lore.kernel.org/r/aa4c65a8997c7a65f23da3a3088bb5eb64281307.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
 2024-01-22 14:13:01 +01:00
Michal Simek
672aa9abb6 arm64: zynqmp: Comment all smmu entries 
SMMU is disabled by default and not all masters can be enabled at the same
time because of limited number of entries. That's why comment all iommu
properties but keep them for reference in DT. In XEN case they should be
added back and Xen should have SMMU enabled by default.
Also add IDs for DP and DPDMA.

Link: https://lore.kernel.org/r/bdb012b1c86abb0d9aa88954196d886d1283e9b1.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
 2024-01-22 14:13:00 +01:00
Michal Simek
8258cf0d4a arm64: zynqmp: Rename i2c?-gpio to i2c?-gpio-grp 
Anything ending with gpio/gpios is taken as gpio phande/description which
is reported as the issue coming from gpio-consumer.yaml schema.
That's why rename the gpio suffix to gpio-grp to avoid name collision.

Link: https://lore.kernel.org/r/94f633e26b7b16cabddb8c7210c2e79208c364da.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
 2024-01-22 14:10:10 +01:00
Tejas Bhumkar
ea470fe330 arm64: zynqmp: Disable Tri-state for MIO38 Pin 
gpio38 is used in SOM's kv260 to reset the Ethernet PHY.
At present, HW reset is not working properly as Tri-state 
is enabled for MIO38, causing inappropriate PHY register reads.

Disabled Tri-state for MIO38 to make HW reset work.

Tri-state disable :
ZynqMP> md 0xFF180208 2
ff180208: 00bfe7a3 00000540

Tri-state enable :
ZynqMP> md 0xFF180208 2
ff180208: 00bfe7e3 00000540

Signed-off-by: Tejas Bhumkar <tejas.arvind.bhumkar@amd.com>
Link: https://lore.kernel.org/r/9f8a0687be407a8ffad610087074e94ebc4f5982.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
 2024-01-22 14:10:10 +01:00
Michal Simek
24e85ff034 arm64: zynqmp: Remove incorrect comment from kv260s 
Remove incorrect comment about required nodes by spec. In past gem3 was the
part of SOM specification but it has been revisit by introducting KR260.

Link: https://lore.kernel.org/r/0bd166345ce78097a1ff8d4307545f5026c92267.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
 2024-01-22 14:10:10 +01:00
Michal Simek
2385a6d8ed arm64: zynqmp: Introduce u-boot options node with bootscr-address 
Add u-boot options node with details about bootscr-address.
c&p description from dtschema/schemas/options/u-boot.yaml:

"Holds the full address of the boot script file. It helps in making
automated flow easier by fetching the 64bit address directly from DT.
Value should be automatically copied to the U-Boot 'scriptaddr' variable.
When it is defined, bootscr-ram-offset property should be ignored.
Actually only one of them should be present in the DT."

Address is generic for all zynqmp boards because all of them have DDR
starting from 0. Custom boards should revisit the location and aligned it
based on their needs.

Link: https://lore.kernel.org/r/4f5978d5a26fe0cd0cc6e54a97da1517bb925c01.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
 2024-01-22 14:10:10 +01:00
Michal Simek
97fed7ecbb arm64: zynqmp: Fix comment to be aligned with board name. 
The board was renamed from zc1275 to zcu1275 but name in comment wasn't
updated.

Fixes: 370b0e900f ("arm64: zynqmp: Change zc1275 board name to zcu1275")
Link: https://lore.kernel.org/r/6e4215807f535d2e2b2b8055aa8574c748fe22e4.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
 2024-01-22 14:10:10 +01:00
Thippeswamy Havalige
3473622299 arm64: zynqmp: Update ECAM size to discover up to 256 buses 
Update ECAM size to discover up to 256 buses.

Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Link: https://lore.kernel.org/r/4f7621a790f4aa35b3e7f74683d3ae4ffe820667.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
 2024-01-22 14:10:10 +01:00
Michal Simek
46de36a489 arm64: zynqmp: Describe assigned-clocks for uarts 
Describe assigned-clocks for both uarts. SOM is using this functionality.

Link: https://lore.kernel.org/r/21579f273554a19bc95a40f49956793b5261627f.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
 2024-01-22 14:10:10 +01:00
Michal Simek
be5df5e0c1 arm64: zynqmp: Setup default si570 frequency to 156.25MHz 
All si570 mgt chips have factory default 156.25MHz but DT changed it to
148.5MHz. After tracking it is pretty much c&p fault taken from Zynq
zc702/zc706 boards where 148.5MHz was setup as default because it was
requirement for AD7511 chip available on these boards.
ZynqMP board don't contain this chip that's why factory default frequency
can be used.

Link: https://lore.kernel.org/r/65a53776cbc5e4586f58da57a4b99e4d5c6c26a7.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
 2024-01-22 14:10:09 +01:00
Srinivas Neeli
1993f67646 arm64: zynqmp: Add resets property for CAN nodes 
Added resets property for CAN nodes.

Signed-off-by: Srinivas Neeli <srinivas.neeli@amd.com>
Link: https://lore.kernel.org/r/7bf0cc230f3c25010f9545f3f92f6f15a95d21ec.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
 2024-01-22 14:10:09 +01:00
Ilias Apalodimas
06d22ed6b6 arm64: zynqmp: Add an OP-TEE node to the device tree 
Since the zynqmp boards can run upstream OP-TEE, and having the DT node
present doesn't cause any side effects add it in case someone tries to
load OP-TEE.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Link: https://lore.kernel.org/r/9ee7e8c263c453a8c9e6bc3b91fad78b0f54edc0.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
 2024-01-22 14:10:09 +01:00
Neal Frager
34e48901e7 arm64: zynqmp: Add output-enable pins to SOMs 
Now that the zynqmp pinctrl driver supports the tri-state registers, make
sure that the pins requiring output-enable are configured appropriately for
SOMs.

Without it, all tristate setting for MIOs, which are not related to SOM
itself, are using default configuration which is not correct setting.
It means SDs, USBs, ethernet, etc. are not working properly.

In past it was fixed through calling tristate configuration via bootcmd:
usb_init=mw 0xFF180208 2020
kv260_gem3=mw 0xFF18020C 0xFC0 && gpio toggle gpio@ff0a000038 && \
  gpio toggle gpio@ff0a000038

Signed-off-by: Neal Frager <neal.frager@amd.com>
Link: https://lore.kernel.org/r/9270938b48c8939ac5dca4ac2c59f1c4a8c564d8.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
 2024-01-22 14:10:09 +01:00
Michal Simek
5710ea6a90 arm64: zynqmp: Rename zynqmp-power node to power-management 
Rename zynqmp-power node name to power-management which is more aligned
with generic node name recommendation.

Link: https://lore.kernel.org/r/bf24cde92c2b9e2824847687fab69fc25c533d53.1703161663.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
 2024-01-22 14:03:25 +01:00
Michal Simek
a98b6987de arm64: zynqmp: Add missing destination mailbox compatible 
The commit 81186dc161 ("dt-bindings: zynqmp: add destination mailbox
compatible") make compatible string for child nodes mandatory that's why
add it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
 2023-12-13 16:52:47 +01:00
Michal Simek
0bfb7950cc arm64: zynqmp: Fix clock node name in kv260 cards 
node name shouldn't use '_' that's why convert it to '-'.

Signed-off-by: Michal Simek <michal.simek@amd.com>
 2023-12-13 16:52:47 +01:00
Michal Simek
6a10a19a6b arm64: zynqmp: Move fixed clock to / for kv260 
fixed clock nodes can't be on the bus because they are missing reg
property. That's why move them to root.
And because it is root it is good to have it as the first node in a file.

Signed-off-by: Michal Simek <michal.simek@amd.com>
 2023-12-13 16:52:47 +01:00
Michal Simek
eb2f7ff7de arm64: xilinx: Remove address/size-cells from gem nodes 
Some boards are using one mdio bus which holds multiple phys and also
boards are using mdio node for bus description. That's why there are cases
where address/size-cells are unnecessary which is also reported by make W=1
dtbs. That's why remove them from zynqmp.dtsi and let board DTSes to handle
it based on used description.

Error log:
/axi/ethernet@ff0e0000: unnecessary #address-cells/#size-cells without
"ranges" or child "reg" property

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7252203d52af3ca8867764c8514affc4828e530d.1695040866.git.michal.simek@amd.com
 2023-12-13 16:52:47 +01:00
Michal Simek
aa2fda8852 arm64: xilinx: Remove address/size-cells from flash node 
Partitions are described via fixed-partitions that's why there is no need
to have address/size-cells in flash node.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c4447028f914e77b8c28640dc458b8409198ee30.1695040866.git.michal.simek@amd.com
 2023-12-13 16:52:47 +01:00
Michal Simek
2da2ac3c8d arm64: xilinx: Put ethernet phys to mdio node 
All zynqmp boards have been already described via mdio node that's why also
convert zc1751. With using mdio node there is an option to add reset
property for the whole mdio bus.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/dc228a27579b48f3e768fcb439d118b4a0f0ef5b.1695040866.git.michal.simek@amd.com
 2023-12-13 16:52:47 +01:00
Michal Simek
fb1580d51c arm64: xilinx: Remove mt25qu512a compatible string from SOM 
mt25qu512a is not documented in DT binding that's why remove it.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a1e975f5785dfb6eb04e8d5905dcaa7467ccd585.1695040866.git.michal.simek@amd.com
 2023-12-13 16:52:47 +01:00
Michal Simek
e0df41b82b arm64: xilinx: Use lower case for partition address 
Lower case should be used for register address.
Issue is reported as:
flash@0: partitions: Unevaluated properties are not allowed
('partition@22A0000' was unexpected)

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a96ac9a32a363b04958157548f290d480c21590c.1695040866.git.michal.simek@amd.com
 2023-12-13 16:52:47 +01:00
Michal Simek
995d4ef062 arm64: xilinx: Do not use '_' in DT node names 
Character '_' not recommended in node name. Use '-' instead.
Pretty much run seds below for node names.
s/zynqmp_ipi/zynqmp-ipi/
s/nvmem_firmware/nvmem-firmware/
s/soc_revision/soc-revision/
s/si5335_/si5335-/

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/5137958580c85a35cf6aadd1c33a2f6bcf81a9e5.1695040866.git.michal.simek@amd.com
 2023-12-13 16:52:46 +01:00
Rob Herring
23b697ec85 arm64: dts: xilinx: Apply overlays to base dtbs 
DT overlays in tree need to be applied to a base DTB to validate they
apply, to run schema checks on them, and to catch any errors at compile
time. Defining the "-dtbs" variable is not enough as the combined DT must
be added to dtbs-y.

zynqmp-sck-kr-g-revA.dtso and zynqmp-sck-kr-g-revB.dtso don't exist, so drop
them.

Signed-off-by: Rob Herring <robh@kernel.org>
Fixes: 45fe0dc4ea ("arm64: xilinx: Use zynqmp prefix for SOM dt overlays")
Link: https://lore.kernel.org/r/20230911214751.2202913-1-robh@kernel.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
 2023-12-13 16:52:37 +01:00
Michal Simek
cf0e27cd01 arm64: zynqmp: Describe interrupts by using macros 
Use arm-gic.h and irq.h for interrupt description. It helps to improve
readability of device tree file.

Suggested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9d5bd17f37772be186cab17b06cc21351d36ff62.1688986332.git.michal.simek@amd.com
 2023-07-27 08:29:50 +02:00
Michal Simek
04d54a0e98 arm64: zynqmp: Fix dwc3 usb interrupt description 
Based on DT binding dwc_usb3 is single entry without anything else. That's
why combination dwc3_usb3, otg is not allowed. That's why split it to host
and peripheral pair which both points to the same IRQ.
DWC3 code is reading these two properties first before generic dwc_usb3.

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6544d13afd9f3d8f5413e32684aa16e4d155e331.1687160244.git.michal.simek@amd.com
 2023-07-10 12:06:53 +02:00
Sharath Kumar Dasari
0dffb878ea arm64: zynqmp: Add memory reserved node for k26 Kria SOM board 
PMUFW (Power Management Unit firmware) requires top 1MB of the lower DDR
memory reserved for its operation, this is missing in k26 SM static dts
file. Bootloader or kernel shouldn't access this location.

Signed-off-by: Sharath Kumar Dasari <sharath.kumar.dasari@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/8ddc7fb4bf40faead7a015ad7e095f3f7d2ec191.1686555698.git.michal.simek@amd.com
 2023-07-10 12:06:26 +02:00
Harini Katakam
233e6e9dbe arm64: zynqmp: Assign TSU clock frequency for GEMs 
Allow changing TSU clock for all GEMs. Kria SOM is using this
functionality that's why set TSU clock frequency as 250MHz (minimum when
running at 1G) to allow PTP functionality.

Signed-off-by: Harini Katakam <harini.katakam@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/3b9285b50a2a4abb136ecb0873343a4e84626581.1686228675.git.michal.simek@amd.com
 2023-07-10 12:06:04 +02:00
Varalaxmi Bingi
3175b52251 arm64: zynqmp: Setting default i2c clock frequency to 400kHz 
Setting default i2c clock frequency for ZynqMP to maximum rate of 400kHz.
Current default value is 100kHz.

Signed-off-by: Varalaxmi Bingi <varalaxmi.bingi@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/3034ec006c8b11e025904d4cc2524255523636f6.1686227766.git.michal.simek@amd.com
 2023-07-10 12:05:41 +02:00
Manikanta Guntupalli
ee6c637f38 arm64: zynqmp: Fix open drain warning on ZynqMP 
Mark both GPIO lines as GPIO_OPEN_DRAIN which is required by i2c-gpio DT
binding. Similar change was done by commit 8df80c1801 ("ARM: dts: exynos:
Convert to new i2c-gpio bindings").

Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a0faf488dde310e1c1c1a676c371e223db6bdca6.1686227712.git.michal.simek@amd.com
 2023-07-10 12:05:16 +02:00
Radhey Shyam Pandey
3011e0c813 arm64: zynqmp: Add L2 cache nodes 
Describe SoC L2 cache hierarchy.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/130e5a6acbee94809b63a61cde5450fbff88cc9c.1685964230.git.michal.simek@amd.com
 2023-07-10 12:04:49 +02:00
Michal Simek
153fc203f6 arm64: zynqmp: Used fixed-partitions for QSPI in k26 
Using fixed partitions is recommended way how to describe QSPI. Also add
label for qspi flash memory to be able to reference it in future.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7368dc772d8dc29477a880ac2065e2ecb98cf3f5.1684767562.git.michal.simek@amd.com
 2023-06-05 13:15:11 +02:00
Radhey Shyam Pandey
f1d48a128a arm64: zynqmp: Add pmu interrupt-affinity 
Based on dt-binding "This property should present when there is more than a
single SPI" that's also case that's why explicitly specify interrupt
affinity to avoid incorrect usage.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/dde2e4b5ac6018adb9bfae05bb3800af6b7c0f0e.1684767562.git.michal.simek@amd.com
 2023-06-05 13:15:11 +02:00
Amit Kumar Mahapatra
1d831cade7 arm64: zynqmp: Set qspi tx-buswidth to 4 
All ZynqMP boards are setting up tx-buswidth to 1. Due to this the
framework only issues 1-1-1 write commands to the GQSPI driver. But the
GQSPI controller is capable of handling 1-4-4 write commands, so updated
the tx-buswidth to 4.
Using all 4 lines will increase the tx data transfer rate, as now the
tx data will be transferred on four lines instead on single line.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1f1b0028106d83aa06e0777e91862a07df100fa1.1684767562.git.michal.simek@amd.com
 2023-06-05 13:15:02 +02:00
Ashok Reddy Soma
f8673fd570 arm64: zynqmp: Fix usb node drive strength and slew rate 
As per design, all input/rx pins should have fast slew rate and 12mA
drive strength. Rest all pins should be slow slew rate and 4mA drive
strength. Fix usb nodes as per this and remove setting of slow slew rate
for all the usb group pins.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/379071f44ceb27a0e32d74e13221640922d989d1.1684767562.git.michal.simek@amd.com
 2023-06-05 13:15:02 +02:00
Michal Simek
c720a1f5e6 arm64: zynqmp: Describe TI phy as ethernet-phy-id 
TI DP83867 is using strapping based on MIO pins. Tristate setup can
influence PHY address. That's why switch description with ethernet-phy-id
compatible string which enable calling reset. PHY itself setups phy address
after power up or reset. Phy reset is done via gpio.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b49904649a363f40dc9c4d3fa275e42129562082.1684767562.git.michal.simek@amd.com
 2023-06-05 13:15:02 +02:00
Michal Simek
4e4ddd3d1d arm64: zynqmp: Switch to amd.com emails 
Update my and DPs email address to match current setup.

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/108cbbbab29e13d386d38a779fd582f10844a030.1685443337.git.michal.simek@amd.com
 2023-06-05 13:14:21 +02:00
Michal Simek
f5c8855de1 arm64: zynqmp: Convert kv260-revA overlay to ASCII text 
File was in UTF-8 format but there is no reason for it. Convert it to
ASCII/plain text.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9161f4e1d449edd86e642b6769575b8e201fccf0.1684244418.git.michal.simek@amd.com
 2023-06-05 13:13:28 +02:00
Michal Simek
45fe0dc4ea arm64: xilinx: Use zynqmp prefix for SOM dt overlays 
U-Boot is using zynqmp- prefix to compose DT name for board detection
that's why also generate DT in this format in the kernel.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/49c1b8c992929610ba17b9c6edf5d40d4b28d2ed.1683033163.git.michal.simek@amd.com
 2023-05-16 14:50:15 +02:00
Michal Simek
5be4fbbfbe arm64: zynqmp: Add phase tags marking 
bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to cover U-Boot challenges with DT.
That's why add it also to Linux to be aligned with bootloader requirement.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/48b554aef75d11e6ad2ef7d21f22accb35432112.1683034376.git.michal.simek@amd.com
 2023-05-16 14:50:15 +02:00
Michal Simek
7b91ccd5d2 arm64: zynqmp: Describe bus-width for SD card on KV260 
SD card is connected with 4 data lines which should be described properly.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b4046d2f593047400c190e438fd9d05128c293d9.1683034376.git.michal.simek@amd.com
 2023-05-16 14:50:15 +02:00
Michal Simek
255118de76 arm64: zynqmp: Enable AMS on SOM and other zcu10x boards 
AMS is used for monitoring system. Used for measuring voltages and
especially temperatures. Origin interface is IIO but via iio-hwmon it can
be moved to hwmon framework too (done for SOM and zcu100).

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/e1e1621ac1cee7f36ef20606bb3795e130de9609.1683034376.git.michal.simek@amd.com
 2023-05-16 14:50:15 +02:00
Michal Simek
6d1a2bea24 arm64: zynqmp: Enable DP driver for SOMs 
DP DMA is already enabled that's why there is no reason to keep DP
disabled.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/15d16b4de933bfae108df6ca368eb2cdf916aa02.1683034376.git.michal.simek@amd.com
 2023-05-16 14:50:15 +02:00
Michal Simek
116de80ada arm64: zynqmp: Setup clock for DP and DPDMA 
Clocks are coming from shared HW design where these frequencies should be
aligned with PLL setup.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/807e22371394222f728ff7d6b190a96a12145439.1683034376.git.michal.simek@amd.com
 2023-05-16 14:50:15 +02:00
Michal Simek
fc57b6c929 arm64: zynqmp: Switch to ethernet-phy-id in kv260 
Use ethernet-phy-id compatible string to properly describe phy reset on
kv260 boards. Previous description wasn't correct because reset was done
for mdio bus to operate and it was in this case used for different purpose
which was eth phy reset. With ethernet-phy-id phy reset happens only for
the phy via phy framework.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4b139e942c2a808eecbb30226b6ea5303348390a.1683034376.git.michal.simek@amd.com
 2023-05-16 14:50:15 +02:00
Piyush Mehta
60a9905424 arm64: zynqmp: Disable USB3.0 for zc1751-xm016-dc2 
The board zynqmp-zc1751-xm016-dc2 support only USB2.0 that's why remove
USB3.0 DT configuration.

Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/ad019501a851c5730427af948b636316f10b2e3b.1683034376.git.michal.simek@amd.com
 2023-05-16 14:50:14 +02:00
Michal Simek
c506fe31d7 arm64: zynqmp: Add pinctrl emmc description to SM-K26 
Production SOM has emmc on it and make sense to describe pin description to
be able use EMMC if it is not configured via psu_init.
(Still some regs are not handled but this is one step in that direction)

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/f61c16e2fd7c91c2be6d6b67c902037580dbd364.1683034376.git.michal.simek@amd.com
 2023-05-16 14:50:14 +02:00
Michal Simek
56bb4ed4da arm64: zynqmp: Add gpio labels for modepin gpio 
Using label helps with better chip identification.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/12b2fcd94e528c8ca7117f6741aae36b5942b430.1683034376.git.michal.simek@amd.com
 2023-05-16 14:50:14 +02:00
Amit Kumar Mahapatra
5ac5794afb arm64: zynqmp: Add mtd partition for secure OS storage area 
Update MTD partitions of Kria device trees to allocate 128KB of QSPI
memory for secure OS. Increased "SHA256" partition size & changed
starting address of "User" partition to accommodate the new partition
"Secure OS Storage"

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20dd23821118999c6fec2bad52ea446d1a66fefb.1683034376.git.michal.simek@amd.com
 2023-05-16 14:50:14 +02:00
Michal Simek
637902f7c4 arm64: zynqmp: Use assigned-clock-rates for setting up SD clock in SOM 
With limited low level configuration done via psu-init only IPs connected
on SOM are initialized and configured. All IPs connected to carrier card
are not initialized. There is a need to do proper reset, pin configuration
and also clock setting.
The patch targets the last part which is setting up proper clock for EMMC
on production SOMs and SD on kv260-revB.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/cf5a4e412e1674500a71a0b1eed7fa8393f37ae9.1683034376.git.michal.simek@amd.com
 2023-05-16 14:50:14 +02:00