Pull Xtensa updates from Max Filippov:
- fix kernel build with gcc-13
- various minor fixes
* tag 'xtensa-20221213' of https://github.com/jcmvbkbc/linux-xtensa:
xtensa: add __umulsidi3 helper
xtensa: update config files
MAINTAINERS: update the 'T:' entry for xtensa
Allow vectors to be either merged into the kernel .text or put at a
fixed virtual address independently of XIP option. Drop option that
puts vectors at a fixed offset from the kernel text. Add choice to
Kconfig.
Vectors at fixed virtual address may be useful for XIP-aware MTD support
and for noMMU configurations with available IRAM. Configurations without
VECBASE register must put their vectors at specific locations regardless
of the selected option. All other configurations should happily use
merged vectors.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
CONFIG_IOSCHED_DEADLINE and CONFIG_IOSCHED_CFQ are gone since
commit f382fb0bce ("block: remove legacy IO schedulers").
The IOSCHED_DEADLINE was replaced by MQ_IOSCHED_DEADLINE and it will be
now enabled by default (along with MQ_IOSCHED_KYBER).
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Message-Id: <20200130192129.2677-1-krzk@kernel.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
When building some xtensa config, I hit the following warning:
drivers/staging/mt7621-dts/Kconfig:4:warning: 'BUILTIN_DTB' has wrong type.
'select' only accept arguments of bool and tristate type
It is due to some arch use BUILTIN_DTB as a flag for the need to builtin
dtb but xtensa use it as a string for which dtb to bulltin.
But for this (which dtb to build), it is better to use
BUILTIN_DTB_SOURCE like other arch do.
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Secondary CPU reset vector overlaps part of the double exception handler
code, resulting in weird crashes and hangups when running user code.
Move exception vectors one page up so that they don't clash with the
secondary CPU reset vector.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Now that memory initialization doesn't add default memory region
specify it explicitly in the memmap command line option in case somebody
wants to boot in non-DT-enabled configuration.
While at it update earlycon access mode to mmio32native to support both
LE and BE cores transparently.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
This config allows running SMP-enabled bitstream on LX200 board.
NFS or FLASH rootfs, minimal debug, up to 4 cores.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
