Gokul Sriram Palanisamy
50492f9294
clk: qcom: apss-ipq-pll: add support for IPQ5018
...
IPQ5018 APSS PLL is of type Stromer. Reuse Stromer Plus PLL offsets,
add configuration values and the compatible.
Co-developed-by: Sricharan Ramabadhran <quic_srichara@quicinc.com >
Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com >
Signed-off-by: Gokul Sriram Palanisamy <quic_gokulsri@quicinc.com >
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20230925102826.405446-3-quic_gokulsri@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2023-12-02 16:53:37 -08:00
Varadarajan Narayanan
5b7a4d3d2b
clk: qcom: apss-ipq-pll: Fix 'l' value for ipq5332_pll_config
...
The earlier 'l' value of 0x3e is for 1.5GHz. Not all SKUs support
this frequency. Hence set it to 0x2d to get 1.1GHz which is
supported in all SKUs.
The frequency can still increase above this initial configuration
made here when the cpufreq driver picks a different OPP.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Fixes: c7ef7fbb1cquic_kathirav@quicinc.com >
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com >
Link: https://lore.kernel.org/r/00e6be6cb9cee56628123a64ade118d0a752018b.1697781921.git.quic_varada@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2023-10-21 08:48:39 -07:00
Varadarajan Narayanan
267e291984
clk: qcom: apss-ipq-pll: Use stromer plus ops for stromer plus pll
...
The set rate and determine rate operations are different between
Stromer and Stromer Plus PLLs. Since the programming sequence is
different, the PLLs dont get configured properly and random,
inexplicable crash/freeze is seen. Hence, use stromer plus ops
for ipq_pll_stromer_plus.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Acked-by: Stephen Boyd <sboyd@kernel.org >
Fixes: c7ef7fbb1cquic_kathirav@quicinc.com >
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com >
Link: https://lore.kernel.org/r/c86ecaa23dc4f39650bcf4a3bd54a617a932e4fd.1697781921.git.quic_varada@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2023-10-21 08:48:39 -07:00
Rob Herring
a96cbb146a
clk: Explicitly include correct DT includes
...
The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.
Acked-by: Dinh Nguyen <dinguyen@kernel.org >
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org > # samsung
Acked-by: Heiko Stuebner <heiko@sntech.de > #rockchip
Acked-by: Chanwoo Choi <cw00.choi@samsung.com >
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be >
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com >
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com > # versaclock5
Signed-off-by: Rob Herring <robh@kernel.org >
Link: https://lore.kernel.org/r/20230718143156.1066339-1-robh@kernel.org
Acked-by: Abel Vesa <abel.vesa@linaro.org > #imx
Signed-off-by: Stephen Boyd <sboyd@kernel.org >
2023-07-19 13:13:16 -07:00
Devi Priya
20beb85f7a
clk: qcom: apss-ipq-pll: Add support for IPQ9574
...
Add the compatible and configuration values for A73 Huayra PLL found
on IPQ9574.
Co-developed-by: Praveenkumar I <quic_ipkumar@quicinc.com >
Signed-off-by: Praveenkumar I <quic_ipkumar@quicinc.com >
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com >
Acked-by: Stephen Boyd <sboyd@kernel.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230406061314.10916-3-quic_devipriy@quicinc.com
2023-05-26 12:16:40 -07:00
Kathiravan T
c7ef7fbb1c
clk: qcom: apss-ipq-pll: add support for IPQ5332
...
IPQ5332 APSS PLL is of type Stromer Plus. Add support for the same.
To configure the stromer plus PLL separate API
(clock_stromer_pll_configure) to be used. To achieve this, introduce the
new member pll_type in device data structure and call the appropriate
function based on this.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230217083308.12017-4-quic_kathirav@quicinc.com
2023-03-23 07:27:01 -07:00
Kathiravan T
1d83f18be5
clk: qcom: apss-ipq-pll: refactor the driver to accommodate different PLL types
...
APSS PLL found on the IPQ8074 and IPQ6018 are of type Huayra PLL. But,
IPQ5332 APSS PLL is of type Stromer Plus. To accommodate both these PLLs,
refactor the driver to take the clk_alpha_pll, alpha_pll_config via driver
data.
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230217083308.12017-2-quic_kathirav@quicinc.com
2023-03-23 07:27:01 -07:00
Robert Marko
cca7b7d5f1
clk: qcom: apss-ipq-pll: add support for IPQ8074
...
Add support for IPQ8074 since it uses the same PLL setup, however it uses
slightly different Alpha PLL config.
Alpha PLL config was obtained by dumping PLL registers from a running
device.
Signed-off-by: Robert Marko <robimarko@gmail.com >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20220818220628.339366-7-robimarko@gmail.com
2022-09-26 21:40:11 -05:00
Robert Marko
2a4d702465
clk: qcom: apss-ipq-pll: update IPQ6018 Alpha PLL config
...
Update the IPQ6018 Alpha PLL config to the latest one from the downstream
5.4 kernel[1].
This one should match the production SoC-s.
Tested on IPQ6018 CP01-C1 reference board.
[1] https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-ipq-5.4/-/blob/NHSS.QSDK.12.1.r4/drivers/clk/qcom/apss-ipq-pll.c#L41
Signed-off-by: Robert Marko <robimarko@gmail.com >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20220818220628.339366-6-robimarko@gmail.com
2022-09-26 21:40:11 -05:00
Robert Marko
823a117e1d
clk: qcom: apss-ipq-pll: use OF match data for Alpha PLL config
...
Convert the driver to use OF match data for providing the Alpha PLL config
per compatible.
This is required for IPQ8074 support since it uses a different Alpha PLL
config.
While we are here rename "ipq_pll_config" to "ipq6018_pll_config" to make
it clear that it is for IPQ6018 only.
Signed-off-by: Robert Marko <robimarko@gmail.com >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20220818220628.339366-5-robimarko@gmail.com
2022-09-26 21:40:10 -05:00
Chen Hui
d0a859edda
clk: qcom: apss-ipq-pll: Add missing MODULE_DEVICE_TABLE
...
CONFIG_IPQ_APSS_PLL is tristate option and therefore this driver can
be compiled as a module. This patch adds missing MODULE_DEVICE_TABLE
definition which generates correct modalias for automatic loading of
this driver when it is built as an external module.
Fixes: ecd2bacfbbclare.chenhui@huawei.com >
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Link: https://lore.kernel.org/r/20210409082352.233810-4-clare.chenhui@huawei.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org >
2021-04-09 11:20:53 -07:00
Sivaprakash Murugesan
ecd2bacfbb
clk: qcom: Add ipq apss pll driver
...
The CPUs on Qualcomm ipq based devices are clocked by an alpha PLL.
Add support for the apss pll found on ipq based devices which can
support CPU frequencies above 1Ghz.
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org >
Link: https://lore.kernel.org/r/1592800092-20533-3-git-send-email-sivaprak@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org >
2020-06-22 00:21:59 -07:00
