Konrad Dybcio
d09ec6f987
clk: qcom: Use qcom_branch_set_clk_en()
...
Instead of magically poking at the bit0 of branch clocks' CBCR, use
the newly introduced helper.
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org >
Reviewed-by: Johan Hovold <johan+linaro@kernel.org >
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Link: https://lore.kernel.org/r/20240212-topic-clk_branch_en-v7-2-5b79eb7278b2@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-02-14 11:59:07 -06:00
Dmitry Baryshkov
c334ecf355
clk: qcom: dispcc-*: switch to module_platform_driver
...
There is no need to register display clock controllers during subsys init
calls. Use module_platform_driver() instead.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Link: https://lore.kernel.org/r/20240206-clk-module-platform-driver-v1-2-db799bd2feeb@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-02-07 12:14:47 -06:00
Konrad Dybcio
c559bcb925
clk: qcom: dispcc-sm8550: Use the correct PLL configuration function
...
To ensure that all fields (particularly CAL_L and CAL_L_RINGOSC) are
filled properly, use the correct prepare function for OLE PLLs.
Fixes: 90114ca114konrad.dybcio@linaro.org >
Link: https://lore.kernel.org/r/20231218-topic-8550_fixes-v1-9-ce1272d77540@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2023-12-19 11:27:03 -06:00
Konrad Dybcio
febd251d87
clk: qcom: dispcc-sm8550: Update disp PLL settings
...
The settings in the driver seem to have been taken from an older
release. Update them to match the latest values.
Fixes: 90114ca114konrad.dybcio@linaro.org >
Link: https://lore.kernel.org/r/20231218-topic-8550_fixes-v1-8-ce1272d77540@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2023-12-19 11:27:03 -06:00
Stephen Boyd
41680df097
Merge branch 'clk-qcom' into clk-next
...
* clk-qcom: (87 commits)
clk: qcom: Fix SM_GPUCC_8450 dependencies
clk: qcom: smd-rpm: Set XO rate and CLK_IS_CRITICAL on PCNoC
clk: qcom: smd-rpm: Add a way to define bus clocks with rate and flags
clk: qcom: gcc-ipq5018: change some variable static
clk: qcom: gcc-ipq4019: add missing networking resets
dt-bindings: clock: qcom: ipq4019: add missing networking resets
clk: qcom: gcc-msm8917: Enable GPLL0_SLEEP_CLK_SRC
dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRC
clk: qcom: gcc-qdu1000: Update the RCGs ops
clk: qcom: gcc-qdu1000: Update the SDCC clock RCG ops
clk: qcom: gcc-qdu1000: Add support for GDSCs
clk: qcom: gcc-qdu1000: Add gcc_ddrss_ecpri_gsi_clk support
clk: qcom: gcc-qdu1000: Register gcc_gpll1_out_even clock
clk: qcom: gcc-qdu1000: Fix clkref clocks handling
clk: qcom: gcc-qdu1000: Fix gcc_pcie_0_pipe_clk_src clock handling
dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs
clk: qcom: gcc-sm8450: Use floor ops for SDCC RCGs
clk: qcom: ipq5332: drop the gcc_apss_axi_clk_src clock
clk: qcom: ipq5332: drop the mem noc clocks
clk: qcom: gcc-msm8998: Don't check halt bit on some branch clks
...
2023-08-30 14:39:58 -07:00
Rob Herring
a96cbb146a
clk: Explicitly include correct DT includes
...
The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.
Acked-by: Dinh Nguyen <dinguyen@kernel.org >
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org > # samsung
Acked-by: Heiko Stuebner <heiko@sntech.de > #rockchip
Acked-by: Chanwoo Choi <cw00.choi@samsung.com >
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be >
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com >
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com > # versaclock5
Signed-off-by: Rob Herring <robh@kernel.org >
Link: https://lore.kernel.org/r/20230718143156.1066339-1-robh@kernel.org
Acked-by: Abel Vesa <abel.vesa@linaro.org > #imx
Signed-off-by: Stephen Boyd <sboyd@kernel.org >
2023-07-19 13:13:16 -07:00
Johan Hovold
acaf1b3296
clk: qcom: dispcc-sm8550: fix runtime PM imbalance on probe errors
...
Make sure to decrement the runtime PM usage count before returning in
case regmap initialisation fails.
Fixes: 90114ca114stable@vger.kernel.org # 6.3
Cc: Neil Armstrong <neil.armstrong@linaro.org >
Signed-off-by: Johan Hovold <johan+linaro@kernel.org >
Link: https://lore.kernel.org/r/20230718132902.21430-4-johan+linaro@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2023-07-18 07:58:49 -07:00
Neil Armstrong
90114ca114
clk: qcom: add SM8550 DISPCC driver
...
Add support for the display clock controller found in SM8550
based devices.
This clock controller feeds the Multimedia Display SubSystem (MDSS).
This driver is based on the SM8450 support.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org >
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230103-topic-sm8550-upstream-dispcc-v3-3-8a03d348c572@linaro.org
2023-01-10 12:19:19 -06:00
