Konrad Dybcio
d09ec6f987
clk: qcom: Use qcom_branch_set_clk_en()
...
Instead of magically poking at the bit0 of branch clocks' CBCR, use
the newly introduced helper.
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org >
Reviewed-by: Johan Hovold <johan+linaro@kernel.org >
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Link: https://lore.kernel.org/r/20240212-topic-clk_branch_en-v7-2-5b79eb7278b2@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-02-14 11:59:07 -06:00
Konrad Dybcio
4f66879c76
clk: qcom: gcc-sm8250: Set delay for Venus CLK resets
...
Some Venus resets may require more time when toggling. Describe that.
The value was obtained by referencing the msm-4.19 driver, which uses a
single value for all platforms [1].
[1] https://git.codelinaro.org/clo/la/platform/vendor/opensource/video-driver/-/blob/LA.UM.9.15.c26/msm/vidc/hfi_common.c?ref_type=heads#L3662-3663
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Link: https://lore.kernel.org/r/20240105-topic-venus_reset-v2-9-c37eba13b5ce@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2024-02-07 12:14:47 -06:00
Stephen Boyd
41680df097
Merge branch 'clk-qcom' into clk-next
...
* clk-qcom: (87 commits)
clk: qcom: Fix SM_GPUCC_8450 dependencies
clk: qcom: smd-rpm: Set XO rate and CLK_IS_CRITICAL on PCNoC
clk: qcom: smd-rpm: Add a way to define bus clocks with rate and flags
clk: qcom: gcc-ipq5018: change some variable static
clk: qcom: gcc-ipq4019: add missing networking resets
dt-bindings: clock: qcom: ipq4019: add missing networking resets
clk: qcom: gcc-msm8917: Enable GPLL0_SLEEP_CLK_SRC
dt-bindings: clock: gcc-msm8917: Add definition for GPLL0_SLEEP_CLK_SRC
clk: qcom: gcc-qdu1000: Update the RCGs ops
clk: qcom: gcc-qdu1000: Update the SDCC clock RCG ops
clk: qcom: gcc-qdu1000: Add support for GDSCs
clk: qcom: gcc-qdu1000: Add gcc_ddrss_ecpri_gsi_clk support
clk: qcom: gcc-qdu1000: Register gcc_gpll1_out_even clock
clk: qcom: gcc-qdu1000: Fix clkref clocks handling
clk: qcom: gcc-qdu1000: Fix gcc_pcie_0_pipe_clk_src clock handling
dt-bindings: clock: Update GCC clocks for QDU1000 and QRU1000 SoCs
clk: qcom: gcc-sm8450: Use floor ops for SDCC RCGs
clk: qcom: ipq5332: drop the gcc_apss_axi_clk_src clock
clk: qcom: ipq5332: drop the mem noc clocks
clk: qcom: gcc-msm8998: Don't check halt bit on some branch clks
...
2023-08-30 14:39:58 -07:00
Patrick Whewell
783cb69382
clk: qcom: gcc-sm8250: Fix gcc_sdcc2_apps_clk_src
...
GPLL9 is not on by default, which causes a "gcc_sdcc2_apps_clk_src: rcg
didn't update its configuration" error when booting. Set .flags =
CLK_OPS_PARENT_ENABLE to fix the error.
Fixes: 3e5770921a ("clk: qcom: gcc: Add global clock controller driver for SM8250")
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org >
Signed-off-by: Patrick Whewell <patrick.whewell@sightlineapplications.com >
Reviewed-by: Vinod Koul <vkoul@kernel.org >
Link: https://lore.kernel.org/r/20230802210359.408-1-patrick.whewell@sightlineapplications.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
2023-08-03 08:01:45 -07:00
Rob Herring
a96cbb146a
clk: Explicitly include correct DT includes
...
The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.
Acked-by: Dinh Nguyen <dinguyen@kernel.org >
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org > # samsung
Acked-by: Heiko Stuebner <heiko@sntech.de > #rockchip
Acked-by: Chanwoo Choi <cw00.choi@samsung.com >
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be >
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com >
Reviewed-by: Luca Ceresoli <luca.ceresoli@bootlin.com > # versaclock5
Signed-off-by: Rob Herring <robh@kernel.org >
Link: https://lore.kernel.org/r/20230718143156.1066339-1-robh@kernel.org
Acked-by: Abel Vesa <abel.vesa@linaro.org > #imx
Signed-off-by: Stephen Boyd <sboyd@kernel.org >
2023-07-19 13:13:16 -07:00
Dmitry Baryshkov
6df8ecd018
clk: qcom: gcc-sm8250: switch to parent_hws
...
Change several entries of parent_data to use parent_hws instead, which
results in slightly more ovbious code.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20230103145515.1164020-13-dmitry.baryshkov@linaro.org
2023-01-10 15:59:00 -06:00
Manivannan Sadhasivam
ac1c5a03d3
clk: qcom: gcc-sm8250: Use retention mode for USB GDSCs
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USB controllers on SM8250 doesn't work after coming back from suspend.
This can be fixed by keeping the USB GDSCs in retention mode so that
hardware can keep them ON and put into rentention mode once the parent
domain goes to a low power state.
Fixes: 3e5770921a ("clk: qcom: gcc: Add global clock controller driver for SM8250")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org >
Signed-off-by: Bjorn Andersson <andersson@kernel.org >
Link: https://lore.kernel.org/r/20221102091320.66007-1-manivannan.sadhasivam@linaro.org
2022-11-05 23:37:22 -05:00
Dmitry Baryshkov
c864cd5f50
clk: qcom: gcc-sm8250: use ARRAY_SIZE instead of specifying num_parents
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Use ARRAY_SIZE() instead of manually specifying num_parents. This makes
adding/removing entries to/from parent_data easy and errorproof.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20210405224743.590029-33-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org >
2021-04-07 17:25:52 -07:00
Dmitry Baryshkov
31192234a1
clk: qcom: gcc-sm8250: use parent_hws where possible
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Switch to using parent_hws instead of parent_data when parents are
defined in this driver and so accessible using clk_hw.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20210405224743.590029-24-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org >
2021-04-07 17:22:54 -07:00
Dmitry Baryshkov
b6f3fd686e
clk: qcom: gcc-sm8250: drop unused enum entries
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Drop unused enum entries from the list of parent enums.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Link: https://lore.kernel.org/r/20210405224743.590029-4-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org >
2021-04-07 17:22:51 -07:00
Dmitry Baryshkov
fd23830935
clk: qcom: gcc-sm250: Use floor ops for sdcc clks
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Followup to the commits 5e4b7e82d4 ("clk: qcom: gcc-sdm845: Use floor
ops for sdcc clks") and 6d37a8d192 ("clk: qcom: gcc-sc7180: Use floor ops
for sdcc clks"). Use floor ops for sdcc clocks on sm8250.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org >
Fixes: 3e5770921a ("clk: qcom: gcc: Add global clock controller driver for SM8250")
Link: https://lore.kernel.org/r/20210109013314.3443134-1-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org >
2021-01-12 12:10:52 -08:00
Taniya Das
3e5770921a
clk: qcom: gcc: Add global clock controller driver for SM8250
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Add the clocks supported in global clock controller, which clock the
peripherals like BLSPs, SDCC, USB, MDSS etc. Register all the clocks
to the clock framework for the clients to be able to request for them.
Signed-off-by: Taniya Das <tdas@codeaurora.org >
Signed-off-by: Venkata Narendra Kumar Gutta <vnkgutta@codeaurora.org >
Signed-off-by: Vinod Koul <vkoul@kernel.org >
Link: https://lkml.kernel.org/r/20200224045003.3783838-6-vkoul@kernel.org
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org >
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org >
Signed-off-by: Stephen Boyd <sboyd@kernel.org >
2020-03-09 15:14:57 -07:00