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29120 Commits

Author SHA1 Message Date
Rex Zhu
66bc3f7f03 drm/amdgpu: use modules parameter to ctrl deep sleep feature in dpm 
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:53 -04:00
Rex Zhu
af223dfaf0 drm/amdgpu: add module parameters to ctrl powerplay feature 
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:52 -04:00
Rex Zhu
a94cbfc377 drm/amd/powerplay: fix typos of volt/millivolt symbols in comment. 
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:51 -04:00
Tom St Denis
75419c4378 drm/amd/amdgpu: Enable stoney VCE PG 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:50 -04:00
Tom St Denis
c2cdb04280 drm/amd/amdgpu: Enable stoney UVD PG 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:48 -04:00
Tom St Denis
4e86be75c6 drm/amd/amdgpu: Enable stoney GFX PG 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:47 -04:00
Tom St Denis
2ed0936de5 drm/amd/amdgpu: Enable carrizo VCE PG 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:46 -04:00
Tom St Denis
65b426225b drm/amd/amdgpu: Enable carrizo UVD PG 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:45 -04:00
Tom St Denis
f6ade30418 drm/amd/amdgpu: Enable carrizo GFX PG 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:43 -04:00
Tom St Denis
0da31ffce9 drm/amd/amdgpu: Add error messages to UVD PG in DPM 
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:42 -04:00
Tom St Denis
fa5d2e0c10 drm/amd/amdgpu: enable PG_EN bit in powergating UVD 
Enable the PG_EN bit just before the SMU would be tasked
with the PG transition.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:41 -04:00
Tom St Denis
2875125c31 drm/amd/amdgpu: don't track state in UVD clockgating 
There's no need to track CG state anymore.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:40 -04:00
Tom St Denis
7acc83d4df drm/amd/amdgpu: don't set clockgating in uvd_v6_0_start() 
This is handled properly by both DPM and PP externally.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:38 -04:00
Tom St Denis
bd12267dd8 drm/amd/amdgpu: add pm lock to debugfs mmio entry 
Adds support for PM locks around access to registers that might
have race conditions on PG transistions.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:37 -04:00
Tom St Denis
e95a14a909 drm/amd/amdgpu: add mutex locking for both DPM and PP based powergating for UVD/VCE 
This adds a mutex lock for both DPM/PP around the changes in
power gating state so that userspace can poll registers without
a race condition on power state.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:36 -04:00
Alex Deucher
70bb246154 drm/amdgpu/powerplay: enable powerplay by default on TOPAZ 
Now that the implementation is complete.

Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:35 -04:00
Huang Rui
3c18266cff drm/amd/powerplay: add DPM running checking back 
This patch adds DPM running checking back, because the DPM issue is
fixed.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:34 -04:00
Huang Rui
db7992d820 drm/amd/powerplay: add enabling voltage controller back 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:32 -04:00
Huang Rui
f6bf6dcaab drm/amd/powerplay: set the platform capability flags for iceland 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:31 -04:00
Huang Rui
e4e2c8f29a drm/amd/powerplay: add deep sleep initialization 
This patch adds the deep sleep initialization at DPM, it needs send a
message to SMC to enable this feature before enable voltage controller.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:30 -04:00
Huang Rui
9f7aab6fd3 drm/amd/powerplay: fix the incorrect checking condition 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:28 -04:00
Huang Rui
54c825a916 drm/amdgpu: enable iceland powerplay manually 
It's able to enable iceland powerplay manually via the module
parameter. The default state is disabled.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:27 -04:00
Huang Rui
025f8bfb84 drm/amd/powerplay: add iceland HW manager 
This patch introduces the iceland HW manager of powerplay which
includes HW manager, clockpowergating, thermal, and powertune.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:26 -04:00
Huang Rui
d550df0b60 drm/amd/powerplay: add iceland_dyn_defaults header 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:25 -04:00
Huang Rui
2435b0547c drm/amd/powerplay: add iceland SMU mananger 
The system management unit (SMU) is a subcomponent of the northbridge
that is responsible for a variety of system and power management tasks
during boot and runtime for GPU. In powerplay, it will be used on
firmware loading and power task management. This patch adds SMU
mananger for iceland.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:24 -04:00
Huang Rui
d31d3c28c7 drm/amd/powerplay: add SMU71 header files for iceland (v2) 
v2: cleanup headers, add copyright

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:22 -04:00
Christian König
37ac235bf8 drm/amdgpu: use amdgpu_bo_create_kernel in amdgpu_ring.c 
Saves us quite a bunch of code.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:21 -04:00
Christian König
c6f4439ce6 drm/amdgpu: use amdgpu_bo_create_kernel in amdgpu_ih.c 
Saves us quite a bunch of code.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:20 -04:00
Christian König
4b62e69777 drm/amdgpu: user amdgpu_bo_create_kernel for the UVD BO 
Saves us some code.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:19 -04:00
Christian König
cdb7e8f273 drm/amdgpu: add more warning to amdgpu_bo_offset 
Warn when we try to get the address and the BO isn't locked or reserved.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:17 -04:00
Christian König
78bbbd9c0f drm/amdgpu: pin shared GWS, GDS and OA resources 
They can't move anyway, but just to be clean here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:16 -04:00
Christian König
7c204889de drm/amdgpu: add new helper for in kernel allocations 
We often allocate, pin and map things at the same time in the kernel.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:15 -04:00
Chunming Zhou
81e04e1809 drm/amdgpu: add dce10 check_soft_reset 
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:14 -04:00
Chunming Zhou
115933a577 drm/amdgpu: implement vce3 check/post_soft_reset 
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:12 -04:00
Chunming Zhou
fc0b3b90b7 drm/amdgpu: implement UVD6 check/pre/post_soft_reset 
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:11 -04:00
Chunming Zhou
1015a1b175 drm/amdgpu: implement vi ih check/pre/post_soft_reset 
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:10 -04:00
Chunming Zhou
50b0197abf drm/amdgpu: implement gmc8 check/pre/post_soft_reset 
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:09 -04:00
Chunming Zhou
e702a68051 drm/amdgpu: implement sdma3 check/pre/post_soft_reset 
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:07 -04:00
Chunming Zhou
e4ae0fc336 drm/amdgpu: implement gfx8 post_soft_reset 
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:06 -04:00
Chunming Zhou
35d782feae drm/amdgpu: add amdgpu soft reset 
Check gpu status first, if MC/VMC/DISPLAY hang, directly triger full reset.
If engine hangs, then triger engine soft reset, if soft reset fails, will
fallback to full reset.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:05 -04:00
Chunming Zhou
1057f20c22 drm/amdgpu: add gfx8 pre soft reset 
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:04 -04:00
Chunming Zhou
d31a501ead drm/amdgpu: add pre_soft_reset ip func 
It will be used before soft_reset to do some preparing work for reset.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:02 -04:00
Chunming Zhou
3d7c638490 drm/amdgpu: implement gfx8 check_soft_reset 
Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:01 -04:00
Chunming Zhou
63fbf42f73 drm/amdgpu: add check_soft_reset ip func 
It is used to identify if the ip block is hang.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-08 11:32:00 -04:00
Dave Airlie
4872850a19 Merge branch 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux into drm-next 
A few fixes for amdgpu and ttm for 4.8
- fix a ttm regression caused by the new pipelining code
- fixes for mullins on amdgpu
- updated golden settings for amdgpu

* 'drm-next-4.8' of git://people.freedesktop.org/~agd5f/linux:
  drm/ttm: Wait for a BO to become idle before unbinding it from GTT
  drm/amdgpu: update golden setting of polaris10
  drm/amdgpu: update golden setting of stoney
  drm/amdgpu: update golden setting of polaris11
  drm/amdgpu: update golden setting of carrizo
  drm/amdgpu: update golden setting of iceland
  drm/amd/amdgpu: change pptable output format from ASCII to binary
  drm/amdgpu/ci: add mullins to default case for smc ucode
  drm/amdgpu/gmc7: add missing mullins case
 2016-08-08 16:45:33 +10:00
Michel Dänzer
34b58355ad drm/ttm: Wait for a BO to become idle before unbinding it from GTT 
Fixes hangs under memory pressure, e.g. running the piglit test
tex3d-maxsize concurrently with other tests.

Fixes: 17d33bc9d6 ("drm/ttm: drop waiting for idle in ttm_bo_evict.")
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-05 13:37:02 -04:00
Huang Rui
a5a5e3084e drm/amdgpu: update golden setting of polaris10 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-02 16:09:09 -04:00
Huang Rui
6d51c813b1 drm/amdgpu: update golden setting of stoney 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-02 16:08:59 -04:00
Huang Rui
9761bc53c8 drm/amdgpu: update golden setting of polaris11 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-02 16:08:47 -04:00
Huang Rui
3a494b588f drm/amdgpu: update golden setting of carrizo 
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2016-08-02 16:08:38 -04:00