Commit Graph

125 Commits

Author SHA1 Message Date
Linus Torvalds
90a498f294 Merge tag 'phy-for-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
Pull phy updates from Vinod Koul:
 "New hardware support:

   - Qualcomm X1E80100 PCIe phy support, SM8550 PCIe1 PHY, SC7180 UFS
     PHY and SDM630 USBC support

   - Rockchip HDMI/eDP Combo PHY driver

   - Mediatek MT8365 CSI phy driver

  Updates:

   - Rework on Qualcomm phy PCS registers and type-c handling

   - Cadence torrent phy updates for multilink configuration

   - TI gmii resume support"

* tag 'phy-for-6.9' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (41 commits)
  phy: constify of_phandle_args in xlate
  phy: ti: tusb1210: Define device IDs
  phy: ti: tusb1210: Use temporary variable for struct device
  phy: rockchip: Add Samsung HDMI/eDP Combo PHY driver
  dt-bindings: phy: Add Rockchip HDMI/eDP Combo PHY schema
  phy: ti: gmii-sel: add resume support
  phy: mtk-mipi-csi: add driver for CSI phy
  dt-bindings: phy: add mediatek MIPI CD-PHY module v0.5
  phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink config for TI J7200
  dt-bindings: phy: cadence-torrent: Add a separate compatible for TI J7200
  phy: cadence-torrent: Add USXGMII(156.25MHz) + SGMII/QSGMII(100MHz) multilink configuration
  phy: cadence-torrent: Add PCIe(100MHz) + USXGMII(156.25MHz) multilink configuration
  dt-bindings: phy: cadence-torrent: Add optional input reference clock for PLL1
  phy: qcom-qmp-ufs: Switch to devm_clk_bulk_get_all() API
  dt-bindings: phy: qmp-ufs: Fix PHY clocks
  phy: qcom: sgmii-eth: move PCS registers to separate header
  phy: qcom: sgmii-eth: use existing register definitions
  phy: qcom: qmp-usbc: drop has_pwrdn_delay handling
  phy: qcom: qmp: move common bits definitions to common header
  phy: qcom: qmp: split DP PHY registers to separate headers
  ...
2024-03-16 11:24:51 -07:00
Johan Hovold
47b412c1ea phy: qcom-qmp-combo: fix type-c switch registration
Due to a long-standing issue in driver core, drivers may not probe defer
after having registered child devices to avoid triggering a probe
deferral loop (see fbc35b45f9 ("Add documentation on meaning of
-EPROBE_DEFER")).

Move registration of the typec switch to after looking up clocks and
other resources.

Note that PHY creation can in theory also trigger a probe deferral when
a 'phy' supply is used. This does not seem to affect the QMP PHY driver
but the PHY subsystem should be reworked to address this (i.e. by
separating initialisation and registration of the PHY).

Fixes: 2851117f8f ("phy: qcom-qmp-combo: Introduce orientation switching")
Cc: stable@vger.kernel.org      # 6.5
Cc: Bjorn Andersson <quic_bjorande@quicinc.com>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240217150228.5788-7-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-03-06 20:37:37 +05:30
Johan Hovold
d2d7b8e880 phy: qcom-qmp-combo: fix drm bridge registration
Due to a long-standing issue in driver core, drivers may not probe defer
after having registered child devices to avoid triggering a probe
deferral loop (see fbc35b45f9 ("Add documentation on meaning of
-EPROBE_DEFER")).

This could potentially also trigger a bug in the DRM bridge
implementation which does not expect bridges to go away even if device
links may avoid triggering this (when enabled).

Move registration of the DRM aux bridge to after looking up clocks and
other resources.

Note that PHY creation can in theory also trigger a probe deferral when
a 'phy' supply is used. This does not seem to affect the QMP PHY driver
but the PHY subsystem should be reworked to address this (i.e. by
separating initialisation and registration of the PHY).

Fixes: 35921910bb ("phy: qcom: qmp-combo: switch to DRM_AUX_BRIDGE")
Fixes: 1904c3f578 ("phy: qcom-qmp-combo: Introduce drm_bridge")
Cc: stable@vger.kernel.org      # 6.5
Cc: Bjorn Andersson <quic_bjorande@quicinc.com>
Cc: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240217150228.5788-6-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-03-06 20:37:37 +05:30
Krzysztof Kozlowski
00ca8a15da phy: constify of_phandle_args in xlate
The xlate callbacks are supposed to translate of_phandle_args to proper
provider without modifying the of_phandle_args.  Make the argument
pointer to const for code safety and readability.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> #Broadcom
Link: https://lore.kernel.org/r/20240217093937.58234-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-23 17:43:14 +05:30
Dmitry Baryshkov
c01e03f97c phy: qcom: qmp: move common bits definitions to common header
Move bit definitions for the common headers to the common phy-qcom-qmp.h
header.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240126-phy-qmp-merge-common-v2-5-a463d0b57836@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-30 22:35:38 +05:30
Dmitry Baryshkov
ef643d55fd phy: qcom: qmp: split DP PHY registers to separate headers
Split the DP PHY register definitions to separate headers, removing them
from the global one.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240126-phy-qmp-merge-common-v2-4-a463d0b57836@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-30 22:35:38 +05:30
Dmitry Baryshkov
53d7776ea7 phy: qcom: qmp: move common functions to common header
Move common init tables code to the common header phy-qcom-qmp-common.h.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240126-phy-qmp-merge-common-v2-3-a463d0b57836@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-01-30 22:35:38 +05:30
Linus Torvalds
33a9caa499 Merge tag 'phy-for-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy
Pull phy updates from Vinod Koul:
 "New Support:

   - Qualcomm SM8650 UFS, PCIe and USB/DP Combo PHY, eUSB2 PHY, SDX75
     USB3, X1E80100 USB3 support

   - Mediatek MT8195 support

   - Rockchip RK3128 usb2 support

   - TI SGMII mode for J784S4

  Updates:

   - Qualcomm v7 register offsets updates

   - Mediatek tphy support for force phy mode switch"

* tag 'phy-for-6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (34 commits)
  phy: ti: j721e-wiz: Add SGMII support in WIZ driver for J784S4
  phy: ti: gmii-sel: Enable SGMII mode for J784S4
  phy: qcom-qmp-usb: Add Qualcomm X1E80100 USB3 PHY support
  dt-bindings: phy: qcom,sc8280xp-qmp-usb3-uni: Add X1E80100 USB PHY binding
  phy: qcom-qmp-combo: Add x1e80100 USB/DP combo phys
  dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: Document X1E80100 compatible
  dt-bindings: phy: qcom: snps-eusb2: Document the X1E80100 compatible
  phy: mediatek: tphy: add support force phy mode switch
  dt-bindings: phy: mediatek: tphy: add a property for force-mode switch
  phy: phy-can-transceiver: insert space after include
  phy: qualcomm: phy-qcom-qmp-ufs: Rectify SM8550 UFS HS-G4 PHY Settings
  dt-bindings: phy: qcom,sc8280xp-qmp-usb43dp-phy: fix path to header
  phy: renesas: phy-rcar-gen2: use select for GENERIC_PHY
  phy: qcom-qmp: qserdes-txrx: Add v7 register offsets
  phy: qcom-qmp: qserdes-txrx: Add V6 N4 register offsets
  phy: qcom-qmp: qserdes-com: Add v7 register offsets
  phy: qcom-qmp: pcs-usb: Add v7 register offsets
  phy: qcom-qmp: pcs: Add v7 register offsets
  phy: qcom-qmp: qserdes-txrx: Add some more v6.20 register offsets
  phy: qcom-qmp: qserdes-com: Add some more v6 register offsets
  ...
2024-01-18 17:11:43 -08:00
Abel Vesa
d7b3579f84 phy: qcom-qmp-combo: Add x1e80100 USB/DP combo phys
The X1E80100 has three copies of an USB/DP compbo PHY, add support for this
to the Qualcomm QMP PHY driver.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20231201-x1e80100-phy-combo-v1-2-6938ec41f3ac@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-12-21 22:39:59 +05:30
Dmitry Baryshkov
35921910bb phy: qcom: qmp-combo: switch to DRM_AUX_BRIDGE
Switch to using the new DRM_AUX_BRIDGE helper to create the
transparent DRM bridge device instead of handcoding corresponding
functionality.

Acked-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20231203114333.1305826-3-dmitry.baryshkov@linaro.org
2023-12-04 16:07:29 +02:00
Neil Armstrong
80c1afe8c5 phy: qcom: qmp-combo: add QMP USB3/DP PHY tables for SM8650
Add QMP USB3/DP Combo PHY support for the SM8650 platform.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231030-topic-sm8650-upstream-phy-v2-7-a543a4c4b491@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-11-16 17:01:02 +05:30
Dmitry Baryshkov
b5ec2824d7 phy: qcom-qmp-combo: use v6 registers in v6 regs layout
Make sure that we use only v6 registers in qmp_v6_usb3phy_regs_layout.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230928105445.1210861-4-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-10-13 15:35:21 +05:30
Dmitry Baryshkov
579483ecd8 phy: qcom-qmp-combo: fix the prefix for the PCS_USB v6 registers
For all other generations, we have been using just the QPHY prefix for
the PCS registers. Remove the _USB part of the QPHY_USB prefix.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230928105445.1210861-2-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-10-13 15:35:09 +05:30
Konrad Dybcio
76d20290d0 phy: qcom-qmp-combo: initialize PCS_USB registers
Currently, PCS_USB registers that have their initialization data in a
pcs_usb_tbl table are never initialized. Fix that.

Fixes: fc64623637 ("phy: qcom-qmp-combo,usb: add support for separate PCS_USB region")
Reported-by: Adrien Thierry <athierry@redhat.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230829-topic-8550_usbphy-v3-2-34ec434194c5@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-09-21 16:23:13 +02:00
Konrad Dybcio
112c23705c phy: qcom-qmp-combo: Square out 8550 POWER_STATE_CONFIG1
There are two instances of the POWER_STATE_CONFIG1 register: one in
the PCS space and another one in PCS_USB.

The downstream init sequence pokes the latter one while we've been poking
the former one (and misnamed it as the latter one, impostor!). Fix that
up to avoid UB.

Fixes: 49742e9eda ("phy: qcom-qmp-combo: Add support for SM8550")
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230829-topic-8550_usbphy-v3-1-34ec434194c5@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-09-21 16:23:13 +02:00
Dmitry Baryshkov
b83eb8ba2a phy: qcom-qmp-combo: fix clock probing
During rebase of qcom-qmp-combo series a call to devm_clk_bulk_get_all()
got moved by git from qmp_combo_parse_dt_legacy() to
phy_dp_clks_register(). This doesn't have any serious effect, since the
clocks will be set in both legacy and non-legacy paths. However let's
move it back to place anyway, to prevent the driver from fetching clocks
twice.

Fixes: 28e265bf84 ("phy: qcom-qmp-combo: simplify clock handling")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230820235813.562284-1-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-08-22 19:35:13 +05:30
Dmitry Baryshkov
486392f44d phy: qcom-qmp-combo: add qcom,sc7280-qmp-usb3-dp-phy compat entry
Add separate device entry for Combo USB+DP QMP PHY on sc7280 platform.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230711120916.4165894-5-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-24 16:25:39 +05:30
Dmitry Baryshkov
a542ae82df phy: qcom-qmp-combo: populate offsets for all combo PHYs
In order to support newer style bindings for combo PHYs, populate
offsets for all Combo QMP PHY configurations.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230711120916.4165894-4-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-24 16:25:39 +05:30
Dmitry Baryshkov
28e265bf84 phy: qcom-qmp-combo: simplify clock handling
For the existing PHYs for new binding we are going to drop ref_clk_src
clock and always use ref clock. Rather than introducing additional code
to handle legacy vs current bindings (and clock names), use
devm_clk_bulk_get_optional() when new bindings are used and
devm_clk_bulk_get_all() when legacy bindings are in place.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230711120916.4165894-3-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-24 16:25:39 +05:30
Rob Herring
7559e7572c phy: Explicitly include correct DT includes
The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.

Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> # for drivers/phy/phy-can-transceiver.c
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20230714174841.4061919-1-robh@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-17 11:52:56 +05:30
Dmitry Baryshkov
ec17373aeb phy: qcom: qmp-combo: extract common function to setup clocks
Extact qmp_combo_configure_dp_clocks(), a common function to setup PHY
clocks depending on the selected link rate.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230621153317.1025914-8-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12 22:27:43 +05:30
Dmitry Baryshkov
31a4ac6863 phy: qcom: qmp-combo: drop qmp_v6_dp_aux_init()
The only difference between qmp_v6_dp_aux_init() and
qmp_v4_dp_aux_init() is the address of COM_BIAS_EN_CLKBUFLR_EN register.
Move it to register layout and drop the duplicate function.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230621153317.1025914-7-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12 22:27:43 +05:30
Dmitry Baryshkov
9e6a0403f6 phy: qcom: qmp-combo: drop similar functions
The functions qmp_v5_configure_dp_phy() and qmp_v6_configure_dp_phy()
are now copies of qmp_v4_configure_dp_phy(). Drop them and use the v4
function in all the cases.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230621153317.1025914-6-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12 22:27:43 +05:30
Dmitry Baryshkov
cd1f334329 phy: qcom: qmp-combo: reuse register layouts for some more registers
Use register layout for TX_HIGHZ_DRVR_EN and TX_TRANSCEIVER_BIAS_EN
registers. This will allow us to unify qmp_v[456]_configure_dp_phy()
functions in the next commit.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230621153317.1025914-5-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12 22:27:42 +05:30
Dmitry Baryshkov
186ad90aa4 phy: qcom: qmp-combo: reuse register layouts for even more registers
Instead of passing additional registers to qmp_combo_configure_dp_swing(),
reuse qphy_reg_layout and add those registers to register layout maps.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230621153317.1025914-4-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12 22:27:42 +05:30
Dmitry Baryshkov
8447fa7f7e phy: qcom: qmp-combo: reuse register layouts for more registers
Instead of passing additional registers to qmp_v456_configure_dp_phy(),
reuse qphy_reg_layout and add those registers to register layout maps.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230621153317.1025914-3-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12 22:27:42 +05:30
Dmitry Baryshkov
6292fd920e phy: qcom: qmp-combo: correct bias0_en programming
It seems the commit a2e927b0e5 ("phy: qcom-qmp-combo: Add sc8280xp
USB/DP combo phys") contained a typo for selecting bias0_en values.
First, bias0_en and bias1_en are expected to be symmetrical, and then
the vendor driver also uses `flipped : 0x3E : 0x15` statement for
bias0_en. Correct bias0_en programming to follow this.

Fixes: 49742e9eda ("phy: qcom-qmp-combo: Add support for SM8550")
Fixes: a2e927b0e5 ("phy: qcom-qmp-combo: Add sc8280xp USB/DP combo phys")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230621153317.1025914-2-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12 22:27:42 +05:30
Dmitry Baryshkov
757a788c17 phy: qcom-qmp-combo: add support for the USB+DP PHY on SM8150 platform
SM8150 and SC8180X are close relatives. Reuse sc8180x data to support
USB+DP combo PHY on SM8150 platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230531023415.1209301-3-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12 22:27:41 +05:30
Neil Armstrong
6cd52a2a06 phy: qcom: qmp-combo: fix Display Port PHY configuration for SM8550
The SM8550 PHY also uses a different offset for the CMN_STATUS reg,
use the right one for the v6 Display Port configuration.

Fixes: 49742e9eda ("phy: qcom-qmp-combo: Add support for SM8550")
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230601-topic-sm8550-upstream-dp-phy-init-fix-v1-1-4e9da9f97991@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-06-21 17:46:35 +05:30
Bjorn Andersson
1904c3f578 phy: qcom-qmp-combo: Introduce drm_bridge
The QMP combo PHY sits in an of_graph connected between the DisplayPort
controller and a USB Type-C connector (or possibly a redriver).

The TCPM needs to be able to convey the HPD signal to the DisplayPort
controller, but no directly link is provided by DeviceTree so the signal
needs to "pass through" the QMP combo phy.

Handle this by introducing a drm_bridge which upon initialization finds
the next bridge (i.e. the usb-c-connector) and chain this together. This
way HPD changes in the connector will propagate to the DisplayPort
driver.

The connector bridge is resolved lazily, as the TCPM is expected to be
able to resolve the typec mux and switch at probe time, so the QMP combo
phy will probe before the TCPM.

Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Tested-by: Abel Vesa <abel.vesa@linaro.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on HDK8450
Tested-by: Johan Hovold <johan+linaro@kernel.org>	# X13s
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20230515032743.400170-7-quic_bjorande@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-19 23:17:19 +05:30
Bjorn Andersson
2851117f8f phy: qcom-qmp-combo: Introduce orientation switching
The data lanes of the QMP PHY is swapped in order to handle changing
orientation of the USB Type-C cable. Register a typec_switch device to
allow a TCPM to configure the orientation.

The newly introduced orientation variable is adjusted based on the
request, and the initialized components are brought down and up again.
To keep track of what parts needs to be cycled new variables to keep
track of the individual init_count is introduced.

Both the USB and the DisplayPort altmode signals are properly switched.
For DisplayPort the controller will after the TCPM having established
orientation power on the PHY, so this is not done implicitly, but for
USB the PHY typically is kept initialized across the switch, and must
therefore then be reinitialized.

This is based on initial work by Wesley Cheng.

Link: https://lore.kernel.org/r/20201009082843.28503-3-wcheng@codeaurora.org/
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Abel Vesa <abel.vesa@linaro.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on HDK8450
Tested-by: Johan Hovold <johan+linaro@kernel.org>	# X13s
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20230515032743.400170-6-quic_bjorande@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-19 23:17:19 +05:30
Bjorn Andersson
815891eee6 phy: qcom-qmp-combo: Introduce orientation variable
In multiple places throughout the driver code has been written in
prepration for handling of orientation switching.

Introduce a typec_orientation in qmp_combo and fill out the various
"placeholders" with the associated logic. By initializing the
orientation to "normal" this change has no functional impact, but
reduces the size of the upcoming introduction of dynamic orientation
switching.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Abel Vesa <abel.vesa@linaro.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on HDK8450
Tested-by: Johan Hovold <johan+linaro@kernel.org>	# X13s
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20230515032743.400170-5-quic_bjorande@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-19 23:17:19 +05:30
Bjorn Andersson
77cbca3a12 phy: qcom-qmp-combo: Extend phy_mutex to all phy_ops
The phy core ensures mutual exclusion across the ops for a given phy,
but the upcoming introduction of USB Type-C orientation switching might
race with the DisplayPort phy operations. So extend the mutual exclusion
to cover the remaining ops as well, to avoid concurrent reconfiguration
of the hardware.

Reported-by: Johan Hovold <johan@kernel.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20230515032743.400170-4-quic_bjorande@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-19 23:17:19 +05:30
Bjorn Andersson
02545aa310 phy: qcom-qmp-combo: Move phy_mutex out of com_init/exit
With the upcoming introduction of USB Type-C orientation switching the
region of mutual exclusion needs to be extended to cover both the common
init/exit as well as the individual functions.

So move the phy_mutex one step up the stack.

Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Tested-by: Abel Vesa <abel.vesa@linaro.org>
Tested-by: Steev Klimaszewski <steev@kali.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on HDK8450
Tested-by: Johan Hovold <johan+linaro@kernel.org>	# X13s
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Link: https://lore.kernel.org/r/20230515032743.400170-3-quic_bjorande@quicinc.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-19 23:17:19 +05:30
Johan Hovold
9bf03a0cbd phy: qcom-qmp-combo: fix init-count imbalance
The init counter is not decremented on initialisation errors, which
prevents retrying initialisation and can lead to the runtime suspend
callback attempting to disable resources that have never been enabled.

Add the missing decrement on initialisation errors so that the counter
reflects the state of the device.

Fixes: e78f3d15e1 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Cc: stable@vger.kernel.org	# 4.12
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230502103810.12061-2-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-08 14:39:42 +05:30
Dmitry Baryshkov
eb01687508 phy: qcom-qmp-combo: use qmp_combo_offsets_v3 instead of _v6
The qmp_combo_offsets_v3 table is already used for v3 and v4 PHYs. Reuse
it for v6 too, dropping the separate qmp_combo_offsets_v6.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230323144726.1614344-2-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-03-31 19:19:11 +05:30
Dmitry Baryshkov
4546334fc1 phy: qcom-qmp-combo: fix v3 offsets table
SM8350 and SM8450 use qmp_combo_offsets_v3 table, which doesn't have
PCS_USB offset. Add the usb3_pcs_usb entry to program correct registers
while setting up sm8350 and sm8450 USB+DP combo PHYs.

Fixes: 05bd18348b ("phy: qcom-qmp-combo: Add config for SM6350")
Cc: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230323144726.1614344-1-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-03-31 19:19:10 +05:30
Abel Vesa
49742e9eda phy: qcom-qmp-combo: Add support for SM8550
Add SM8550 specific register layout and table configs.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20230208183421.2874423-7-abel.vesa@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-02-10 22:33:44 +05:30
Abel Vesa
39bbf82d8c phy: qcom-qmp: pcs-usb: Add v6 register offsets
The new SM8550 SoC bumps up the HW version of QMP phy to v6 for USB.
Add the new PCS USB specific offsets in a dedicated header file.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230208183421.2874423-5-abel.vesa@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-02-10 22:32:43 +05:30
Neil Armstrong
ef14aff107 phy: qcom: com-qmp-combo: add SM8350 & SM8450 support
Copy the USB tables from the QMP USB3 PHY driver and add the
missing DP tables from downstream to enable USB3/DP on
the SM8350 and SM8450 platforms.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230206-topic-sm8350-upstream-usb-dp-combo-phy-v1-2-ed849ae6b849@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-02-10 22:25:10 +05:30
Luca Weiss
05bd18348b phy: qcom-qmp-combo: Add config for SM6350
Add the tables and config for the combo phy found on SM6350.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20230120-sm6350-usbphy-v4-2-4d700a90ba16@fairphone.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-02-02 18:49:20 +05:30
Dmitry Baryshkov
aa14cff16b phy: qcom-qmp-combo: rework regs layout arrays
Use symbolic names for the values inside reg layout arrays. New register
names are added following the PCS register layout that is used by the
particular PHY.

Note: ipq8074 tables appear to use a mixture of v2 and v3 registers.
This might need additional fixes.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230113212102.421491-2-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-01-18 22:54:09 +05:30
Dmitry Baryshkov
34d562babf phy: qcom-qmp-combo: remove QPHY_PCS_LFPS_RXTERM_IRQ_STATUS reg
The QPHY_PCS_LFPS_RXTERM_IRQ_STATUS register is not used, remove it from
register layout.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20230113212102.421491-1-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-01-18 22:54:09 +05:30
Dmitry Baryshkov
eb5793fbea phy: qcom-qmp: move type-specific headers to particular driver
Remove QMP PHY type-specific headers inclusion from the common header
and move them to the specific PHY drivers to cleanup the namespaces used
by different drivers.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221110192248.873973-14-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-01-12 22:49:10 +05:30
Johan Hovold
83a0bbe39b phy: qcom-qmp-combo: add support for updated sc8280xp binding
Add support for the new SC8280XP binding.

Note that the binding does not try to describe every register subregion
and instead the driver holds the corresponding offsets.

Also note that (possibly) unlike on earlier platforms, the TX registers
are used by both the USB and DP implementation.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20221121085058.31213-14-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-11-24 22:51:51 +05:30
Johan Hovold
133836a7ed phy: qcom-qmp-combo: rename DP_PHY register pointer
The DP_PHY registers have erroneously been referred to as "PCS"
registers since DisplayPort support was added to the QMP drivers
(including in the devicetree binding).

Rename the corresponding pointer to match the register names.

Note that the repeated "dp" in the field name is intentional and this DP
register block is called "DP_PHY" (not just "PHY").

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20221121085058.31213-13-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-11-24 22:51:51 +05:30
Johan Hovold
9e5b59ea6c phy: qcom-qmp-combo: rename common-register pointers
The common registers are shared by the USB and DP parts of the PHY so
drop the misleading "dp" prefix from the corresponding pointers.

Note that the "DP" prefix could also be dropped from the corresponding
defines, but leave that in place for now.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20221121085058.31213-12-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-11-24 22:51:51 +05:30
Johan Hovold
b71bf1ebe9 phy: qcom-qmp-combo: clean up DP clock callbacks
Clean up the DP clock callbacks somewhat by dropping the redundant
"qcom" prefix and removing line breaks after type specifiers.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20221121085058.31213-11-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-11-24 22:51:51 +05:30
Johan Hovold
ce51f7a70a phy: qcom-qmp-combo: separate clock and provider registration
In preparation for supporting devicetree bindings which do not use child
nodes, separate clock registration from clock-provider registration.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20221121085058.31213-10-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-11-24 22:51:51 +05:30
Johan Hovold
74401c85fb phy: qcom-qmp-combo: add clock registration helper
In preparation for supporting devicetree bindings which do not use child
nodes, add a clock registration helper to handle the registration of
both the USB and DP clocks.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Link: https://lore.kernel.org/r/20221121085058.31213-9-johan+linaro@kernel.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-11-24 22:51:51 +05:30