4 Commits

Author	SHA1	Message	Date
Gabriel Fernandez	0829ea5af6	drivers: clk: st: Correct the pll-type for A9 for stih418 ... Add support for new PLL-type for stih418 A9-PLL. Currently the 407_A9_PLL type being used, it is corrected with this patch 4600c28 PLL allows to reach higher frequencies so its programming algorithm is extended. Signed-off-by: Pankaj Dev <pankaj.dev@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>	2015-10-08 23:52:59 -07:00
Gabriel Fernandez	5eb26c6059	ARM: STi: DT: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x ... Use a generic name for this kind of PLL Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>	2015-07-22 11:41:33 +02:00
Gabriel FERNANDEZ	0268099c89	clk: st: Update ST clock binding documentation ... Naming convention was changed in dts file but the clock binding documentation hasn't been updated. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Acked-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>	2014-07-28 22:35:17 -07:00
Gabriel FERNANDEZ	8b221488b7	clk: st: Adds clockgen clock binding ... Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>	2014-03-25 15:59:30 -07:00