Commit Graph

27090 Commits

Author SHA1 Message Date
Tomi Valkeinen
b7536d6745 drm/omap: DISPC: Fix field order for HDMI
Interlace field order is different between VENC and HDMI. The driver
currently sets the field order for VENC.

This patch adds the code to set the field order for HDMI.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-03-03 17:36:43 +02:00
Tomi Valkeinen
b2af809241 drm/omap: HDMI: fix WP timings for ilace
The HDMI WP timings are not programmed correctly for interlace.

We need to halve the vertical timings when interlace is used, and double
the horizontal timings when pixel doubling is used.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-03-03 17:36:42 +02:00
Tomi Valkeinen
c92e87276c drm/omap: HDMI: Fix HSW value
On OMAP4 and OMAP5 ES1.0 the HDMI_WP_VIDEO_TIMING_H:HSW field is
set directly to the HSW value. On later SoCs the field needs to be
programmed with the value of HSW-1.

Currently the driver always programs the field with the HSW value. Most
videomodes seem to work fine with that, but at least low resolution
interlaced modes don't work at all.

This patch fixes the HSW for OMAP5 ES2.0+ SoCs.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-03-03 17:36:42 +02:00
Tomi Valkeinen
67d8ffdd68 drm/omap: HDMI: support double-pixel pixel clock
We need double-pixel mode (pixel repetition) for interlace modes. This
patch adds the necessary support to HDMI to double the pixel clock when
double-pixel mode is used.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-03-03 17:36:42 +02:00
Tomi Valkeinen
2535895895 drm/omap: support double-pixel
We need double-pixel mode (pixel repetition) for interlace modes. This
patch adds the necessary support to omapdrm to output double-pixel mode.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-03-03 17:36:42 +02:00
Tomi Valkeinen
3a38ed53be drm/omap: DISPC: support double-pixel mode
We need double-pixel mode (pixel repetition) for interlace modes. This
patch adds the necessary support to DISPC to output double-pixel mode.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-03-03 17:36:42 +02:00
Tomi Valkeinen
61f3c40b48 drm/omap: increase vblank wait timeout
omap_crtc_wait_pending() waits until the config changes have been taken
into use, usually at next vblank. The wait-timeout used is 50ms, which
usually is enough, but in some rare cases not.

As time wait-timeout is just a safety measure for cases where something
is broken, we can just as well increase the timeout considerably.

This patch makes the timeout 250ms.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-03-03 17:36:42 +02:00
Tomi Valkeinen
3f50effdb8 drm/omap: remove support for ext mem & sync
We no longer have the omapdrm plugin system for SGX, and we can thus
remove the support for external memory and sync objects from omap_gem.c.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-03-03 17:36:42 +02:00
Laurent Pinchart
b22e6690a3 drm/omap: gem: Implement dma_buf import
OMAP GEM objects backed by dma_buf reuse the current OMAP GEM object
support as much as possible. If the imported buffer is physically
contiguous its physical address will be used directly, reusing the
OMAP_BO_MEM_DMA_API code paths. Otherwise it will be mapped through the
TILER using a pages list created from the scatterlist instead of the
shmem backing storage.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-03-03 17:36:42 +02:00
Laurent Pinchart
9cba3b9945 drm/omap: gem: Refactor GEM object allocation
Split the individual steps of GEM object allocation and initialization
clearly. This improves readability and prepares for dma_buf import
support.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-03-03 17:36:42 +02:00
Laurent Pinchart
cdb0381d2f drm/omap: gem: Clean up GEM objects memory flags
The driver assumes that only objects backed by shmem need to be mapped
through DMM. While this is true with the current code, the assumption
won't hold with dma_buf import support.

Condition the mapping based on whether the buffer has been allocated
using the DMA mapping API instead and clean up the flags to avoid having
to check both flags and GEM object filp field to decide how to process
buffers. Flags are not the authoritative source of information regarding
where the buffer memory comes from, and are renamed to make that
clearer.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2016-03-03 17:36:41 +02:00
Tomi Valkeinen
8d83bbd119 drm/omap: print an error if display enable fails
If the panel's enable fails, omap_encoder silently ignores the failure.
omapdrm should really handle the failure, but unfortunately the whole
encoder enable codepath is expected to always succeed.

So for now, catch the enable failure and print an error.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-03-03 17:36:41 +02:00
Tomi Valkeinen
a3d6345d31 drm/omap: use dma_mapping_error in omap_gem_dma_sync
omap_gem_dma_sync() calls dma_map_page() but does not check the possible
error with dma_mapping_error(). If DMA-API debugging is enabled, the
debug layer will give a warning if dma_mapping_error() has not been
used.

This patch adds proper error handling to omap_gem_dma_sync().

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-03-03 17:36:41 +02:00
Tomi Valkeinen
579ef2541b drm/omap: use dma_mapping_error in omap_gem_attach_pages
omap_gem_attach_pages() calls dma_map_page() but does not check the
possible error with dma_mapping_error(). If DMA-API debugging is
enabled, the debug layer will give a warning if dma_mapping_error() has
not been used.

This patch adds proper error handling to omap_gem_attach_pages().

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-03-03 17:36:41 +02:00
Manisha Agrawal
d8e316376c drm/omap: tpd12s015: CT_CP_HPD as optional gpio
tpd12s015 HW has LS_OE, CT_CP_HPD and HPD gpios. Out of these gpios,
driver only handled LS_OE as optional. The CT_CP_HPD gpio should also
be treated as optional gpio as it is just a power saving feature. Some
boards hardwire this gpio to be always enable. In this patch, all access
to CT_CP_HPD gpio is made optional.

Signed-off-by: Manisha Agrawal <manisha.agrawal@ti.com>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-03-03 17:36:41 +02:00
Manisha Agrawal
460543ba29 drm/omap: tpd12s015: gpio descriptor API
Migrated the gpio APIs to descriptor-interface based.

Signed-off-by: Manisha Agrawal <manisha.agrawal@ti.com>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-03-03 17:36:41 +02:00
Manisha Agrawal
45dd63c479 drm/omap: tpd12s015: remove platform data support
All devices using tpd12s015 driver are doing DT boot. No need of further
supporting the platform data. This patch removes support for platform
data.

Signed-off-by: Manisha Agrawal <manisha.agrawal@ti.com>
[tomi.valkeinen@ti.com: minor adjustments]
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-03-03 17:36:41 +02:00
Jyri Sarha
a7696ea740 drm/omap: drm_atomic_get_plane_state() may return ERR_PTR
drm_atomic_get_plane_state() may return ERR_PTR. Handle
drm_atomic_get_plane_state() return values right in
omap_crtc_atomic_set_property().

Signed-off-by: Jyri Sarha <jsarha@ti.com>
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-03-03 17:36:41 +02:00
Tomi Valkeinen
8e54adfd9c drm/omap: add dmm_read() and dmm_write() wrappers
This patch adds wrapper functions for readl() and writel(), dmm_read()
and dmm_write(), so that we can implement workaround for DRA7 errata
i878.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-03-03 17:36:40 +02:00
Tomi Valkeinen
2bb2daf3fa HACK: drm/omap: always use blocking DMM fill
The current driver uses non-blocking DMM fill when releasing memory.
This gives us a small performance increase as we don't have to wait for
the fill operation to finish.

However, the driver does not have any error handling for non-blocking
fill. In case of an error, the fill operation may silently fail, leading
to leaking DMM engines, which may eventually lead to deadlock if we run
out of DMM engines.

This patch makes the DMM driver always use blocking fills, so that we
can catch the errors. A more complex option would be to allow
non-blocking fills, and implement proper error handling, but that is
left for the future.

This patch is a HACK, as the proper fix is to either decide to always
use sync fills and remove all the async related code, or fix the async
code.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-03-03 17:36:40 +02:00
Tomi Valkeinen
4e4b53ceb5 drm/omap: HDMI: change enable/disable to avoid sync-losts
We occasionally see DISPC sync-lost errors when enabling and disabling
HDMI. Sometimes we get only a few, which get handled (ignored) by the
driver, but sometimes there's a flood of the errors which doesn't seem
to stop.

The HW team has root caused this to the order in which HDMI and DISPC
are enabled/disabled. Currently we enable HDMI first, and then DISPC,
and vice versa when disabling. HW team's suggestion is to do it the
other way around.

This patch changes the order, but this has two side effects as the pixel
clock is produced by HDMI, and the clock is not running when we
enable/disable DISPC:

* When enabling DISPC first, we don't get vertical sync events
* When disabling DISPC last, we don't get FRAMEDONE event

At the moment we use both of those to verify that DISPC has been
enabled/disabled properly. Thus this patch also needs to change the
omapdrm and omapdss which handle the DISPC side.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-03-03 17:36:40 +02:00
Deepak M
782d25cac6 drm/i915/bxt: Additional MIPI clock divider form B0 stepping onwards
The MIPI clock calculations for the addtional clock
are revised from B0 stepping onwards, the bit definitions
have changed compared to old stepping.

v2: Fixing compilation warning.
v3: Retained the old Macros (Jani)

Signed-off-by: Deepak M <m.deepak@intel.com>
Tested-by: Ramalingam C <ramalingam.c@intel.com> # BXT-T with Tianma panel
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1455556437-29267-1-git-send-email-m.deepak@intel.com
2016-03-03 15:05:52 +02:00
Maarten Lankhorst
e3bddded40 drm/i915: Only recalculate wm's for planes part of the state, v2.
Only planes that are part of the state should be used for recalculating
watermarks. For planes not part of the state the previous patch allows
us to re-use the old values since they're calculated even for levels
that are not actively used.

Changes since v1:
- Remove big if from intel_crtc_atomic_check.
- Remove extra newline.
- Remove memset in ilk_compute_pipe_wm.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Matt Roper <matthew.d.roper@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1456826842-32553-2-git-send-email-maarten.lankhorst@linux.intel.com
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2016-03-03 09:20:39 +01:00
Maarten Lankhorst
d81f04c5ef drm/i915: Allow preservation of watermarks, v2.
As Paulo has noted we can help bisectability by separating computing
watermarks on a noop in 2 separate commits.

This patch no longer clears the crtc watermark state, but recalculates
it completely. Regardless whether a level is used the full values for
each level are calculated. If a level is invalid wm[level].enable is
unset.

Changes since v1:
- Only call ilk_validate_wm_level when level <= usable_level. (Ville)

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/56D6D09E.5040007@linux.intel.com
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
2016-03-03 09:18:33 +01:00
Maarten Lankhorst
1a426d6116 drm/i915: Handle invalid ilk pipe watermarks correctly.
This function returns an int, but when ilk_validate_pipe_wm fails it
returns false, which is 0 (success). As a result invalid watermarks
are applied, while they should have been rejected.

Fix this by returning -EINVAL.

Fixes: ed4a6a7ca8 ("drm/i915: Add two-stage ILK-style watermark programming (v11)")
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1456918563-28696-1-git-send-email-maarten.lankhorst@linux.intel.com
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
2016-03-03 09:17:42 +01:00
Arnd Bergmann
52807ae90e drm/sti: use u32 to store DMA addresses
The STi drm driver correctly warns about invalid format strings
when built with 64-bit dma_addr_t:

sti_hqvdp.c: In function 'sti_hqvdp_vtg_cb':
sti_hqvdp.c:605:119: warning: format '%x' expects argument of type
'unsigned int', but argument 5 has type 'dma_addr_t {aka long long
unsigned int}' [-Wformat=]
sti_hqvdp.c: In function 'sti_hqvdp_atomic_update':
sti_hqvdp.c:931:118: warning: format '%x' expects argument of type
'unsigned int', but argument 5 has type 'dma_addr_t {aka long long
unsigned int}' [-Wformat=]

This could be changed to using the %pad format string, but that
does not work when printing an rvalue, so instead I'm changing
the type in the sti_hqvdp structure to u32, which is what gets
written into the registers anyway.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Vincent Abriou <vincent.abriou@st.com>
2016-03-03 09:17:17 +01:00
Benjamin Gaignard
ffd157ce6e drm: sti: remove sti_gem_prime_export hack
Thanks to "drm: prime: Honour O_RDWR during prime-handle-to-fd"
commit we don't need to hack flags anymore.

Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Reviewed-by: Vincent Abriou <vincent.abriou@st.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2016-03-03 09:15:37 +01:00
Flora Cui
6157bd7a10 drm/amdgpu: fix rb bitmap & cu bitmap calculation
Fix some copy paste typos.

Signed-off-by: Flora Cui <Flora.Cui@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-03 01:00:20 -05:00
Dave Airlie
f0511e6611 Merge branch 'drm-fixes-4.5' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
Fixes for radeon and amdgpu:
- Fix GPUVM flushing on CI and VI
- Misc DPM and Powerplay fixes
- VCE DPM fixes for CZ/ST
- DP hotplug fix

* 'drm-fixes-4.5' of git://people.freedesktop.org/~agd5f/linux:
  drm/amdgpu: return from atombios_dp_get_dpcd only when error
  drm/amdgpu/cz: remove commented out call to enable vce pg
  drm/amdgpu/powerplay/cz: enable/disable vce dpm independent of vce pg
  drm/amdgpu/cz: enable/disable vce dpm even if vce pg is disabled
  drm/amdgpu/gfx8: specify which engine to wait before vm flush
  drm/amdgpu: apply gfx_v8 fixes to gfx_v7 as well
  drm/amd/powerplay: send event to notify powerplay all modules are initialized.
  drm/amd/powerplay: export AMD_PP_EVENT_COMPLETE_INIT task to amdgpu.
  drm/radeon/pm: update current crtc info after setting the powerstate
  drm/amdgpu/pm: update current crtc info after setting the powerstate
2016-03-03 11:37:07 +10:00
Archit Taneja
52cde8dc8f drm/msm/dsi: Drop VDD regulator for MSM8916
VDD regulator input was specified for MSM8916. It turns our that this
regulator is used for the display panels used on MSM8916 platforms, but
not the DSI controller itself. Drop this regulator from the list.

Reported-by: Vinay Simha <vinaysimha@inforcecomputing.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-02 16:19:47 -05:00
Archit Taneja
06cfdc0ba5 drm/msm/dsi: Remove incorrect warning on host attach
With the implementation of of_graph parsing, it isn't any longer
necessary for msm_host->device node to be same as dsi->dev.of_node. This
only holds true when the connected device is also a child of the dsi_host.

In the case of external bridge chips belonging to a different control
bus, these are guaranteed to be different.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-02 16:19:46 -05:00
Archit Taneja
1aaa57f5d4 drm/msm: Free fb helper resources in msm_unload
We have a msm_fbev_free function to uninit fb_helper stuff, but we aren't
using it. Call it in msm_unload.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-02 16:19:45 -05:00
Sricharan R
f759020530 drm/msm/mdp: Detach iommu in mdp4_destroy
attach_dev gets called in mdp4_kms_init, but there is no corresponding
detach_dev called in the error path or in the kms driver unload path.

Detach and destroy mmu in mdp4_destroy.

Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-02 16:19:44 -05:00
Rob Clark
d72ab59931 drm/msm: make iommu port names const'ier
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-02 16:19:43 -05:00
Archit Taneja
4103eef98c drm/msm/mdp: Use atomic helper to set crtc property
Assign drm_atomic_helper_crtc_set_property helper to MDP4 and MDP5
crtcs' set_property ops. This replaces the custom funcs that
returned an error even for standard crtc properties.

Signed-off-by: Archit Taneja <architt@codeaurora.org>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: Rob Clark <robdclark@gmail.com>
2016-03-02 16:19:41 -05:00
Sagar Arun Kamble
933bfb44b2 drm/i915: Hold RPM reference while setting freq limits through sysfs
This changes ensures device is active when frequency limits are changed.
This is needed as we are writing to register RPNSWREQ in intel_set_rps.
If not done, might lead to undesired errors like:
[ 1965.189137] [drm:fw_domains_get] *ERROR* blitter: timed out waiting for forcewake ack to clear.

v2: Added elaborate commit message. (Jani)
    Fixing RPM reference drop in early exit paths. (Ville)

Signed-off-by: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1454951831-11778-1-git-send-email-sagar.a.kamble@intel.com
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
2016-03-02 18:50:47 +02:00
Laurent Pinchart
c8a3b2ae07 drm/bridge: Make (pre/post) enable/disable callbacks optional
Instead of forcing bridges to implement empty callbacks make them all
optional.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-03-02 17:31:03 +01:00
Maciej S. Szmigiero
06a9dc65af drm/panel: simple: Add URT UMSH-8596MD-xT panels support
Add support for United Radiant Technology UMSH-8596MD-xT 7.0" WVGA TFT
LCD panels in the simple-panel driver.

Signed-off-by: Maciej S. Szmigiero <mail@maciej.szmigiero.name>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-03-02 17:16:46 +01:00
Jitao Shi
690d8fa70d drm/panel: simple: Support for LG lp120up1 panel
The LG lp120up1 TFT LCD panel with eDP interface is a 12.0" 1920x1280
panel, which can be supported by the simple panel driver.

Signed-off-by: Jitao Shi <jitao.shi@mediatek.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-03-02 17:09:46 +01:00
Akshay Bhat
2e8c5eb9ef drm/panel: simple: Fix g121x1_l03 hsync/vsync polarity
Set hsync/vsync to active low for g121x1_l03 panel to match the
recommended setting in the datasheet.

Signed-off-by: Akshay Bhat <akshay.bhat@timesys.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-03-02 17:05:01 +01:00
Archit Taneja
97b6ae50e0 drm/dsi: Get DSI host by DT device node
MIPI DSI devices are inherently aware of their host because they share a
parent-child hierarchy in the device tree.

Non-DSI drivers that create DSI device don't have this data. In order to
get this information, they require to a phandle to the DSI host in the
device tree.

Maintain a list of all the DSI hosts that are currently registered. This
list will be used to find the struct mipi_dsi_host corresponding to the
device tree node passed to of_find_mipi_dsi_host_by_node().

Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-03-02 17:02:54 +01:00
Archit Taneja
509e42ce04 drm/dsi: Add routine to unregister a DSI device
A driver calling mipi_dsi_device_register_full() might want to remove
the device once it's done. It might also require it in an error handling
path in case something went wrong.

Create mipi_dsi_device_unregister() for this purpose and use it within
mipi_dsi_remove_device_fn() as it does the same thing.

Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Archit Taneja <architt@codeaurora.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-03-02 17:02:10 +01:00
Arindam Nath
0b39c531cf drm/amdgpu: return from atombios_dp_get_dpcd only when error
In amdgpu_connector_hotplug(), we need to start DP link
training only after we have received DPCD. The function
amdgpu_atombios_dp_get_dpcd() returns non-zero value only
when an error condition is met, otherwise returns zero.
So in case the function encounters an error, we need to
skip rest of the code and return from amdgpu_connector_hotplug()
immediately. Only when we are successfull in reading DPCD
pin, we should carry on with turning-on the monitor.

Signed-off-by: Arindam Nath <arindam.nath@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-03-02 11:01:25 -05:00
Alex Deucher
89913ea615 drm/amdgpu/cz: remove commented out call to enable vce pg
This code path is not currently enabled now that we properly
respect the vce pg flags, so uncomment the actual pg calls
so the code is as it should be we are eventually able to
enable vce pg.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-02 11:01:24 -05:00
Alex Deucher
370afa7ac5 drm/amdgpu/powerplay/cz: enable/disable vce dpm independent of vce pg
If we don't disable it when vce is not in use, we use extra power
if vce pg is disabled.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-02 11:01:24 -05:00
Alex Deucher
b3dae78283 drm/amdgpu/cz: enable/disable vce dpm even if vce pg is disabled
I missed this when cleaning up the vce pg handling.

Reviewed-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-02 11:01:23 -05:00
Chunming Zhou
9cac537332 drm/amdgpu/gfx8: specify which engine to wait before vm flush
Select between me and pfp properly.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-02 11:01:23 -05:00
Christian König
feebe91aa9 drm/amdgpu: apply gfx_v8 fixes to gfx_v7 as well
We never ported that back to CIK, so we could run into VM faults here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-03-02 11:01:22 -05:00
Rex Zhu
4ea2efae0d drm/amd/powerplay: send event to notify powerplay all modules are initialized.
with this event, powerplay can adjust current power state if needed.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-02 11:01:22 -05:00
Rex Zhu
dc26a2a2b3 drm/amd/powerplay: export AMD_PP_EVENT_COMPLETE_INIT task to amdgpu.
This is needed to init the dynamic states without a display.  To be
used in the next commit.

Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-03-02 11:01:21 -05:00