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Author SHA1 Message Date
Linus Torvalds
ce5cfb0fa2 Merge tag 'iommu-updates-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux 
Pull iommu updates from Joerg Roedel:

 - Introduction of the generic IO page-table framework with support for
   Intel and AMD IOMMU formats from Jason.

   This has good potential for unifying more IO page-table
   implementations and making future enhancements more easy. But this
   also needed quite some fixes during development. All known issues
   have been fixed, but my feeling is that there is a higher potential
   than usual that more might be needed.

 - Intel VT-d updates:
    - Use right invalidation hint in qi_desc_iotlb()
    - Reduce the scope of INTEL_IOMMU_FLOPPY_WA

 - ARM-SMMU updates:
    - Qualcomm device-tree binding updates for Kaanapali and Glymur SoCs
      and a new clock for the TBU.
    - Fix error handling if level 1 CD table allocation fails.
    - Permit more than the architectural maximum number of SMRs for
      funky Qualcomm mis-implementations of SMMUv2.

 - Mediatek driver:
    - MT8189 iommu support

 - Move ARM IO-pgtable selftests to kunit

 - Device leak fixes for a couple of drivers

 - Random smaller fixes and improvements

* tag 'iommu-updates-v6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux: (81 commits)
  iommupt/vtd: Support mgaw's less than a 4 level walk for first stage
  iommupt/vtd: Allow VT-d to have a larger table top than the vasz requires
  powerpc/pseries/svm: Make mem_encrypt.h self contained
  genpt: Make GENERIC_PT invisible
  iommupt: Avoid a compiler bug with sw_bit
  iommu/arm-smmu-qcom: Enable use of all SMR groups when running bare-metal
  iommupt: Fix unlikely flows in increase_top()
  iommu/amd: Propagate the error code returned by __modify_irte_ga() in modify_irte_ga()
  MAINTAINERS: Update my email address
  iommu/arm-smmu-v3: Fix error check in arm_smmu_alloc_cd_tables
  dt-bindings: iommu: qcom_iommu: Allow 'tbu' clock
  iommu/vt-d: Restore previous domain::aperture_end calculation
  iommu/vt-d: Fix unused invalidation hint in qi_desc_iotlb
  iommu/vt-d: Set INTEL_IOMMU_FLOPPY_WA depend on BLK_DEV_FD
  iommu/tegra: fix device leak on probe_device()
  iommu/sun50i: fix device leak on of_xlate()
  iommu/omap: simplify probe_device() error handling
  iommu/omap: fix device leaks on probe_device()
  iommu/mediatek-v1: add missing larb count sanity check
  iommu/mediatek-v1: fix device leaks on probe()
  ...
 2025-12-04 18:05:06 -08:00
Linus Torvalds
6044a1ee9d Merge tag 'devicetree-for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux 
Pull devicetree updates from Rob Herring:
 "DT bindings:

   - Convert lattice,ice40-fpga-mgr, apm,xgene-storm-dma,
     brcm,sr-thermal, amazon,al-thermal, brcm,ocotp, mt8173-mdp, Actions
     Owl SPS, Marvell AP80x System Controller, Marvell CP110 System
     Controller, cznic,moxtet, and apm,xgene-slimpro-mbox to DT schema
     format

   - Add i.MX95 fsl,irqsteer, MT8365 Mali Bifrost GPU, Anvo ANV32C81W
     EEPROM, and Microchip pic64gx PLIC

   - Add missing LGE, AMD Seattle, and APM X-Gene SoC platform
     compatibles

   - Updates to brcm,bcm2836-l1-intc, brcm,bcm2835-hvs, and bcm2711-hdmi
     bindings to fix warnings on BCM2712 platforms

   - Drop obsolete db8500-thermal.txt

   - Treewide clean-up of extra blank lines and inconsistent quoting

   - Ensure all .dtbo targets are applied to a base .dtb

   - Speed up dt_binding_check by skipping running validation on empty
     examples

  DT core:

   - Add of_machine_device_match() and of_machine_get_match_data()
     helpers and convert users treewide

   - Fix bounds checking of address properties in FDT code. Rework the
     code to have a single implementation of the bounds checks.

   - Rework of_irq_init() to ignore any implicit interrupt-parent (i.e.
     in a parent node) on nodes without an interrupt. This matches the
     spec description and fixes some RISC-V platforms.

   - Avoid a spurious message on overlay removal

   - Skip DT kunit tests on RISCV+ACPI"

* tag 'devicetree-for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (55 commits)
  dt-bindings: kbuild: Skip validating empty examples
  dt-bindings: interrupt-controller: brcm,bcm2836-l1-intc: Drop interrupt-controller requirement
  dt-bindings: display: Fix brcm,bcm2835-hvs bindings for BCM2712
  dt-bindings: display: bcm2711-hdmi: Add interrupt details for BCM2712
  of: Skip devicetree kunit tests when RISCV+ACPI doesn't populate root node
  soc: tegra: Simplify with of_machine_device_match()
  soc: qcom: ubwc: Simplify with of_machine_get_match_data()
  powercap: dtpm: Simplify with of_machine_get_match_data()
  platform: surface: Simplify with of_machine_get_match_data()
  irqchip/atmel-aic: Simplify with of_machine_get_match_data()
  firmware: qcom: scm: Simplify with of_machine_device_match()
  cpuidle: big_little: Simplify with of_machine_device_match()
  cpufreq: sun50i: Simplify with of_machine_device_match()
  cpufreq: mediatek: Simplify with of_machine_get_match_data()
  cpufreq: dt-platdev: Simplify with of_machine_get_match_data()
  of: Add wrappers to match root node with OF device ID tables
  dt-bindings: eeprom: at25: Add Anvo ANV32C81W
  of/reserved_mem: Simplify the logic of __reserved_mem_alloc_size()
  of/reserved_mem: Simplify the logic of fdt_scan_reserved_mem_reg_nodes()
  of/reserved_mem: Simplify the logic of __reserved_mem_reserve_reg()
  ...
 2025-12-04 15:50:37 -08:00
Akhil P Oommen
3b9b0816f9 dt-bindings: arm-smmu: Add Kaanapali and Glymur GPU SMMU 
Update the devicetree bindings to document the GPU SMMUs present in
Kaanapali and Glymur chipsets.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/689028/
Message-ID: <20251118-kaana-gpu-support-v4-19-86eeb8e93fb6@oss.qualcomm.com>
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
 2025-11-18 09:04:13 -08:00
Rob Herring (Arm)
0b2333183a dt-bindings: Remove extra blank lines 
Generally at most 1 blank line is the standard style for DT schema
files. Remove the few cases with more than 1 so that the yamllint check
for this can be enabled.

Acked-by: Lee Jones <lee@kernel.org>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> # remoteproc
Acked-by: Georgi Djakov <djakov@kernel.org>
Acked-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Andi Shyti <andi.shyti@kernel.org>
Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Uwe Kleine-König <ukleinek@kernel.org> # for allwinner,sun4i-a10-pwm.yaml
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> # mtd
Acked-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Manivannan Sadhasivam <mani@kernel.org> # For PCI controller bindings
Link: https://patch.msgid.link/20251023143957.2899600-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
 2025-11-17 11:24:50 -06:00
Jingyi Wang
45859c059c dt-bindings: arm-smmu: Add compatible for Kaanapali and Glymur SoCs 
Qualcomm Kaanapali and Glymur SoCs include apps smmu that implements
arm,mmu-500, which is used to translate device-visible virtual addresses
to physical addresses. Add compatible for these items.

Co-developed-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com>
Signed-off-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com>
Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Will Deacon <will@kernel.org>
 2025-11-03 15:55:07 +00:00
Konrad Dybcio
ac1207f516 dt-bindings: arm-smmu: Remove sdm845-cheza specific entry 
The firmware on SDM845-based Cheza boards did not provide the same
level of feature support for SMMUs (particularly around the Adreno
GPU integration).

Now that Cheza is being removed from the kernel (almost none exist at
this point in time), retire the entry as well.

Most notably, it's not being marked as deprecated instead, as there is
no indication that any more of those ~7 year old devboards will be
built.

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Robin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/20250716-topic-goodnight_cheza-v2-3-6fa8d3261813@oss.qualcomm.com
Signed-off-by: Will Deacon <will@kernel.org>
 2025-07-17 10:30:06 +01:00
Luca Weiss
2f0187392c dt-bindings: arm-smmu: document the support on Milos 
Add compatible for smmu representing support on the Milos SoC.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250713-sm7635-fp6-initial-v2-1-e8f9a789505b@fairphone.com
Signed-off-by: Will Deacon <will@kernel.org>
 2025-07-15 11:40:41 +01:00
Pratyush Brahma
df90abbc31 dt-bindings: arm-smmu: Document QCS8300 GPU SMMU 
Add the compatible for Qualcomm QCS8300 GPU SMMU. Add the compatible
in the list of clocks required by the GPU SMMU and remove it from the
list of disallowed clocks.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Pratyush Brahma <quic_pbrahma@quicinc.com>
Link: https://lore.kernel.org/r/20250310-b4-branch-gfx-smmu-v6-1-15c60b8abd99@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2025-03-11 13:18:38 +00:00
Melody Olvera
2593988fd0 dt-bindings: arm-smmu: Document SM8750 SMMU 
Document the SM8750 SMMU block.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Link: https://lore.kernel.org/r/20241204-sm8750_master_smmu-v2-1-9e73e3fc15f2@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2024-12-09 19:19:27 +00:00
Qingqing Zhou
d1e22c7145 dt-bindings: arm-smmu: document QCS615 GPU SMMU 
Add the compatible for Qualcomm QCS615 GPU SMMU. Add the compatible
in the list of 3 clocks required by the GPU SMMU. Remove the compatible
from the "no clocks" list.

Signed-off-by: Qingqing Zhou <quic_qqzhou@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241122074922.28153-2-quic_qqzhou@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2024-12-09 19:16:57 +00:00
Richard Acayan
87cafa082c dt-bindings: iommu: arm,smmu: add sdm670 adreno iommu compatible 
SDM670 has a separate IOMMU for the GPU, like SDM845. Add the compatible
for it.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20241114004713.42404-5-mailingradian@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
 2024-12-09 19:05:53 +00:00
Qingqing Zhou
515c8ff024 dt-bindings: arm-smmu: document QCS615 APPS SMMU 
Add the compatible for Qualcomm QCS615 APPS SMMU.

Signed-off-by: Qingqing Zhou <quic_qqzhou@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241025030732.29743-3-quic_qqzhou@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2024-10-29 16:08:56 +00:00
Dmitry Baryshkov
0ddb903fab dt-bindings: iommu: arm,smmu: Add Qualcomm SAR2130P compatible 
Document compatible for ARM-500 SMMU controller on Qualcomm SAR2130P
platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241018-sar2130p-iommu-v2-1-64c361fceac8@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2024-10-24 13:38:10 +01:00
Zhenhua Huang
4638a0474d dt-bindings: arm-smmu: Add compatible for QCS8300 SoC 
Qualcomm QCS8300 SoC includes apps smmu that implements arm,mmu-500, which
is used to translate device-visible virtual addresses to physical
addresses. Add compatible for it.

Signed-off-by: Zhenhua Huang <quic_zhenhuah@quicinc.com>
Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
Link: https://lore.kernel.org/r/20240911-qcs8300_smmu_binding-v2-1-f53dd9c047ba@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2024-09-12 12:52:03 +01:00
Nikunj Kela
757c5ceedc dt-bindings: arm-smmu: document the support on SA8255p 
Add compatible for smmu representing support on SA8255p.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com>
Link: https://lore.kernel.org/r/20240905193656.3785537-1-quic_nkela@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2024-09-06 13:42:53 +01:00
Akhil P Oommen
d6c102881b dt-bindings: arm-smmu: Add X1E80100 GPU SMMU 
Update the devicetree bindings to support the gpu present in
X1E80100 platform.

Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Link: https://lore.kernel.org/r/20240629015111.264564-5-quic_akhilpo@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2024-07-02 17:48:47 +01:00
Bjorn Andersson
e5af06b7cf dt-bindings: arm-smmu: Fix Qualcomm SC8180X binding 
Update the Qualcomm SC8180X SMMU binding to allow describing the Adreno
SMMU, with its three clocks.

Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20240525-sc8180x-adreno-smmu-binding-fix-v1-1-e3c00aa9b9d4@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2024-06-05 16:16:33 +01:00
Neil Armstrong
8a05f74d56 dt-bindings: arm-smmu: Document SM8650 GPU SMMU 
Document the GPU SMMU found on the SM8650 platform.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240216-topic-sm8650-gpu-v3-3-eb1f4b86d8d3@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2024-02-22 18:01:18 +00:00
Neil Armstrong
2777781ca9 dt-bindings: arm-smmu: Fix SM8[45]50 GPU SMMU 'if' condition 
The 'if' condition for the SM8[45]50 GPU SMMU is too large,
add the other compatible strings to the condition to only
allow the clocks for the GPU SMMU nodes.

Fixes: 4fff78dc24 ("dt-bindings: arm-smmu: Document SM8[45]50 GPU SMMU")
Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240216-topic-sm8650-gpu-v3-2-eb1f4b86d8d3@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2024-02-22 18:01:01 +00:00
Konrad Dybcio
0eca305f8e dt-bindings: arm-smmu: Add QCM2290 GPU SMMU 
The GPU SMMU on QCM2290 nicely fits into the description we already have
for SM61[12]5. Add it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240219-topic-rb1_gpu-v1-1-d260fa854707@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2024-02-22 15:43:47 +00:00
Konrad Dybcio
4fff78dc24 dt-bindings: arm-smmu: Document SM8[45]50 GPU SMMU 
SM8450 and SM8550 both use a Qualcomm-modified MMU500 for their GPU.
In both cases, it requires a set of clocks to be enabled. Describe that.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231127-topic-a7xx_dt-v2-1-2a437588e563@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-12-12 12:26:20 +00:00
Rajendra Nayak
fa27b35c91 dt-bindings: arm-smmu: Add compatible for X1E80100 SoC 
Add the SoC specific compatible for X1E80100 implementing arm,mmu-500.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231124100608.29964-3-quic_sibis@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2023-12-12 12:11:39 +00:00
Neil Armstrong
61683b47df dt-bindings: iommu: arm,smmu: document the SM8650 System MMU 
Document the System MMU on the SM8650 Platform.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231128-topic-sm8650-upstream-bindings-smmu-v2-1-d3fbcaf1ea92@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-12-12 12:09:01 +00:00
Krzysztof Kozlowski
54dae6d5d3 dt-bindings: iommu: arm,smmu: document clocks for the SM8350 GPU SMMU 
Document the clocks for Qualcomm SM8350 Adreno GPU SMMU, already used in
DTS:

  sm8350-hdk.dtb: iommu@3da0000: clock-names: False schema does not allow ['bus', 'iface', 'ahb', 'hlos1_vote_gpu_smmu', 'cx_gmu', 'hub_cx_int', 'hub_aon']

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231112184522.3759-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-12-12 12:05:44 +00:00
Danila Tikhonov
c53cdc0291 dt-bindings: arm-smmu: Add SM7150 GPU SMMUv2 
SM7150 has a qcom,smmu-v2-style SMMU just for Adreno and friends.
Document it.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230913184526.20016-2-danila@jiaxyga.com
Signed-off-by: Will Deacon <will@kernel.org>
 2023-10-12 13:48:28 +01:00
Konrad Dybcio
938ba2f252 dt-bindings: arm-smmu: Fix SDM630 clocks description 
SDM630 was abusingly referencing one of the internal bus clocks, that
were recently dropped from Linux (because the original implementation
did not make much sense), circumventing the interconnect framework.

Fix it by dropping the bus-mm clock (which requires separating 630 from
similar entries) and keeping the rest as-is.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230721-topic-rpm_clk_cleanup-v2-4-1e506593b1bd@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-09-18 10:17:35 +01:00
Konrad Dybcio
b606e2e8ed dt-bindings: arm-smmu: Fix MSM8998 clocks description 
MSM8998 was abusingly referencing one of the internal bus clocks, that
were recently dropped from Linux (because the original implementation
did not make much sense), circumventing the interconnect framework.

Fix it by dropping the bus-mm clock (which requires separating 8998 from
similar entries) and keeping the rest as-is.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230531-topic-8998_mmssclk-v3-6-ba1b1fd9ee75@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-08-11 12:33:26 +01:00
Rohit Agarwal
48989c0b25 dt-bindings: arm-smmu: Add SDX75 SMMU compatible 
Add devicetree binding for Qualcomm SDX75 SMMU.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/1684487350-30476-5-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2023-06-05 16:47:14 +01:00
Konrad Dybcio
44984d56e0 dt-bindings: arm-smmu: Add SM6375 GPU SMMU 
SM6375 has a "Qualcomm SMMU V2" implementation for its GPU SMMU. It
does not however qualify for the qcom,adreno-smmu compatible, as it can
not do split pagetables. It consumes a single clock and a single genpd.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230531-topic-sm6375_gpusmmu-v1-1-860943894c71@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-06-05 16:40:55 +01:00
Bartosz Golaszewski
387a80a741 dt-bindings: iommu: arm,smmu: enable clocks for sa8775p Adreno SMMU 
The GPU SMMU will require the clocks property to be set so put the
relevant compatible into the adreno if-then block.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230417125844.400782-5-brgl@bgdev.pl
[will: Fixed conflict with 'qcom,sc8280xp-smmu-500' entry]
Signed-off-by: Will Deacon <will@kernel.org>
 2023-06-05 16:36:21 +01:00
Bjorn Andersson
84b8a7fe29 dt-bindings: arm-smmu: Fix SC8280XP Adreno binding 
The qcom,sc8280xp-smmu-500 Adreno SMMU binding has clocks, so fix up the
binding to allow this.

Fixes: 38db6b41b2 ("dt-bindings: arm-smmu: Add compatible for Qualcomm SC8280XP")
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230523010441.63236-1-quic_bjorande@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2023-06-05 16:28:16 +01:00
Konrad Dybcio
3ad6585509 dt-bindings: arm-smmu: Document SM61[12]5 GPU SMMU 
Both of these SoCs have a Qualcomm MMU500 implementation of SMMU
in front of their GPUs that expect 3 clocks. Both of them also have
an APPS SMMU that expects no clocks. Remove qcom,sm61[12]5-smmu-500
from the "no clocks" list (intentionally 'breaking' the schema checks
of APPS SMMU, as now it *can* accept clocks - with the current
structure of this file it would have taken a wastefully-long time to
sort this out properly..) and add necessary yaml to describe the
clocks required by the GPU SMMUs.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230315-topic-kamorta_adrsmmu-v1-1-d1c0dea90bd9@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-03-27 12:37:01 +01:00
Konrad Dybcio
16d1646871 dt-bindings: arm-smmu: Add SM8350 Adreno SMMU 
Document the Adreno SMMU present on SM8350.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230313-topic-gpu_smmu_bindings-v3-2-66ab655fbfd5@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-03-27 12:31:15 +01:00
Konrad Dybcio
5c3686616b dt-bindings: arm-smmu: Use qcom,smmu compatible for MMU500 adreno SMMUs 
qcom,smmu-500 was introduced to prevent people from adding new
compatibles for what seems to roughly be the same hardware. Use it for
qcom,adreno-smmu-compatible targets as well.

While at it, fix the "arm,smmu-500" -> "arm,mmu-500" typo in the comment.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230313-topic-gpu_smmu_bindings-v3-1-66ab655fbfd5@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-03-27 12:31:14 +01:00
Abel Vesa
7f061c19f6 dt-bindings: arm-smmu: Add compatible for SM8550 SoC 
Add the SoC specific compatible for SM8550 implementing
arm,mmu-500.

Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230207-topic-sm8550-upstream-smmu-bindings-v3-1-cb15a7123cfe@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-03-27 12:28:18 +01:00
Manivannan Sadhasivam
eb9181a3ae dt-bindings: arm-smmu: Fix binding for SDX55 and SDX65 
Both SDX55 and SDX66 SoCs are using the Qualcomm version of the SMMU-500
IP. But the binding lists them under the non-qcom implementation which is
not correct.

So fix the binding by moving these two SoCs under "qcom,smmu-500"
implementation.

Fixes: 6c84bbd103 ("dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindings")
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230123131931.263024-2-manivannan.sadhasivam@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-01-24 11:43:56 +00:00
Martin Botka
822765f44e dt-bindings: arm-smmu: Document smmu-500 binding for SM6125 
Document smmu-500 compatibility with the SM6125 SoC.

Signed-off-by: Martin Botka <martin.botka@somainline.org>
[Marijn: Move compatible to the new, generic, qcom,smmu-500 list]
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221222193254.126925-2-marijn.suijten@somainline.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-01-24 11:35:53 +00:00
Bartosz Golaszewski
0802999c9b dt-bindings: arm-smmu: document the smmu on Qualcomm SA8775P 
Document the qcom,smmu-500 SMMU on SA8775P platforms.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230112154554.442808-1-brgl@bgdev.pl
Signed-off-by: Will Deacon <will@kernel.org>
 2023-01-24 11:35:53 +00:00
Krzysztof Kozlowski
d565d60d3d dt-bindings: arm-smmu: disallow clocks when not used 
Disallow clocks for variants other than:
1. SMMUs with platform-specific compatibles which list explicit clocks
   and clock-names,
2. SMMUs using only generic compatibles, e.g. arm,mmu-500, which have a
   variable clocks on different implementations.

This requires such variants with platform-specific compatible, to
explicitly list the clocks or omit them, making the binding more
constraint.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221222092355.74586-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-01-24 11:35:53 +00:00
Marijn Suijten
11321f7763 dt-bindings: arm-smmu: Add sm8150-smmu-500 to the list of Adreno smmus 
sm8150 has an smmu-500 specifically for Adreno, where the GPU is allowed
to switch pagetables.  Document the allowed 3-compatibles for this,
similar to sc7280 and sm8250.

Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221213002626.260267-1-konrad.dybcio@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-01-24 11:35:52 +00:00
Konrad Dybcio
6bc6af375c dt-bindings: arm-smmu: Allow 3 power domains on SM6375 MMU500 
The SMMU on SM6375 requires 3 power domains to be active. Add an
appropriate description of that.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20221115152727.9736-2-konrad.dybcio@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-01-24 11:35:52 +00:00
Konrad Dybcio
5a47cb4df3 dt-bindings: arm-smmu: Add SM6350 GPU SMMUv2 
SM6350 has a qcom,smmu-v2-style SMMU just for Adreno and friends.
Document it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221117094422.11000-2-konrad.dybcio@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2022-11-18 14:16:39 +00:00
Dmitry Baryshkov
6c84bbd103 dt-bindings: arm-smmu: Add generic qcom,smmu-500 bindings 
Add generic bindings for the Qualcomm variant of the ARM MMU-500. It is
expected that all future platforms will use the generic qcom,smmu-500
compat string in addition to SoC-specific and the generic arm,mmu-500
ones. Older bindings are now described as deprecated.

Note: I have split the sdx55 and sdx65 from the legacy bindings. They
are not supported by the qcom SMMU implementation. I can suppose that
they are using the generic implementation rather than the
Qualcomm-speicific one.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221114170635.1406534-5-dmitry.baryshkov@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2022-11-14 18:09:38 +00:00
Dmitry Baryshkov
3a12e8c065 dt-bindings: arm-smmu: add special case for Google Cheza platform 
Cheza fw does not properly program the GPU aperture to allow the
GPU to update the SMMU pagetables for context switches. The board file
works around this by dropping the "qcom,adreno-smmu" compat string.
Add this usecase to arm,smmu.yaml schema.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221114170635.1406534-4-dmitry.baryshkov@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2022-11-14 18:09:38 +00:00
Dmitry Baryshkov
982295bfe3 dt-bindings: arm-smmu: fix clocks/clock-names schema 
Rework clocks/clock-names properties schema to properly describe
possible usage cases.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221114170635.1406534-3-dmitry.baryshkov@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2022-11-14 18:09:38 +00:00
Dmitry Baryshkov
dbf88f7435 dt-bindings: arm-smmu: Add missing Qualcomm SMMU compatibles 
Add missing compatibles used for Adreno SMMU on sc7280 and sm8450
platforms and for the Qualcomm v2 SMMU used on SDM630 platform.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221114170635.1406534-2-dmitry.baryshkov@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2022-11-14 18:09:38 +00:00
Richard Acayan
8d3a9ec6ae dt-bindings: iommu: arm-smmu: add sdm670 compatible 
The Snapdragon 670 needs the IOMMU for GENI I2C. Add a compatible string in
the documentation to represent its support.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221111003606.126795-2-mailingradian@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
 2022-11-14 14:13:28 +00:00
Adam Skladowski
728b22a572 dt-bindings: arm-smmu: Add compatible for Qualcomm SM6115 
Add compatible for the Qualcomm SM6115 platform to the ARM SMMU
DeviceTree binding.

Signed-off-by: Adam Skladowski <a39.skl@gmail.com>
Signed-off-by: Iskren Chernev <iskren.chernev@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221030094258.486428-5-iskren.chernev@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
 2022-11-14 13:42:31 +00:00
Melody Olvera
6313f4b5a4 dt-bindings: arm-smmu: Add 'compatible' for QDU1000 and QRU1000 
Add compatible bindings for Qualcomm QDU1000 and QRU1000 platforms.

Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Link: https://lore.kernel.org/r/20221026190534.4004945-2-quic_molvera@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2022-11-14 13:39:05 +00:00
Konrad Dybcio
743302d4ad dt-bindings: arm-smmu: Add compatible for Qualcomm SM6375 
Add a compatible for Qualcomm SM6375's broken-as-usual MMU500 impl.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20220716193223.455859-1-konrad.dybcio@somainline.org
Signed-off-by: Will Deacon <will@kernel.org>
 2022-07-19 18:24:28 +01:00