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61 Commits

Author SHA1 Message Date
Jani Nikula
f985e105ce drm/i915/display: add intel_display_device_present() 
Add a proper function for display && HAS_DISPLAY(display) to hide
indirect struct intel_display access via the macro from a number of
places outside of display. This makes struct intel_display * an opaque
pointer in these places. All HAS_DISPLAY() usage is now constrained
within display.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/20250903090408.3492875-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-09-09 09:32:01 +03:00
Ville Syrjälä
0d4a57f08b drm/i915/dram: Print memory details even if something went wrong 
Print the memory details even if the detection failed in some way
but we continued the driver initialization anyway. It'll be easier
to debug issues if we at least know what the final results were.

And while at it also print the number of PSF GV points. Previously
we only printed the QGV points.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-9-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2025-09-05 14:37:32 +03:00
Ville Syrjälä
a6d31e18c0 drm/i915/dram: Don't call skl_get_dram_info()/skl_get_dram_type() on icl 
Currently the icl codepaths first determine the memory type from the
memory controller registers (via skl_get_dram_info()->skl_get_dram_type())
and then overwrite the results with icl_pcode_read_mem_global_info().
Get rid of the pointless (and potentially incorrect) skl_get_dram_type()
stuff.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-8-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2025-09-05 14:37:32 +03:00
Ville Syrjälä
84b72b545c drm/i915/dram: Move 16Gb DIMM detection fully to the skl/icl codepaths 
We are incorrectly applying the 16Gb DIMM w/a (adding 1 extra
usec to WM0 latency) on MTL+ even though the w/a is only needed
for SKL/ICL.

The current way of setting this is up is a bit of a disaster:
1. always set has_16gb_dimms=true for all platforms except BXT/GLK
2. has_16gb_dimms potentially gets overwritten with something else
 * BXT/GLK don't do anything since we never set has_16gb_dimms to
   begin with
 * skl_get_dram_info() overwrites has_16gb_dimms with the actual
   detection results for SKL/ICL/derivatives
 * gen12_get_dram_info() (correctly) resets has_16gb_dimms
   for TGL/ADL/derivatives
 * xelpdp_get_dram_info() doesn't do anything, leaving
   has_16gb_dimms incorrectly set for MTL+

Clean up the whole mess by only setting has_16gb_dimms in the
SKL/ICL codepaths where we have the actual detection code for
it. This avois applying the w/a incorrectly on MTL+.

v2: Rewrite commit msg (Jani)

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-6-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2025-09-05 14:37:32 +03:00
Ville Syrjälä
115cebc303 drm/i915/dram: s/wm_lv0.../has_16gb_dimms/ 
The DRAM code shouldn't know anything about watermarks. Rename
wm_lv_0_adjust_needed to has_16gb_dimms. How this gets used is
up to the watermark code.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-5-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2025-09-05 14:37:32 +03:00
Ville Syrjälä
da548f7e78 drm/i915/dram: Pack dram_info better 
struct dram_info has two holes in the middle. Shuffle things
around to plug them.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2025-09-05 14:37:32 +03:00
Ville Syrjälä
413439008c drm/i915/dram: Use intel_dram_type_str() for pnv 
Replace the hand rolled PNV memory type printk string
stuff with intel_dram_type_str().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-3-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2025-09-05 14:37:32 +03:00
Ville Syrjälä
3a64c19963 drm/i915/dram: Populate PNV memory type accurately 
If PNV doesn't have DDR3 then it has DDR2. Add the appropriate memory
type for it.

No functional change since we currently only care about the
DDR3 vs. not difference.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2025-09-05 14:37:32 +03:00
Jani Nikula
0492e13eb8 drm/i915/dram: move fsb_freq and mem_freq to dram info 
Store fsb_freq and mem_freq in dram info the same way we do for other
memory info on later platforms for a slightly more unified approach.

This allows us to remove fsb_freq, mem_freq and is_ddr3 members from
struct drm_i915_private and struct xe_device.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/a38c4b105ba9098fa0b128cb86cd4eb63bcc27e8.1755511595.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-08-19 11:20:40 +03:00
Jani Nikula
10e656f8c4 drm/i915/dram: bypass fsb/mem freq detection on dg2 and no display 
Non-display now calls the intel_fsb_freq() and intel_mem_freq()
functions, so we don't have to have the frequencies initialized for dg2
or non-display cases.

This is in preparation for unifying the pre-gen9 handling in dram info.

DG2 remains a special case as described in commit 5eb6bf0b44
("drm/i915/dg2: Don't read DRAM info").

v2: Rebase

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/7bfed06d431354f3918ea73d43a2ec8ed9426a76.1755511595.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-08-19 11:20:40 +03:00
Jani Nikula
6e977fe781 drm/i915/dram: add intel_mem_freq() 
Add a more generic intel_mem_freq() function instead of platform
specific ones. Expose it for future use outside of intel_dram.c.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/602103b290a92ba26d581eeb595ba5e707eb5bc4.1755511595.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-08-19 11:20:40 +03:00
Jani Nikula
e0b1bbed5e drm/i915/dram: add intel_fsb_freq() and use it 
Add a more generic intel_fsb_freq() function instead of platform
specific ones.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/c5b77311c5f64b7163c86a042b7d023c07a685e2.1755511595.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-08-19 11:20:40 +03:00
Jani Nikula
e3929f84a1 drm/i915/gmch: pass display to DISPLAY_VER() 
Underneath, DISPLAY_VER() really expects struct intel_display. Switch to
it in preparation for removing the transitional __to_intel_display()
macro.

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://lore.kernel.org/r/1f951102b3d073fd58c5211f399750aa80b51548.1754499175.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-08-14 13:12:23 +03:00
Jani Nikula
7eb949663b drm/i915/dram: pass display to macros that expect display 
Underneath, the HAS_DISPLAY() and DISPLAY_VER() macros really expect
struct intel_display. Switch to it in preparation for removing the
transitional __to_intel_display() macro.

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Link: https://lore.kernel.org/r/ee8bba57924629f97945b9cf05727ae7c0dfb8fd.1754499175.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-08-14 13:12:23 +03:00
Jani Nikula
4274a2b756 drm/xe/compat: stop including i915_utils.h from compat i915_drv.h 
Expose the places that need i915_utils.h, and include it where needed.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/6338c8524e600e048b56c5484624cfb51ed49d1d.1753965351.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-08-04 11:13:07 +03:00
Jani Nikula
54fd8f38d8 drm/xe/compat: remove old pcode compat interface 
With display code using the struct drm_device based pcode interface, we
can drop the old pcode compat interface.

We can also drop the __compat_uncore_to_tile() helper from
intel_uncore.h compat header.

Turns out a couple of headers depended on the intel_uncore.h include via
intel_pcode.h. Fix them.

Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/948016a031dcb2acef0c97071aac09fa49613e07.1750678991.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-06-23 21:45:17 +03:00
Jani Nikula
2a9b1baa27 drm/i915/dram: switch to struct drm_device based pcode interface 
With the struct drm_device based pcode interface in place in both i915
and xe, we can switch dram code to use that.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/e0d74a3317cc61d1cbb096b962cfbd7c60f038d4.1750678991.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-06-23 21:45:16 +03:00
Jani Nikula
e117100acb drm/i915/dram: allocate struct dram_info dynamically 
Allocate struct drm_info dynamically, and convert the struct
drm_i915_private and struct xe_device dram_info member into a const
pointer. Move the struct definition to intel_dram.h, and keep it opaque
to everyone not needing it. This also removes the duplication of the
struct definition.

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Link: https://lore.kernel.org/r/73625095157346ea0e8614108c9b369208e5df66.1748337870.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-06-04 18:57:23 +03:00
Jani Nikula
836864ac60 drm/i915/dram: add return value and handling to intel_dram_detect() 
We'll want to start returning errors from intel_dram_detect(). As the
first step, add the return value and error handling, even if we still
only return 0.

Do no functional changes, but leave a comment about whether we should
bail out on dram detection failures.

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Link: https://lore.kernel.org/r/be2c31c459fb95d8161b719d499403eea5ec17b7.1748337870.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-06-04 18:57:23 +03:00
Jani Nikula
bd0cffe9eb drm/i915/dram: pass struct dram_info pointer around 
Figure out the struct dram_info pointer in one place, and pass that
around to be filled in, instead of all places poking at i915->dram_info
directly.

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Link: https://lore.kernel.org/r/8ac6b308b210cf4a429d5abfb9bf32737dcab51f.1748337870.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-06-04 18:57:23 +03:00
Jani Nikula
612abe44f7 drm/i915/dram: add accessor for struct dram_info and use it 
Add a function to get the (const) pointer to struct dram_info, and use
that to obtain the pointer instead of poking at i915->dram_info
directly.

Clean up a couple of local variables while at it.

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Link: https://lore.kernel.org/r/4174edf649e2f6805dab6fd6ce2ec10f4e5f2498.1748337870.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-06-04 18:57:22 +03:00
Jani Nikula
62384da2a0 drm/i915: stop including display/intel_display_{core, limits}.h from i915_drv.h 
Make i915->display pointer opaque to most of core i915 driver. Lots of
places now need explicit include of intel_display_core.h, or a more
specific header.

With this dependency broken, changes in display should cause radically
less recompilation of i915.

Reviewed-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Link: https://lore.kernel.org/r/b381b59acb7e4f600e0282935a68aedf77768109.1747907216.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-05-27 11:25:53 +03:00
Jani Nikula
bd4d1856f5 drm/i915: convert VLV IOSF SB interface to struct drm_device 
With users both in i915 core and display, struct drm_device is the
common denominator for the VLV IOSF SB users. Also use drm_device for
the helpers on the display side to keep the static inlines as simple as
possible.

We can drop a number of dependencies on i915_drv.h with this.

v2,v3: Rebase

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/c1d013ed88ce2e3e5bdc15ce3bf01a3960b1e817.1747061743.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-05-13 10:26:45 +03:00
Jani Nikula
ead7a1a59e drm/i915: switch i915 core to generic VLV IOSF SB functions 
We'll want to relocate the unit specific functions to display, making
them inaccessible to i915 core. As there aren't that many users in i915
core, we can just convert them to the generic VLV IOSF SB read/write
functions.

v2: Use BIT(unit) for get/put

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/3162c8768eeeba928bbc3d4aa2ddfc6a1030a451.1747061743.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-05-13 10:26:45 +03:00
Jani Nikula
6819b5a67e drm/i915: rename vlv_sideband*.[ch] to vlv_iosf_sb*.[ch] 
Be more specific in the naming, and follow the existing function naming
pattern of vlv_iosf_sb_*() in the file.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://lore.kernel.org/r/d3d97d34a197ba801c558c3fd72b29f9e5c783af.1747061743.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-05-13 10:26:44 +03:00
Rodrigo Vivi
6ca37b86f6 drm/{i915,xe}: Move intel_pch under display 
The only usage of the "PCH" infra is to detect which South Display
Engine we should be using. Move it under display so we can convert
all its callers towards intel_display struct later.

No functional or code change.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://lore.kernel.org/r/041e3dee494aa15c22172360f2bdd9b15e4acb00.1744364975.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-04-12 11:15:13 +03:00
Lucas De Marchi
930af58421 drm/i915/dram: Consolidate logging of DRAM type 
Instead of logging the dram type in the per version/platform function,
do it in the generic one. This fixes a few discrepancies depending on
the platform:

	- There was no DRAM type logging for graphics version 12 and
	  above
	- For graphics version 11, it would log the DRAM type in
	  skl_get_dram_info(), but could possibly override it later
	  without any log in icl_pcode_read_mem_global_info()

For bxt_get_dram_info(), there's no need to log the type for each dimm,
as the drm_WARN_ON() already covers the case they are not all the same.

This maintains the behavior of skl_get_dram_info() that would log the
DRAM type even on failures.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20250324-dram-type-v1-2-bf60ef33ac01@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
 2025-03-31 08:09:40 -07:00
Lucas De Marchi
8d4bd9bb13 drm/i915/dram: Add missing INTEL_DRAM str conversions 
Some new dram types were added without adding the corresponding string
conversion, probably because it's not being used by recent platforms.
Add them, together with a BUILD_BUG_ON() to ensure it keeps in sync, in
preparation to make use of them in recent platforms.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://lore.kernel.org/r/20250324-dram-type-v1-1-bf60ef33ac01@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
 2025-03-31 08:09:40 -07:00
Vivek Kasireddy
327e30123c drm/i915/xe2hpd: Identify the memory type for SKUs with GDDR + ECC 
Some SKUs of Xe2_HPD platforms (such as BMG) have GDDR memory type
with ECC enabled. We need to identify this scenario and add a new
case in xelpdp_get_dram_info() to handle it. In addition, the
derating value needs to be adjusted accordingly to compensate for
the limited bandwidth.

Bspec: 64602
Cc: Matt Roper <matthew.d.roper@intel.com>
Fixes: 3adcf970dc ("drm/xe/bmg: Drop force_probe requirement")
Cc: stable@vger.kernel.org
Signed-off-by: Vivek Kasireddy <vivek.kasireddy@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Acked-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250324-tip-v2-1-38397de319f8@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
 2025-03-24 18:14:06 -07:00
Jani Nikula
46e2ffbdd2 drm/i915/pch: Remove unused i915->pch_id 
With the PCH checks based on PCH types instead of IDs, the i915->pch_id
member has become unused. Remove it.

Reviewed-by: Nemesa Garg <nemesa.garg@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/fac1c59800128e8f398e83d718a3a5dc235d0526.1738923308.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-02-12 12:36:19 +02:00
Jani Nikula
c2d55e709a drm/i915/pch: Hide PCH device IDs 
Only the PCH identification code needs the PCH device IDs, as all the
PCH checks are now based on PCH type. Hide the PCH device IDs inside
intel_pch.c. Remove the unused INTEL_PCH_ID() macro while at it.

Reviewed-by: Nemesa Garg <nemesa.garg@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/d1ceb9fc461cf21e1b885a55293f593eba1458ea.1738923308.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-02-12 12:36:18 +02:00
Jani Nikula
a5b55c1850 drm/i915/pch: Make LPT LP a dedicated PCH type 
Add PCH type PCH_LPT_LP and rename PCH_LPT to PCH_LPT_H for
consistency. Keep the existing HAS_PCH_LPT*() macros, but express them
in terms of the PCH types instead of looking at the device IDs
directly. This makes the PCH checks independent of the PCH device IDs.

Reviewed-by: Nemesa Garg <nemesa.garg@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/777b63f50b10fba1d768af25870e81b33267bdc8.1738923308.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2025-02-12 12:36:18 +02:00
Nitin Gote
5b056be1f2 drm/i915/soc: fix typos in i915/soc files 
Fix all typos in files under drm/i915/soc reported by codespell tool.

Signed-off-by: Nitin Gote <nitin.r.gote@intel.com>
Reviewed-by: Krzysztof Niemiec <krzysztof.niemiec@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250120081517.3237326-7-nitin.r.gote@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
 2025-01-23 05:48:23 -05:00
Jani Nikula
0ca97fcdba drm/i915/soc: stop using IS_GEN9_LP() and IS_GEN9_BC() 
Replace IS_GEN9_LP() and IS_GEN9_BC() with direct platform checks. This
lets us remove their compat counterparts, as neither soc/ nor /display
now no longer needs them.

v2: Use !A && !B instead of !(A || B) (Ville)

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> # v1
Link: https://patchwork.freedesktop.org/patch/msgid/20240930124056.3541988-2-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-10-02 12:06:20 +03:00
Ville Syrjälä
e622905020 drm/i915/bios: Extract soc/intel_rom.c 
Abstract away the nuts and bolts of the SPI vs. PCI ROM
stuff, and hide it all in soc/intel_rom.c so that the
VBT code doesn't have to care about this stuff.

This leaves intel_bios.c with a single codepath that
can focus on the details related to the VBT layout.

This should have no functional changes.

v2: Rebase due to vbt_signature changes
    Drop unnecessary cast (Jani)

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240923152453.11230-7-ville.syrjala@linux.intel.com
 2024-10-01 17:30:58 +03:00
Jani Nikula
b295609937 drm/i915: move comments about FSB straps to proper place 
Move the comment about FSB straps to where the relevant register is
read.

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/8a5b6cd3db80259c30263861f1a9ff04fea2e7f0.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:54:31 +03:00
Jani Nikula
d0a6e5015f drm/i915: use i9xx_fsb_freq() for GT clock frequency 
Reuse i9xx_fsb_freq() for GT clock frequency initialization instead of
depending on rawclk_freq.

Note: If the init order was changed, we could use i915->fsb_freq
directly. However, GT clock initialization is done in
i915_driver_mmio_probe(), but intel_dram_detect() later in
i915_driver_hw_probe(), with a dependency on intel_pcode_init().

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0678d8ec9772725b47d4fa5b14e3b3a34256d5cf.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:54:31 +03:00
Jani Nikula
fc8bf96105 drm/i915: extend the fsb_freq initialization to more platforms 
Initialize fsb frequency for more platforms to be able to use it for GT
clock and rawclk frequency initialization.

Note: There's a discrepancy between existing pnv_fsb_freq() and
i9xx_hrawclk() regarding CLKCFG interpretation. Presume all PNV is
mobile.

Default to 1333 MHz for unknown values, similar to i9xx_hrawclk().

v2:
- Add MISSING_CASE() (Ville)
- Default to the same frequency for both branches (Ville)

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7cd6dbd4dafb900ac1dd12be0ec096ff1d5fc6cf.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:54:31 +03:00
Jani Nikula
a4ad402078 drm/i915: convert fsb_freq and mem_freq to kHz 
We'll want to use fsb frequency for deriving GT clock and rawclk
frequencies in the future. Increase the accuracy by converting to
kHz. Do the same for mem freq to be aligned.

Round the frequencies ending in 666 to 667.

v2: Also handle mem_freq in gen5_rps_init() (Ville)

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/17fe2544b876549f63fac0f956273f5f282081b3.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:54:31 +03:00
Jani Nikula
846bd6086d drm/i915/dram: rearrange mem freq init 
Follow the same style in mem freq init as in fsb freq init, returning
the value instead of assigning in multiple places.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/f098ccdbb0c42016d5dad81e0b089bb4babe29f0.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:54:31 +03:00
Jani Nikula
e6534546a4 drm/i915/dram: split out pnv DDR3 detection 
Split out the PNV DDR3 detection to a distinct step instead of
conflating it with mem freq detection.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/c4bf9d32479ab5024e9daa37a996508f543f05e9.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:54:31 +03:00
Jani Nikula
9d4f1aeb25 drm/i915/dram: separate fsb freq detection from mem freq 
To simplify further changes, add separate functions for reading the fsb
frequency.

This ends up reading CLKCFG register twice, but it's not a big deal.

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7582651aa21ac2c1472111c4e81ba8fee182f80e.1718356614.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
 2024-06-17 11:54:30 +03:00
Jani Nikula
03c7918d0d drm: move i915_drm.h under include/drm/intel 
Clean up the top level include/drm directory by grouping all the Intel
specific files under a common subdirectory.

v2: Also fix comment in intel_pci_config.h (Ilpo)

Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Dave Airlie <airlied@gmail.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Acked-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/0e344a72e9be596ac2b8b55a26fd674a96f03cdc.1717075103.git.jani.nikula@intel.com
 2024-05-31 16:11:09 +03:00
Matt Roper
a8c026d0e6 drm/i915/bmg: BMG should re-use MTL's south display logic 
Battlemage's south display is the same as Meteor Lake's, including the
need to invert the HPD pins, which Lunar Lake does not need.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Reviewed-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240430172850.1881525-14-radhakrishna.sripada@intel.com
 2024-05-03 13:15:54 -07:00
Matt Roper
772933b3ab drm/i915/xe2hpd: Add max memory bandwidth algorithm 
Unlike DG2, Xe2_HPD does support multiple GV points with different
maximum memory bandwidths, but uses a much simpler algorithm than igpu
platforms use.

Bspec: 64631
CC: Jani Nikula <jani.nikula@linux.intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240430172850.1881525-12-radhakrishna.sripada@intel.com
 2024-05-03 13:15:13 -07:00
Stanislav Lisovskiy
9236368194 drm/i915/display: Add meaningful traces for QGV point info error handling 
For debug purposes we need those - error path won't flood the log,
however there has been already numerous cases, when due to lack
of debugs, we couldn't immediately tell what was the problem on
customer machine, which slowed down the investigation, requiring
to get access to target device and adding those traces manually.

v2: - Make the debug more generic and move it to intel_dram_detect
      (Gustavo Sousa)
v3: - Use %u for unsigned variable in debug prints (Gustavo)

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240405113533.338553-2-vinod.govindapillai@intel.com
 2024-04-19 15:45:13 +03:00
Haridhar Kalvala
93cbc1accb drm/i915/mtl: Add fake PCH for Meteor Lake 
Correct the implementation trying to detect MTL PCH with
the MTL fake PCH id.

On MTL, both the North Display (NDE) and South Display (SDE) functionality
reside on the same die (the SoC die in this case), unlike many past
platforms where the SDE was on a separate PCH die. The code is (badly)
structured today in a way that assumes the SDE is always on the PCH for
modern platforms, so on platforms where we don't actually need to identify
the PCH to figure out how the SDE behaves (i.e., all DG1/2 GPUs as well as
MTL and LNL),we've been assigning a "fake PCH" as a quickhack that allows
us to avoid restructuring a bunch of the code.we've been assigning a
"fake PCH" as a quick hack that allows us to avoid restructuring a bunch
of the code.

Removed unused macros of LNL amd MTL as well.

v2: Reorder PCH_MTL conditional check (Matt Roper)
    Reverting to PCH_MTL for PICA interrupt(Matt Roper)

Signed-off-by: Haridhar Kalvala <haridhar.kalvala@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231219185233.1469675-1-haridhar.kalvala@intel.com
 2024-01-03 09:17:00 -08:00
Ville Syrjälä
e5aaad610f drm/i915: Extract mchbar_reg() 
Stop repeating the same logic to determine the correct
config space register for MCHBAR.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231101114212.9345-4-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
 2023-11-06 09:54:12 +02:00
Uma Shankar
5846cdfd3d drm/i915/display: Created exclusive version of vga decode setup 
Current vga arbiter implementation in i915 needs a re-design.
The current approach would cause real problems if anyone actually
needs to talk another GPU using legacy VGA resources.

The main issue is that X becomes a slideshow if it thinks there
are multiple GPUs that have VGA decoding enabled as it insists
on adjusting the VGA routing pretty much for every little operation
involving any of the GPUs.

The cleanup will be planned for i915. Meanwhile to focus on Xe
upstreaming and have a cleaner separation, the said functionality
is being moved to a different file exclusive for i915. Xe driver
will re-use rest of the display code from i915.

v2: Addressed Jani Nikula's review comments.

v3: Dropped a duplicate function (Jani)

v4: Updated commit message with reasoning as sugested by Ville.

Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230929074306.1533859-1-uma.shankar@intel.com
 2023-10-05 12:37:08 +05:30
Gustavo Sousa
65578d0d10 drm/i915/xe2lpd: Add fake PCH 
Xe2_LPD doesn't have south display engine on a PCH, it's actually
on the SoC die (while north display engine is on compute die). As
such it makes no sense to go through the PCI devices looking for
an ISA bridge. The approach used by BXT/GLK can't be used here since
leaving it with PCH_NONE would mean taking the wrong code paths.

For the places we currently use a PCH check, it's enough for now to just
check the north display version. Use that to define a fake PCH to be
used across the driver. Eventually these PCH checks may need to be
re-designed as this is already the third platform using/needing a
fake PCH.

v2: Match on display IP version rather than on platform (Matt Roper)
v3: Extend and clarify commit message (Matt Roper / Ville)

Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230919192128.2045154-6-lucas.demarchi@intel.com
 2023-09-21 07:39:49 -07:00