Dmitry Baryshkov
|
de01fc9fa1
|
drm/msm/dpu: remove DPU_CTL_SPLIT_DISPLAY from SAR2130P CTL blocks
Follow the changes in the commit a2649952f6 ("drm/msm/dpu: remove
DPU_CTL_SPLIT_DISPLAY from CTL blocks on DPU >= 5.0") and remove
DPU_CTL_SPLIT_DISPLAY from the CTL blocks on the SAR2130P platform.
Single CTL is used for all interfaces used by a single path
Fixes: 1785751734 ("drm/msm/dpu: add catalog entry for SAR2130P")
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/651883/
Link: https://lore.kernel.org/r/20250506-dpu-sar2130p-no-split-display-v1-1-b619c0fddea5@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
|
2025-05-12 19:18:49 +03:00 |
|
Dmitry Baryshkov
|
075667e986
|
drm/msm/dpu: remove DSC feature bit for PINGPONG on SDM630
The SDM630 platform doesn't have DSC blocks nor does have it DSC
registers in the PINGPONG block. Drop the DPU_PINGPONG_DSC feature bit
from the PINGPONG's feature mask, replacing PINGPONG_SDM845_MASK with
BIT(DPU_PINGPONG_DITHER).
Fixes: 7204df5e7e ("drm/msm/dpu: add support for SDM660 and SDM630 platforms")
Reported-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/640308/
Link: https://lore.kernel.org/r/20250301-dpu-fix-catalog-v2-5-498271be8b50@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
|
2025-05-02 03:54:03 +03:00 |
|
Dmitry Baryshkov
|
e1fbb0d78e
|
drm/msm/dpu: drop TE2 definitions
Neither DPU driver nor vendor SDE driver do not use TE2 definitions
(and, in case of SDE driver, never did). Semantics of the TE2 feature
bit and .te2 sblk are not completely clear. Drop these bits from the
catalog with the possibility of reintroducing them later if we need to
support ppsplit.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/640305/
Link: https://lore.kernel.org/r/20250301-dpu-fix-catalog-v2-4-498271be8b50@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
|
2025-05-02 03:54:03 +03:00 |
|
Dmitry Baryshkov
|
5232a29ebc
|
drm/msm/dpu: remove DSC feature bit for PINGPONG on MSM8953
The MSM8953 platform doesn't have DSC blocks nor does have it DSC
registers in the PINGPONG block. Drop the DPU_PINGPONG_DSC feature bit
from the PINGPONG's feature mask and, as it is the only remaining bit,
drop the .features assignment completely.
Fixes: 7a6109ce1c ("drm/msm/dpu: Add support for MSM8953")
Reported-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/640303/
Link: https://lore.kernel.org/r/20250301-dpu-fix-catalog-v2-3-498271be8b50@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
|
2025-05-02 03:54:03 +03:00 |
|
Dmitry Baryshkov
|
5be9812011
|
drm/msm/dpu: remove DSC feature bit for PINGPONG on MSM8917
The MSM8917 platform doesn't have DSC blocks nor does have it DSC
registers in the PINGPONG block. Drop the DPU_PINGPONG_DSC feature bit
from the PINGPONG's feature mask and, as it is the only remaining bit,
drop the .features assignment completely.
Fixes: 62af6e1cb5 ("drm/msm/dpu: Add support for MSM8917")
Reported-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/640301/
Link: https://lore.kernel.org/r/20250301-dpu-fix-catalog-v2-2-498271be8b50@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
|
2025-05-02 03:54:03 +03:00 |
|
Dmitry Baryshkov
|
b43c524134
|
drm/msm/dpu: remove DSC feature bit for PINGPONG on MSM8937
The MSM8937 platform doesn't have DSC blocks nor does have it DSC
registers in the PINGPONG block. Drop the DPU_PINGPONG_DSC feature bit
from the PINGPONG's feature mask and, as it is the only remaining bit,
drop the .features assignment completely.
Fixes: c079680bb0 ("drm/msm/dpu: Add support for MSM8937")
Reported-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/640299/
Link: https://lore.kernel.org/r/20250301-dpu-fix-catalog-v2-1-498271be8b50@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
|
2025-05-02 03:54:03 +03:00 |
|
Dmitry Baryshkov
|
1785751734
|
drm/msm/dpu: add catalog entry for SAR2130P
Add DPU driver support for the Qualcomm SAR2130P platform. It is mostly
the same as SM8550, minor differences in the CDP configuration.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/649258/
Link: https://lore.kernel.org/r/20250418-sar2130p-display-v5-8-442c905cb3a4@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
|
2025-05-02 03:54:03 +03:00 |
|
Dmitry Baryshkov
|
79af56964e
|
drm/msm/dpu: rename non-SmartDMA feature masks to be more explicit
It is easy to skip or ignore the fact that the default SSPP feature
masks for SDM845+ don't include the SmartDMA bit (both during
development and during the review stage). Rename SSPP feature masks to
make it more explicit that using non-SmartDMA masks should not be an
exception rather than the rule.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/650425/
Link: https://lore.kernel.org/r/20250425-dpu-rework-vig-masks-v2-5-c71900687d08@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
|
2025-05-02 01:14:27 +03:00 |
|
Dmitry Baryshkov
|
3f5e910b33
|
drm/msm/dpu: enable SmartDMA on SM8550
In order to support more versatile configuration of the display pipes on
SM8550, enable SmartDMA for this platform.
Patchwork: https://patchwork.freedesktop.org/patch/650424/
Link: https://lore.kernel.org/r/20250425-dpu-rework-vig-masks-v2-4-c71900687d08@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
|
2025-05-02 01:14:27 +03:00 |
|
Dmitry Baryshkov
|
63958b80c2
|
drm/msm/dpu: enable SmartDMA on SC8280XP
In order to support more versatile configuration of the display pipes on
SC8280XP, enable SmartDMA for this platform.
Patchwork: https://patchwork.freedesktop.org/patch/650420/
Link: https://lore.kernel.org/r/20250425-dpu-rework-vig-masks-v2-3-c71900687d08@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
|
2025-05-02 01:14:27 +03:00 |
|
Dmitry Baryshkov
|
8dcccd7a15
|
drm/msm/dpu: enable SmartDMA on SC8180X
Reworking of the catalog dropped the SmartDMA feature bit on the SC8180X
platform. Renable SmartDMA support on this SoC.
Fixes: 460c410f02 ("drm/msm/dpu: duplicate sdm845 catalog entries")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/650421/
Link: https://lore.kernel.org/r/20250425-dpu-rework-vig-masks-v2-2-c71900687d08@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
|
2025-05-02 01:14:27 +03:00 |
|
Dmitry Baryshkov
|
6a2343de0b
|
drm/msm/dpu: enable SmartDMA on SM8150
Reworking of the catalog dropped the SmartDMA feature bit on the SM8150
platform. Renable SmartDMA support on this SoC.
Fixes: 460c410f02 ("drm/msm/dpu: duplicate sdm845 catalog entries")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/650418/
Link: https://lore.kernel.org/r/20250425-dpu-rework-vig-masks-v2-1-c71900687d08@oss.qualcomm.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
|
2025-05-02 01:14:27 +03:00 |
|
Dmitry Baryshkov
|
a2649952f6
|
drm/msm/dpu: remove DPU_CTL_SPLIT_DISPLAY from CTL blocks on DPU >= 5.0
Since DPU 5.0 CTL blocks do not require DPU_CTL_SPLIT_DISPLAY, as single
CTL is used for both interfaces. As both RM and encoder now handle
active CTLs, drop that feature bit.
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-QRD
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/641592/
Link: https://lore.kernel.org/r/20250307-dpu-active-ctl-v3-7-5d20655f10ca@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
|
2025-05-01 23:39:49 +03:00 |
|
Dmitry Baryshkov
|
ddfa00afae
|
drm/msm/dpu: drop rogue intr_tear_rd_ptr values
The commit 5a9d50150c ("drm/msm/dpu: shift IRQ indices by 1") shifted
IRQ indices by 1, making 'NO_IRQ' to be 0 rather than -1 (and allowing
to skip the definition if the IRQ is not present).
Several platform files were sketched before that commit, but got applied
afterwards. As such, they inherited historical (and currently incorrect)
setting of .intr_tear_rd_ptr = -1 for 'NO_IRQ' value.
Drop that setting for all the affected platforms.
Fixes: 62af6e1cb5 ("drm/msm/dpu: Add support for MSM8917")
Fixes: c079680bb0 ("drm/msm/dpu: Add support for MSM8937")
Fixes: 7a6109ce1c ("drm/msm/dpu: Add support for MSM8953")
Fixes: daf9a92dae ("drm/msm/dpu: Add support for MSM8996")
Fixes: 7204df5e7e ("drm/msm/dpu: add support for SDM660 and SDM630 platforms")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/647486/
Link: https://lore.kernel.org/r/20250408-dpu-drop-intr-rd-ptr-v1-1-eeac337d88f8@oss.qualcomm.com
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
|
2025-04-10 13:22:34 -07:00 |
|
Jessica Zhang
|
69d0273043
|
drm/msm/dpu: Support YUV formats on writeback for DPU 5.x+
Now that CDM_0 has been enabled for DPU 5.x+, add support for YUV formats
on writeback
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/641270/
Signed-off-by: Rob Clark <robdclark@chromium.org>
|
2025-03-06 11:26:51 -08:00 |
|
Dmitry Baryshkov
|
989a24211e
|
drm/msm/dpu: enable CDM_0 for X Elite platform
Enable CDM on the X Elite platform, allowing RGB to YUV conversion for
the output.
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/638412/
Link: https://lore.kernel.org/r/20250220-dpu-add-cdm-v2-5-77f5f0df3d9a@linaro.org
|
2025-03-05 04:34:13 +02:00 |
|
Dmitry Baryshkov
|
b5bbf4fab0
|
drm/msm/dpu: enable CDM_0 for SC8280XP platform
Enable CDM on the SC8280XP platform, allowing RGB to YUV conversion for
the output.
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/638411/
Link: https://lore.kernel.org/r/20250220-dpu-add-cdm-v2-4-77f5f0df3d9a@linaro.org
|
2025-03-05 04:34:13 +02:00 |
|
Dmitry Baryshkov
|
d5c1e00ea2
|
drm/msm/dpu: enable CDM_0 for DPUs 1.x - 4.x
Enable the CDM_0 block on DPU versions 1.x - 4.x as
documented in the vendor dtsi file.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/638408/
Link: https://lore.kernel.org/r/20250220-dpu-add-cdm-v2-3-77f5f0df3d9a@linaro.org
|
2025-03-05 04:34:13 +02:00 |
|
Dmitry Baryshkov
|
15f2825def
|
drm/msm/dpu: enable CDM_0 for DPUs 5.x+
Enable the CDM_0 block on DPU generations starting from 5.x as
documented in the vendor dtsi file.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/638407/
Link: https://lore.kernel.org/r/20250220-dpu-add-cdm-v2-2-77f5f0df3d9a@linaro.org
|
2025-03-05 04:34:13 +02:00 |
|
Dmitry Baryshkov
|
51bc064005
|
drm/msm/dpu: rename CDM block definition
The CDM block is not limited to SC7280, but it is common to all
platforms since DPU 5.x. Rename it from sc7280_cdm to
dpu_cdm_5_x.
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/638405/
Link: https://lore.kernel.org/r/20250220-dpu-add-cdm-v2-1-77f5f0df3d9a@linaro.org
|
2025-03-05 04:34:13 +02:00 |
|
Fange Zhang
|
23c0a9d36f
|
drm/msm/dpu: Add writeback support for SM6150
On the SM6150 platform there is WB_2 block. Add it to the SM6150 catalog.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Fange Zhang <quic_fangez@quicinc.com>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/632337/
Link: https://lore.kernel.org/r/20250114-add-writeback-support-for-sm6150-v2-1-d707b31aad5c@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
|
2025-02-25 20:07:44 +02:00 |
|
Dmitry Baryshkov
|
24b50b7340
|
drm/msm/dpu: correct LM pairing for SM6150
The SM6150 platform doesn't have 3DMux (MERGE_3D) block, so it can not
split the screen between two LMs. Drop lm_pair fields as they don't make
sense for this platform.
Suggested-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Fixes: cb2f914469 ("drm/msm/dpu: Add SM6150 support")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/629377/
Link: https://lore.kernel.org/r/20241217-dpu-fix-sm6150-v2-1-9acc8f5addf3@linaro.org
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
|
2025-02-15 11:46:42 -08:00 |
|
Dmitry Baryshkov
|
af0a4a2090
|
drm/msm/dpu: enable DPU_WB_INPUT_CTRL for DPU 5.x
Several DPU 5.x platforms are supposed to be using DPU_WB_INPUT_CTRL,
to bind WB and PINGPONG blocks, but they do not. Change those platforms
to use WB_SM8250_MASK, which includes that bit.
Fixes: 1f5bcc4316 ("drm/msm/dpu: enable writeback on SC8108X")
Fixes: ab2b03d73a ("drm/msm/dpu: enable writeback on SM6125")
Fixes: 47cebb740a ("drm/msm/dpu: enable writeback on SM8150")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/628876/
Link: https://lore.kernel.org/r/20241214-dpu-drop-features-v1-2-988f0662cb7e@linaro.org
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
|
2025-02-15 11:46:42 -08:00 |
|
Jessica Zhang
|
d1fe88dd53
|
drm/msm/dpu: Specify dedicated CWB pingpong blocks
Change pingpong index and names to distinguish between general use
pingpong blocks and pingpong blocks dedicated for concurrent writeback
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/629229/
Link: https://lore.kernel.org/r/20241216-concurrent-wb-v4-10-fe220297a7f0@quicinc.com
|
2024-12-24 20:57:59 +02:00 |
|
Esha Bharadwaj
|
989412edae
|
drm/msm/dpu: Add CWB entry to catalog for SM8650
Add a new block for concurrent writeback mux to the SM8650 HW catalog
Signed-off-by: Esha Bharadwaj <quic_ebharadw@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/629219/
Link: https://lore.kernel.org/r/20241216-concurrent-wb-v4-9-fe220297a7f0@quicinc.com
|
2024-12-24 20:57:59 +02:00 |
|
Dmitry Baryshkov
|
3a7a4bebe0
|
drm/msm/dpu: link DSPP_2/_3 blocks on X1E80100
Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks. This allows
using colour transformation matrix (aka night mode) with more outputs at
the same time.
Fixes: e3b1f369db ("drm/msm/dpu: Add X1E80100 support")
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/629966/
Link: https://lore.kernel.org/r/20241220-dpu-fix-catalog-v2-8-38fa961ea992@linaro.org
|
2024-12-24 06:27:17 +02:00 |
|
Dmitry Baryshkov
|
3d3ca0915a
|
drm/msm/dpu: link DSPP_2/_3 blocks on SM8650
Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks. This allows
using colour transformation matrix (aka night mode) with more outputs at
the same time.
Fixes: b94747f7d8 ("drm/msm/dpu: add support for SM8650 DPU")
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/629962/
Link: https://lore.kernel.org/r/20241220-dpu-fix-catalog-v2-7-38fa961ea992@linaro.org
|
2024-12-24 06:27:17 +02:00 |
|
Dmitry Baryshkov
|
e21f9d85b0
|
drm/msm/dpu: link DSPP_2/_3 blocks on SM8550
Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks. This allows
using colour transformation matrix (aka night mode) with more outputs at
the same time.
Fixes: efcd010772 ("drm/msm/dpu: add support for SM8550")
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/629961/
Link: https://lore.kernel.org/r/20241220-dpu-fix-catalog-v2-6-38fa961ea992@linaro.org
|
2024-12-24 06:27:16 +02:00 |
|
Dmitry Baryshkov
|
42323d3c9e
|
drm/msm/dpu: link DSPP_2/_3 blocks on SM8350
Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks. This allows
using colour transformation matrix (aka night mode) with more outputs at
the same time.
Fixes: 0e91bcbb00 ("drm/msm/dpu: Add SM8350 to hw catalog")
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/629959/
Link: https://lore.kernel.org/r/20241220-dpu-fix-catalog-v2-5-38fa961ea992@linaro.org
|
2024-12-24 06:27:16 +02:00 |
|
Dmitry Baryshkov
|
8252028092
|
drm/msm/dpu: link DSPP_2/_3 blocks on SM8250
Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks. This allows
using colour transformation matrix (aka night mode) with more outputs at
the same time.
Fixes: 05ae91d960 ("drm/msm/dpu: enable DSPP support on SM8[12]50")
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/629956/
Link: https://lore.kernel.org/r/20241220-dpu-fix-catalog-v2-4-38fa961ea992@linaro.org
|
2024-12-24 06:27:16 +02:00 |
|
Dmitry Baryshkov
|
0986163245
|
drm/msm/dpu: link DSPP_2/_3 blocks on SC8180X
Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks. This allows
using colour transformation matrix (aka night mode) with more outputs at
the same time.
Fixes: f5abecfe33 ("drm/msm/dpu: enable DSPP and DSC on sc8180x")
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/629954/
Link: https://lore.kernel.org/r/20241220-dpu-fix-catalog-v2-3-38fa961ea992@linaro.org
|
2024-12-24 06:27:16 +02:00 |
|
Dmitry Baryshkov
|
ac440a31e5
|
drm/msm/dpu: link DSPP_2/_3 blocks on SM8150
Link DSPP_2 to the LM_2 and DSPP_3 to the LM_3 mixer blocks. This allows
using colour transformation matrix (aka night mode) with more outputs at
the same time.
Fixes: 05ae91d960 ("drm/msm/dpu: enable DSPP support on SM8[12]50")
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/629952/
Link: https://lore.kernel.org/r/20241220-dpu-fix-catalog-v2-2-38fa961ea992@linaro.org
|
2024-12-24 06:27:16 +02:00 |
|
Dmitry Baryshkov
|
9a20f33495
|
drm/msm/dpu: provide DSPP and correct LM config for SDM670
On SDM670 the DPU has two DSPP blocks compared to 4 DSPP blocks on
SDM845. Currently SDM670 just reuses LMs and DSPPs from SDM845. Define
platform-specific configuration for those blocks.
Fixes: e140b7e496 ("drm/msm/dpu: Add hw revision 4.1 (SDM670)")
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/629951/
Link: https://lore.kernel.org/r/20241220-dpu-fix-catalog-v2-1-38fa961ea992@linaro.org
|
2024-12-24 06:27:16 +02:00 |
|
Li Liu
|
cb2f914469
|
drm/msm/dpu: Add SM6150 support
Add definitions for the display hardware used on the Qualcomm SM6150
platform.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Li Liu <quic_lliu6@quicinc.com>
Signed-off-by: Fange Zhang <quic_fangez@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/628007/
Link: https://lore.kernel.org/r/20241210-add-display-support-for-qcs615-platform-v4-5-2d875a67602d@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
|
2024-12-15 14:37:19 +02:00 |
|
Stephan Gerhold
|
ce55101e6b
|
drm/msm/dpu: fix x1e80100 intf_6 underrun/vsync interrupt
The IRQ indexes for the intf_6 underrun/vsync interrupts are swapped.
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 16) is the actual underrun interrupt and
DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 17) is the vsync interrupt.
This causes timeout errors when using the DP2 controller, e.g.
[dpu error]enc37 frame done timeout
*ERROR* irq timeout id=37, intf_mode=INTF_MODE_VIDEO intf=6 wb=-1, pp=2, intr=0
*ERROR* wait disable failed: id:37 intf:6 ret:-110
Correct them to fix these errors and make DP2 work properly.
Cc: stable@vger.kernel.org
Fixes: e3b1f369db ("drm/msm/dpu: Add X1E80100 support")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Tested-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/624681/
Link: https://lore.kernel.org/r/20241115-x1e80100-dp2-fix-v1-1-727b9fe6f390@linaro.org
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
|
2024-12-03 15:03:11 -08:00 |
|
Mahadevan
|
b139c80d18
|
drm/msm/dpu: Add SA8775P support
Add definitions for the display hardware used on the
Qualcomm SA8775P platform.
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/620499/
Link: https://lore.kernel.org/r/20241019-patchv3_1-v5-4-d2fb72c9a845@quicinc.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
|
2024-10-21 14:09:51 +03:00 |
|
Dmitry Baryshkov
|
c59afe5077
|
drm/msm/dpu: drop LM_3 / LM_4 on MSM8998
On the MSM8998 platform ther are no LM_3 and LM_4 blocks. Drop them from
the MSM8998 catalog.
Fixes: 94391a14fc ("drm/msm/dpu1: Add MSM8998 to hw catalog")
Reported-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/612585/
Link: https://lore.kernel.org/r/20240905-dpu-fix-sdm845-catalog-v1-3-3363d03998bd@linaro.org
|
2024-10-21 14:09:05 +03:00 |
|
Dmitry Baryshkov
|
d39271061d
|
drm/msm/dpu: drop LM_3 / LM_4 on SDM845
On the SDM845 platform ther are no LM_3 and LM_4 blocks. Drop them from
the SDM845 catalog.
Fixes: 25fdd5933e ("drm/msm: Add SDM845 DPU support")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/612586/
Link: https://lore.kernel.org/r/20240905-dpu-fix-sdm845-catalog-v1-2-3363d03998bd@linaro.org
|
2024-10-21 14:09:05 +03:00 |
|
Dmitry Baryshkov
|
768a272d53
|
drm/msm/dpu: on SDM845 move DSPP_3 to LM_5 block
On the SDM845 platform the DSPP_3 is used by the LM_5. Correct
corresponding entries in the sdm845_lm array.
Fixes: c723751721 ("drm/msm/dpu/catalog: define DSPP blocks found on sdm845")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/612584/
Link: https://lore.kernel.org/r/20240905-dpu-fix-sdm845-catalog-v1-1-3363d03998bd@linaro.org
|
2024-10-21 14:09:05 +03:00 |
|
Dmitry Baryshkov
|
62af6e1cb5
|
drm/msm/dpu: Add support for MSM8917
Add support for MSM8917, which has MDP5 v1.15. It looks like
trimmed down version of MSM8937. Even fewer PP, LM and no DSI1.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
[Remove intr_start from CTLs config, reword the commit]
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/617311/
Link: https://lore.kernel.org/r/20240930-dpu-msm8953-msm8996-v2-4-594c3e3190b4@mainlining.org
|
2024-10-21 14:09:04 +03:00 |
|
Dmitry Baryshkov
|
c079680bb0
|
drm/msm/dpu: Add support for MSM8937
Add support for MSM8937, which has MDP5 v1.14. It looks like
trimmed down version of MSM8996. Less SSPP, LM and PP blocks. No DSC,
etc.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
[Remove intr_start from CTLs config, reword the commit]
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/617312/
Link: https://lore.kernel.org/r/20240930-dpu-msm8953-msm8996-v2-3-594c3e3190b4@mainlining.org
|
2024-10-21 14:09:04 +03:00 |
|
Dmitry Baryshkov
|
7a6109ce1c
|
drm/msm/dpu: Add support for MSM8953
Add support for MSM8953, which has MDP5 v1.16. It looks like
trimmed down version of MSM8996. Less SSPP, LM and PP blocks. No DSC,
etc.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
[Remove intr_start from CTLs config, reword the commit]
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/617310/
Link: https://lore.kernel.org/r/20240930-dpu-msm8953-msm8996-v2-2-594c3e3190b4@mainlining.org
|
2024-10-21 14:09:04 +03:00 |
|
Konrad Dybcio
|
daf9a92dae
|
drm/msm/dpu: Add support for MSM8996
Add support for MSM8996, which - fun fact - was the SoC that this driver
(or rather SDE, its downstream origin) was meant for and first tested on.
It has some hardware that differs from the modern SoCs, so not a lot of
current structs could have been reused. It's also seemingly the only SoC
supported by DPU that uses RGB pipes.
Note, by default this platform is still handled by the MDP5 driver
unless the `msm.prefer_mdp5=false' parameter is provided.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
[DB: rebased on top of sblk changes, add dpu_rgb_sblk]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
[Removed intr_start from CTLs config, removed LM_3 and LM_4]
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/617309/
Link: https://lore.kernel.org/r/20240930-dpu-msm8953-msm8996-v2-1-594c3e3190b4@mainlining.org
|
2024-10-21 14:09:04 +03:00 |
|
Dmitry Baryshkov
|
1530257937
|
drm/msm/dpu: enable writeback on SM6350
Enable WB2 hardware block, enabling writeback support on this platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Tested-by: Luca Weiss <luca.weiss@fairphone.com>
Patchwork: https://patchwork.freedesktop.org/patch/570194/
Link: https://lore.kernel.org/r/20231203003203.1293087-5-dmitry.baryshkov@linaro.org
|
2024-09-02 02:53:44 +03:00 |
|
Dmitry Baryshkov
|
ab2b03d73a
|
drm/msm/dpu: enable writeback on SM6125
Enable WB2 hardware block, enabling writeback support on this platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/570193/
Link: https://lore.kernel.org/r/20231203003203.1293087-4-dmitry.baryshkov@linaro.org
|
2024-09-02 02:53:44 +03:00 |
|
Dmitry Baryshkov
|
1f5bcc4316
|
drm/msm/dpu: enable writeback on SC8108X
Enable WB2 hardware block, enabling writeback support on this platform.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/570196/
Link: https://lore.kernel.org/r/20231203003203.1293087-3-dmitry.baryshkov@linaro.org
|
2024-09-02 02:53:44 +03:00 |
|
Dmitry Baryshkov
|
47cebb740a
|
drm/msm/dpu: enable writeback on SM8150
Enable WB2 hardware block, enabling writeback support on this platform.
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/570192/
Link: https://lore.kernel.org/r/20231203003203.1293087-2-dmitry.baryshkov@linaro.org
[DB: picked up WB_SDM845_MASK from sdm845 patch]
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
|
2024-09-02 02:53:44 +03:00 |
|
Danila Tikhonov
|
75079df919
|
drm/msm/dpu: Add SM7150 support
Add definitions for the display hardware used on the Qualcomm SM7150
platform.
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/599129/
Link: https://lore.kernel.org/r/20240614215855.82093-3-danila@jiaxyga.com
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
|
2024-06-23 07:55:31 +03:00 |
|
Kuogee Hsieh
|
ee15c8bf5d
|
drm/msm/dp: assign correct DP controller ID to x1e80100 interface table
At current x1e80100 interface table, interface #3 is wrongly
connected to DP controller #0 and interface #4 wrongly connected
to DP controller #2. Fix this problem by connect Interface #3 to
DP controller #0 and interface #4 connect to DP controller #1.
Also add interface #6, #7 and #8 connections to DP controller to
complete x1e80100 interface table.
Changs in V3:
-- add v2 changes log
Changs in V2:
-- add x1e80100 to subject
-- add Fixes
Fixes: e3b1f369db ("drm/msm/dpu: Add X1E80100 support")
Signed-off-by: Kuogee Hsieh <quic_khsieh@quicinc.com>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/585549/
Link: https://lore.kernel.org/r/1711741586-9037-1-git-send-email-quic_khsieh@quicinc.com
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
|
2024-03-29 13:44:51 -07:00 |
|
Abel Vesa
|
e3b1f369db
|
drm/msm/dpu: Add X1E80100 support
Add definitions for the display hardware used on the Qualcomm X1E80100
platform.
Co-developed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/579075/
Link: https://lore.kernel.org/r/20240220-x1e80100-display-v4-4-971afd9de861@linaro.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
|
2024-02-22 23:23:24 +02:00 |
|