Colin Ian King
1a7460a197
drm/xe: Fix uninitialized pointer def
...
In the case where a set of checks on xe->info.platform don't assign
a value to pointer def the pointer remains uninitialized and hence
can fail the following !def check. Fix this be ensuring pointer
def is initialized to NULL.
Fixes: 292b1a8a50colin.i.king@gmail.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250226160524.566074-1-colin.i.king@gmail.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2025-02-26 08:29:30 -08:00
Lucas De Marchi
292b1a8a50
drm/xe: Stop ignoring errors from xe_heci_gsc_init()
...
Do not ignore errors from xe_heci_gsc_init(). For example, it shouldn't
be fine to report successfully entering survivability mode when there's
no communication with gsc working. The driver should also not be
half-initialized in the normal case neither.
Cc: Riana Tauro <riana.tauro@intel.com >
Cc: Alexander Usyskin <alexander.usyskin@intel.com >
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250222001051.3012936-10-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2025-02-25 14:32:03 -08:00
Lucas De Marchi
d40f275d96
drm/xe: Move survivability entirely to xe_pci
...
There's an odd split between xe_pci.c and xe_device.c wrt
xe_survivability: it's initialized by xe_device, but then finalized by
xe_pci. Move it entirely to the outer layer, xe_pci, so it controls
the flow entirely.
This also allows to stop ignoring some of the errors. E.g.: if there's
an -ENOMEM, it shouldn't continue as if it survivability had been
enabled.
One change worth mentioning is that if "wait for lmem" fails, it will
also check the pcode status to decide if it should enter or not in
survivability mode, which it was not doing before. The bit from pcode
for that decision should remain the same after lmem failed
initialization, so it should be fine.
Cc: Riana Tauro <riana.tauro@intel.com >
Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com >
Reviewed-by: Riana Tauro <riana.tauro@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250222001051.3012936-9-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2025-02-25 14:32:03 -08:00
Riana Tauro
8b47c9cdb6
drm/xe: Initialize mei-gsc and vsec in survivability mode
...
Initialize mei-gsc in survivability mode and disable HECI
interrupts. Also initialize vsec in survivability mode
Signed-off-by: Riana Tauro <riana.tauro@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Reviewed-by: Alexander Usyskin <alexander.usyskin@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250128095632.1294722-4-riana.tauro@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2025-01-28 08:58:46 -05:00
Lucas De Marchi
caf4ee1a44
drm/xe: Drop HAS_HECI_*
...
Just do the same as for other has_* flags, without a macro.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20241114152148.572447-4-lucas.demarchi@intel.com
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com >
2024-11-15 15:59:51 -08:00
Alexander Usyskin
e02cea83d3
drm/xe/gsc: add Battlemage support
...
Add heci_cscfi support bit for new CSC engine type.
It has same mmio offsets as DG2 GSC but separate interrupt flow.
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240708084906.2827024-1-alexander.usyskin@intel.com
2024-07-17 09:47:15 -07:00
Jani Nikula
c96baaa839
drm/xe: make heci_gsc_irq_chip const
...
The irq_chip definition can be const, make it so.
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20240117122044.1544174-2-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2024-01-19 14:35:31 +02:00
Matt Roper
1374df38e9
drm/xe: Drop some unnecessary header includes
...
Several files were including register headers that they no longer
require. Drop the unnecessary includes to reduce build dependencies.
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://lore.kernel.org/r/20231214184659.2249559-18-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2023-12-21 11:46:17 -05:00
Matt Roper
48e70d2a1a
drm/xe: Move GSC HECI base offsets out of register header
...
These offsets are only used to setup the auxiliary device BAR
information and are never used for driver read/write operations. Move
them to the GSC HECI file where they're actually used.
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com >
Link: https://lore.kernel.org/r/20231214184659.2249559-15-matthew.d.roper@intel.com
Signed-off-by: Matt Roper <matthew.d.roper@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2023-12-21 11:46:16 -05:00
Alexander Usyskin
86017f3898
drm/xe/gsc: enable pvc support
...
Configure and enable PVC HECI GSC support.
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com >
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2023-12-21 11:43:38 -05:00
Vitaly Lubart
87a4c85d3a
drm/xe/gsc: add gsc device support
...
Create mei-gscfi auxiliary device and configure interrupts
to be consumed by mei-gsc device driver.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Vitaly Lubart <vitaly.lubart@intel.com >
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com >
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2023-12-21 11:43:00 -05:00
