Allow the generic gpio-ranges property so GPIOs can be mapped to their
corresponding pin. This way control of GPIO on pins that are already used
by other peripherals can be denied and basic pinconf can be done on pin
controllers that support it.
Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
i.MX8ULP and i.MX93 actually has two interrupts for each gpio
controller, one for Trustzone non-secure world, one for secure world.
And they has one register based, not two as i.MX7ULP or VF610.
Although the Linux Kernel driver gpio-vf610.c could work with
fsl,imx7ulp-gpio compatible, it is based on some tricks did in
device tree with some offset added to base address.
So actually i.MX8ULP/i.MX93 is not compatible with i.MX7ULP.
Last, i.MX93 is directly derived from i.MX8ULP, so make i.MX93 GPIO
compatible with i.MX8ULP
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
fsl,imx25-gpio and fsl,imx27-gpio are not documented, causing schema
warnings.
fsl,imx25-gpio is compatible with fsl,imx35-gpio and fsl,imx27-gpio
is compatible with fsl,imx21-gpio.
Document them accordingly.
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
This rewrites the IXP4xx GPIO bindings to use YAML schema,
and adds two new properties to enable fixed clock output on
pins 14 and 15.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Pull pin control updates from Linus Walleij:
"We have some patches to DTS[I] files in arm and arm64 as well, that
were merged here as DT headers were being changed.
The most interesting stuff is the Intel Tangier chip support and
AMLogic C3 in my opinion.
No core changes this time.
Drivers:
- Intel Tangier SoC pin control support
- AMLogic C3 SoC pin control support
- Texas Instruments AM654 SoC pin control support
- Qualcomm SM8350 and SM6115 LPASS (Low Power Audio Sub-System) pin
control support
- Qualcomm PMX75 and PM7550BA (Power Management) pin control support
- Qualcomm PMC8180 and PMC8180C (Power Management) pin control
support
- DROP the Oxnas driver as there is not enough of community interest
to keep carrying this ARM(11) port
Enhancements:
- Bias control in the MT7986 pin control driver
- Misc device tree binding enhancements such as the Broadcom 11351
being converted to YAML
- New macro: DEFINE_NOIRQ_DEV_PM_OPS() put to use
- Clean up some SPDX headers
- Handle non-unique devicetree subnode names in two Renesas drivers"
* tag 'pinctrl-v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (80 commits)
pinctrl: mlxbf3: Remove gpio_disable_free()
pinctrl: use capital "OR" for multiple licenses in SPDX
dt-bindings: pinctrl: renesas,rza2: Use 'additionalProperties' for child nodes
pinctrl: cherryview: fix address_space_handler() argument
pinctrl: intel: consolidate ACPI dependency
pinctrl: tegra: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
pinctrl: renesas: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
pinctrl: mvebu: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
pinctrl: at91: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
pinctrl: cherryview: Switch to use DEFINE_NOIRQ_DEV_PM_OPS() helper
pm: Introduce DEFINE_NOIRQ_DEV_PM_OPS() helper
pinctrl: mediatek: assign functions to configure pin bias on MT7986
pinctrl: mediatek: fix pull_type data for MT7981
dt-bindings: pinctrl: aspeed: Allow only defined pin mux node properties
dt-bindings: pinctrl: Drop 'phandle' properties
pinctrl: lynxpoint: Make use of pm_ptr()
pinctrl: baytrail: Make use of pm_ptr()
pinctrl: intel: Switch to use exported namespace
pinctrl: lynxpoint: reuse common functions from pinctrl-intel
pinctrl: cherryview: reuse common functions from pinctrl-intel
...
Pull devicetree updates from Rob Herring:
"DT core:
- Add support for generating DT nodes for PCI devices. This is the
groundwork for applying overlays to PCI devices containing
non-discoverable downstream devices.
- DT unittest additions to check reverted changesets, to test for
refcount issues, and to test unresolved symbols. Also, various
clean-ups of the unittest along the way.
- Refactor node and property manipulation functions to better share
code with old API and changeset API
- Refactor changeset print functions to a common implementation
- Move some platform_device specific functions into of_platform.c
Bindings:
- Treewide fixing of typos
- Treewide clean-up of SPDX tags to use 'OR' consistently
- Last chunk of dropping unnecessary quotes. With that, the check for
unnecessary quotes is enabled in yamllint.
- Convert ftgmac100, zynqmp-genpd, pps-gpio, syna,rmi4, and qcom,ssbi
bindings to DT schema format
- Add Allwinner V3s xHCI USB, Saef SF-TC154B display, QCom SM8450
Inline Crypto Engine, QCom SM6115 UFS, QCom SDM670 PDC interrupt
controller, Arm 2022 Cortex cores, and QCom IPQ9574 Crypto bindings
- Fixes for Rockchip DWC PCI binding
- Ensure all properties are evaluated on USB connector schema
- Fix dt-check-compatible script to find of_device_id instances with
compiler annotations"
* tag 'devicetree-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (64 commits)
dt-bindings: usb: Add V3s compatible string for OHCI
dt-bindings: usb: Add V3s compatible string for EHCI
dt-bindings: display: panel: mipi-dbi-spi: add Saef SF-TC154B
dt-bindings: vendor-prefixes: document Saef Technology
dt-bindings: thermal: lmh: update maintainer address
of: unittest: Fix of_unittest_pci_node() kconfig dependencies
dt-bindings: crypto: ice: Document sm8450 inline crypto engine
dt-bindings: ufs: qcom: Add ICE to sm8450 example
dt-bindings: ufs: qcom: Add sm6115 binding
dt-bindings: ufs: qcom: Add reg-names property for ICE
dt-bindings: yamllint: Enable quoted string check
dt-bindings: Drop remaining unneeded quotes
of: unittest-data: Fix whitespace - angular brackets
of: unittest-data: Fix whitespace - indentation
of: unittest-data: Fix whitespace - blank lines
of: unittest-data: Convert remaining overlay DTS files to sugar syntax
of: overlay: unittest: Add test for unresolved symbol
of: unittest: Add separators to of_unittest_overlay_high_level()
of: unittest: Cleanup partially-applied overlays
of: unittest: Merge of_unittest_apply{,_revert}_overlay_check()
...
Convert Broadcom Kona family GPIO controller bindings to DT schema.
Changes during conversion:
- add used, but previously undocumented SoC-specific compatibles
Signed-off-by: Stanislav Jakubek <stano.jakubek@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Allow the GPIO controller subnode to define GPIO names. Already used in
at least on DTS:
bitmain/bm1880-sophon-edge.dtb: gpio@50027000: gpio-controller@0: 'gpio-line-names' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Serge Semin <fancer.lancer@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Pull ARM SoC devicetree updates from Arnd Bergmann:
"The biggest change this time is for the 32-bit devicetree files, which
are all moved to a new location, using separate subdirectories for
each SoC vendor, following the same scheme that is used on arm64, mips
and riscv. This has been discussed for many years, but so far we never
did this as there was a plan to move the files out of the kernel
entirely, which has never happened.
The impact of this will be that all external patches no longer apply,
and anything depending on the location of the dtb files in the build
directory will have to change. The installed files after 'make
dtbs_install' keep the current location.
There are six added SoCs here that are largely variants of previously
added chips. Two other chips are added in a separate branch along with
their device drivers.
- The Samsung Exynos 4212 makes its return after the Samsung Galaxy
Express phone is addded at last. The SoC support was originally
added in 2012 but removed again in 2017 as it was unused at the
time.
- Amlogic C3 is a Cortex-A35 based smart IP camera chip
- Qualcomm MSM8939 (Snapdragon 615) is a more featureful variant of
the still common MSM8916 (Snapdragon 410) phone chip that has been
supported for a long time.
- Qualcomm SC8180x (Snapdragon 8cx) is one of their earlier high-end
laptop chips, used in the Lenovo Flex 5G, which is added along with
the reference board.
- Qualcomm SDX75 is the latest generation modem chip that is used as
a peripherial in phones but can also run a standalone Linux. Unlike
the prior 32-bit SDX65 and SDX55, this now has a 64-bit Cortex-A55.
- Alibaba T-Head TH1520 is a quad-core RISC-V chip based on the
Xuantie C910 core, a step up from all previously added rv64 chips.
All of the above come with reference board implementations, those
included there are 39 new board files, but only five more 32-bit this
time, probably a new low:
- Marantec Maveo board based on dhcor imx6ull module
- Endian 4i Edge 200, based on the armv5 Marvell Kirkwood chip
- Epson Moverio BT-200 AR glasses based on TI OMAP4
- PHYTEC STM32MP1-3 Dev board based on STM32MP15 PHYTEC SOM
- ICnova ADB4006 board based on Allwinner A20
On the 64-bit side, there are also fewer addded machines than we had
in the recent releases:
- Three boards based on NXP i.MX8: Emtop SoM & Baseboard, NXP i.MX8MM
EVKB board and i.MX8MP based Gateworks Venice gw7905-2x device.
- NVIDIA IGX Orin and Jetson Orin Nano boards, both based on tegra234
- Qualcomm gains support for 6 reference boards on various members of
their IPQ networking SoC series, as well as the Sony Xperia M4 Aqua
phone, the Acer Aspire 1 laptop, and the Fxtec Pro1X board on top
of the various reference platforms for their new chips.
- Rockchips support for several newer boards: Indiedroid Nova
(rk3588), Edgeble Neural Compute Module 6B (rk3588), FriendlyARM
NanoPi R2C Plus (rk3328), Anbernic RG353PS (rk3566), Lunzn
Fastrhino R66S/R68S (rk3568)
- TI K3/AM625 based PHYTEC phyBOARD-Lyra-AM625 board and Toradex
Verdin family with AM62 COM, carrier and dev boards
Other changes to existing boards contain the usual minor improvements
along with
- continued updates to clean up dts files based on dtc warnings and
binding checks, in particular cache properties and node names
- support for devicetree overlays on at91, bcm283x
- significant additions to existing SoC support on mediatek,
qualcomm, ti k3 family, starfive jh71xx, NXP i.MX6 and i.MX8, ST
STM32MP1
As usual, a lot more detail is available in the individual merge
commits"
* tag 'soc-dt-6.5' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (926 commits)
ARM: mvebu: fix unit address on armada-390-db flash
ARM: dts: Move .dts files to vendor sub-directories
kbuild: Support flat DTBs install
ARM: dts: Add .dts files missing from the build
ARM: dts: allwinner: Use quoted #include
ARM: dts: lan966x: kontron-d10: add PHY interrupts
ARM: dts: lan966x: kontron-d10: fix SPI CS
ARM: dts: lan966x: kontron-d10: fix board reset
ARM: dts: at91: Enable device-tree overlay support for AT91 boards
arm: dts: Enable device-tree overlay support for AT91 boards
arm64: dts: exynos: Remove clock from Exynos850 pmu_system_controller
ARM: dts: at91: use generic name for shutdown controller
ARM: dts: BCM5301X: Add cells sizes to PCIe nodes
dt-bindings: firmware: brcm,kona-smc: convert to YAML
riscv: dts: sort makefile entries by directory
riscv: defconfig: enable T-HEAD SoC
MAINTAINERS: add entry for T-HEAD RISC-V SoC
riscv: dts: thead: add sipeed Lichee Pi 4A board device tree
riscv: dts: add initial T-HEAD TH1520 SoC device tree
riscv: Add the T-HEAD SoC family Kconfig option
...
This rewrites the STMPE GPIO bindings to a YAML schema.
We add the properties that are used in the widely used
STMPE GPIO device nodes found in the wild, most notably
interrupt support, so interrupt-cells and
interrupt-controller is now part of the bindings.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
This is a generic binding for simple MMIO GPIO controllers. Although we
have a single driver for these controllers, they were previously spread
over several files. Consolidate them. The register descriptions are
adapted from the comments in the source. There is no set order for the
registers, and some registers may be omitted. Because of this, reg-names
is mandatory, and no order is specified.
Rename brcm,bcm6345-gpio to brcm,bcm63xx-gpio to reflect that bcm6345
has moved.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Pull pin control updates from Linus Walleij:
"Mostly drivers! Nothing special: some new Qualcomm chips as usual, and
the new NXP S32 and nVidia BlueField-3.
Core changes:
- Make a lot of pin controllers with GPIO and irqchips immutable,
i.e. not living structs, but const structs. This is driving a
changed initiated by the irqchip maintainers.
New drivers:
- New driver for the NXP S32 SoC pin controller
- As part of a thorough cleanup and restructuring of the
Ralink/Mediatek drivers, the Ralink MIPS pin control drivers were
folded into the Mediatek directory and the family is renamed
"mtmips". The Ralink chips live on as Mediatek MIPS family where
new variants can be added. As part of this work also the device
tree bindings were reworked.
- New subdriver for the Qualcomm SM7150 SoC.
- New subdriver for the Qualcomm IPQ9574 SoC.
- New driver for the nVidia BlueField-3 SoC.
- Support for the Qualcomm PMM8654AU mixed signal circuit GPIO.
- Support for the Qualcomm PMI632 mixed signal circuit GPIO.
Improvements:
- Add some missing pins and generic cleanups on the Renesas r8a779g0
and r8a779g0 pin controllers. Generic Renesas extension for power
source selection on several SoCs.
- Misc cleanups for the Atmel AT91 and AT91-PIO4 pin controllers
- Make the GPIO mode work on the Qualcomm SM8550-lpass-lpi driver.
- Several device tree binding cleanups as the binding YAML syntax is
solidifying"
* tag 'pinctrl-v6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (153 commits)
pinctrl-bcm2835.c: fix race condition when setting gpio dir
dt-bindings: pinctrl: qcom,sm8150: Drop duplicate function value "atest_usb2"
dt-bindings: pinctrl: qcom: Add few missing functions
pinctrl: qcom: spmi-gpio: Add PMI632 support
dt-bindings: pinctrl: qcom,pmic-gpio: add PMI632
pinctrl: wpcm450: select MFD_SYSCON
pinctrl: qcom ssbi-gpio: Convert to immutable irq_chip
pinctrl: qcom ssbi-mpp: Convert to immutable irq_chip
pinctrl: qcom spmi-mpp: Convert to immutable irq_chip
pinctrl: plgpio: Convert to immutable irq_chip
pinctrl: pistachio: Convert to immutable irq_chip
pinctrl: pic32: Convert to immutable irq_chip
pinctrl: sx150x: Convert to immutable irq_chip
pinctrl: stmfx: Convert to immutable irq_chip
pinctrl: st: Convert to immutable irq_chip
pinctrl: mcp23s08: Convert to immutable irq_chip
pinctrl: equilibrium: Convert to immutable irq_chip
pinctrl: npcm7xx: Convert to immutable irq_chip
pinctrl: armada-37xx: Convert to immutable irq_chip
pinctrl: nsp: Convert to immutable irq_chip
...
SPI and I2C bus node names are expected to be "spi" or "i2c",
respectively, with nothing else, a unit-address, or a '-N' index. A
pattern of 'spi0' or 'i2c0' or similar has crept in. Fix all these
cases. Mostly scripted with the following commands:
git grep -l '\si2c[0-9] {' Documentation/devicetree/ | xargs sed -i -e 's/i2c[0-9] {/i2c {/'
git grep -l '\sspi[0-9] {' Documentation/devicetree/ | xargs sed -i -e 's/spi[0-9] {/spi {/'
With this, a few errors in examples were exposed and fixed.
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> # for the microchip,mcp251xfd.yaml
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com> # for power-supply
Acked-by: Wolfram Sang <wsa@kernel.org>
Acked-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20230228215433.3944508-1-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Provide more guidance to differentiate between recommendations for names of
lines which are hard-wired to on-board devices, versus recommendations for
names of lines which are connected to general-purpose pin headers.
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Convert the Unisoc EIC controller binding to DT schema format.
Update the maxItems of 'reg' property, since the current gpio-eic-sprd
driver supports 3 reg items. Also removed a few similar examples.
Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Convert the Fujitsu MB86S7x GPIO binding to DT schema format.
The "socionext,synquacer-gpio" compatible was not documented, but is
compatible with "fujitsu,mb86s70-gpio" and is in use (in u-boot
Synquacer dts).
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
