Commit Graph

13509 Commits

Author SHA1 Message Date
Lijo Lazar
05347402d1 drm/amdgpu: Add SMU v13.0.6 default reset methods
For APUs with SMU v13.0.6, mode-2 reset is kept as default and for
others mode-1 is the default reset method.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Tested-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 18:05:43 -04:00
Lijo Lazar
7c2949c12e drm/amdgpu: Add bootloader wait for PSP v13
Implement the wait for bootloader call back for PSP v13.0 ASICs. Only
for ASICs with PSP v13.0.6, it needs an additional check for VBIOS
mailbox status.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Tested-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 18:04:10 -04:00
Hamza Mahfooz
0a611560f5 drm/amdgpu: register a dirty framebuffer callback for fbcon
fbcon requires that we implement &drm_framebuffer_funcs.dirty.
Otherwise, the framebuffer might take a while to flush (which would
manifest as noticeable lag). However, we can't enable this callback for
non-fbcon cases since it may cause too many atomic commits to be made at
once. So, implement amdgpu_dirtyfb() and only enable it for fbcon
framebuffers (we can use the "struct drm_file file" parameter in the
callback to check for this since it is only NULL when called by fbcon,
at least in the mainline kernel) on devices that support atomic KMS.

Cc: Aurabindo Pillai <aurabindo.pillai@amd.com>
Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: stable@vger.kernel.org # 6.1+
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2519
Reviewed-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 18:03:48 -04:00
Mangesh Gadre
7b9f623530 drm/amdgpu: Updated TCP/UTCL1 programming
Update TCP/UTCL1 thrashing control settings

v2: updated rev_id check

Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 18:02:49 -04:00
Hawking Zhang
7d4424373d drm/amdgpu: Fix the return for gpu mode1_reset
amdgpu_device_mode1_reset will return gpu mode1_reset
succeed (ret = 0) as long as wait_for_bootloader call
succeed, regardless of the status reported by smu or
psp firmware. This results to driver continue executing
recovery even smu or psp fail to perform mode1 reset.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 18:02:10 -04:00
Mangesh Gadre
3f16096795 drm/amdgpu: Remove SRAM clock gater override by driver
rlc firmware does required setting, driver need not do it.

Signed-off-by: Mangesh Gadre <Mangesh.Gadre@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:59:17 -04:00
Lijo Lazar
7656168a8a drm/amdgpu: Add bootloader status check
Add a function to wait till bootloader has reached steady state.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Tested-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:58:58 -04:00
Horace Chen
8c97e87c13 drm/amdkfd: use correct method to get clock under SRIOV
[What]
Current SRIOV still using adev->clock.default_XX which gets from
atomfirmware. But these fields are abandoned in atomfirmware long ago.
Which may cause function to return a 0 value.

[How]
We don't need to check whether SR-IOV. For SR-IOV one-vf-mode,
pm is enabled and VF is able to read dpm clock
from pmfw, so we can use dpm clock interface directly. For
multi-VF mode, VF pm is disabled, so driver can just react as pm
disabled. One-vf-mode is introduced from GFX9 so it shall not have
any backward compatibility issue.

Signed-off-by: Horace Chen <horace.chen@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:58:29 -04:00
Lijo Lazar
8f1778939b drm/amdgpu: Unset baco dummy mode on nbio v7.9
BACO dummy mode could be set under reset conditions and that affects
framebuffer access. Check If baco dummy mode is set, unset it if so.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Asad Kamal <asad.kamal@amd.com>
Tested-by: Asad Kamal <asad.kamal@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:58:23 -04:00
YiPeng Chai
e81c455685 drm/amdgpu: Enable ras for mp0 v13_0_6 sriov
Enable ras for mp0 v13_0_6 sriov

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Stanley.Yang <Stanley.Yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:55:02 -04:00
Samir Dhume
bae44a8fcb drm/amdgpu/jpeg - skip change of power-gating state for sriov
Powergating is handled in the host driver.

Reviewed-by: Zhigang Luo <zhigang.luo@amd.com>
Signed-off-by: Samir Dhume <samir.dhume@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:54:18 -04:00
Le Ma
46b55e25c9 drm/amdgpu: update gc_info v2_1 from discovery
Several new fields are exposed in gc_info v2_1

Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Shiwu Zhang <shiwu.zhang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:53:19 -04:00
Le Ma
d4f6425a56 drm/amdgpu: update mall info v2 from discovery
Mall info v2 is introduced in ip discovery

Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Shiwu Zhang <shiwu.zhang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:53:08 -04:00
Candice Li
4b721ed87e drm/amdgpu: Only support RAS EEPROM on dGPU platform
RAS EEPROM device is only supported on dGPU platform for smu v13_0_6.

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:52:49 -04:00
Lang Yu
983ac45a06 drm/amdgpu: update SET_HW_RESOURCES definition for UMSCH
Align with FW changes.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:14:21 -04:00
Lang Yu
eebb06d121 drm/amdgpu: add amdgpu_umsch_mm module parameter
Enable Multi Media User Mode Scheduler
(0 = disabled (default), 1 = enabled).

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:14:21 -04:00
Lang Yu
822f780829 drm/amdgpu/discovery: enable UMSCH 4.0 in IP discovery
Enable UMSCH to support VPE and VCN user queues.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:14:21 -04:00
Lang Yu
4f94903332 drm/amdgpu: add PSP loading support for UMSCH
Add front door loading support.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:14:21 -04:00
Lang Yu
40748f9a0a drm/amdgpu: reserve mmhub engine 3 for UMSCH FW
UMSCH FW uses mmhub engine 3 for invalidation.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:14:21 -04:00
Lang Yu
d591ae0c9f drm/amdgpu: add VPE queue submission test
Submit a fence command through indirect buffer.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:14:21 -04:00
Lang Yu
5d5eac7e83 drm/amdgpu: add selftest framework for UMSCH
Prepare for VPE and VCN queue submission test.

v2: rebase on drm_exec (Alex)

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 17:14:21 -04:00
Lang Yu
dc6f3d6ff2 drm/amdgpu: enable UMSCH scheduling for VPE
Add VPE into UMSCH hw resourses,
set vmid mask to 0xf00,
set hqd mask to 0xfe,
then UMSCH can schedule VPE queues.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:40:56 -04:00
Lang Yu
3488c79bea drm/amdgpu: add initial support for UMSCH
Add basic data structure, dummy ring functions
and ip functions for UMSCH.

Implement sw_init(ring_init and init_microcodede) and
hw_init(load_microcode), UMSCH can boot up now.

Implement hw_init(ring_start) and hw_fini(ring_stop),
UMSCH is ready for command submission now.

Implement set_hw_resources and add/remove_queue,
UMSCH is ready for scheduling now.

Aggregated doorbell is used to notify UMSCH FW that
there is unmapped queue with corresponding priority level
(e.g., AGDB[0] for Real time band, etc.) is updating its job.

v2: squash together initial patches to avoid breaking the
    build (Alex)

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:40:53 -04:00
Lang Yu
9c852a42a9 drm/amdgpu: add UMSCH firmware header definition
Add firmware header definition for UMSCH.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:40:45 -04:00
Lang Yu
1a29f36781 drm/amdgpu: add UMSCH RING TYPE definition
Add RING TYPE definition for Multi Mdeia User Mode Scheduler.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:40:40 -04:00
Saleemkhan Jamadar
1cf36599b9 drm/amdgpu/jpeg: initialize number of jpeg ring
Initialize number of jpeg ring for vcn 4.0.5.

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:39:41 -04:00
Christian König
a5492fe27f drm/amdgpu: fix amdgpu_cs_p1_user_fence
The offset is just 32bits here so this can potentially overflow if
somebody specifies a large value. Instead reduce the size to calculate
the last possible offset.

The error handling path incorrectly drops the reference to the user
fence BO resulting in potential reference count underflow.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:39:28 -04:00
Evan Quan
90bcb9b595 drm/amdgpu: revise the device initialization sequences
By placing the sysfs interfaces creation after `.late_int`. Since some
operations performed during `.late_init` may affect how the sysfs
interfaces should be created.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:35:33 -04:00
Evan Quan
3e38b634f9 drm/amd/pm: introduce a new set of OD interfaces
There will be multiple interfaces(sysfs files) exposed with each representing
a single OD functionality. And all those interface will be arranged in a tree
liked hierarchy with the top dir as "gpu_od". Meanwhile all functionalities
for the same component will be arranged under the same directory.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:35:26 -04:00
Saleemkhan Jamadar
6be6e74b7d drm/amdgpu: enable PG flags for VCN
Enable PG flags for VCN and Jpeg on IP 11_5_0

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:35:02 -04:00
Saleemkhan Jamadar
844d8dd5b9 drm/amdgpu/discovery: add VCN 4.0.5 Support
Enable VCN 4.0.5 on gc 11_5_0.

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:34:58 -04:00
Saleemkhan Jamadar
c64f389506 drm/amdgpu/soc21: Add video cap query support for VCN_4_0_5
Added the video capability query support for VCN version 4_0_5

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:34:52 -04:00
Saleemkhan Jamadar
cc308acc9b drm/amdgpu:enable CG and PG flags for VCN
Enable CG and PG flags for VCN on IP 11_5_0

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:34:48 -04:00
Saleemkhan Jamadar
1827b37582 drm/amdgpu: add VCN_4_0_5 firmware support
Add VCN_4_0_5 firmware support

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:34:43 -04:00
Saleemkhan Jamadar
8f98a715da drm/amdgpu/jpeg: add jpeg support for VCN4_0_5
Add jpeg support for VCN4_0_5

v2 - update license year (Leo Liu)

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:34:36 -04:00
Saleemkhan Jamadar
547aad32ed drm/amdgpu: add VCN4 ip block support
Add VCN 4.0.5 initialization and decoder/encoder ring functions.

v2 - update license year (Leo Liu)

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:34:32 -04:00
Lang Yu
f9ecae9a4e drm/amdgpu: fix VPE front door loading issue
Implement proper front door loading for vpe 6.1.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:34:22 -04:00
Lang Yu
5f6e9cdc83 drm/amdgpu: add VPE FW version query support
Add support to query VPE FW version.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:34:19 -04:00
Lang Yu
3ee8fb7005 drm/amdgpu: enable VPE for VPE 6.1.0
Enable Video Processing Engine on SoCs
that contain VPE 6.1.0.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:34:16 -04:00
Lang Yu
523c12802d drm/amdgpu: add user space CS support for VPE
Enable command submission to VPE from user space.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:34:14 -04:00
Lang Yu
c5d67a0ec3 drm/amdgpu: add PSP loading support for VPE
Add PSP loading support for Video Processing Engine.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:34:10 -04:00
Lang Yu
9d4346bdbc drm/amdgpu: add VPE 6.1.0 support
Add skeleton driver code. (Ray)
Add initial support for Video Processing Engine. (Lang)

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:34:05 -04:00
Lang Yu
5861e47731 drm/amdgpu: add nbio 7.11 callback for VPE
Add nbio callback to configure doorbell settings.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:33:56 -04:00
Lang Yu
75fdd738ff drm/amdgpu: add nbio callback for VPE
Add nbio callback to configure doorbell settings.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:33:53 -04:00
Lang Yu
964a36d7a4 drm/amdgpu: add PSP FW TYPE for VPE
Add PSP FW TYPE for Video Processing Engine.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:33:50 -04:00
Lang Yu
4c63735fa8 drm/amdgpu: add UCODE ID for VPE
Add UCODE ID for Video Processing Engine.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:33:47 -04:00
Lang Yu
ce7b59c1e6 drm/amdgpu: add support for VPE firmware name decoding
Add decoding VPE firmware name support.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:33:43 -04:00
Lang Yu
2f3916bedb drm/amdgpu: add doorbell index for VPE
Add doorbell index for Video Processing Engine.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:33:40 -04:00
Lang Yu
0b233357a6 drm/amdgpu: add HWID for VPE
Add HWID for Video Processing Engine.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:33:31 -04:00
Lang Yu
b0fa855cab drm/amdgpu: add VPE firmware interface
Add initial firmware interface. (Ray)
Add more opcodes and rename to vpe_v6_1. (Lang)

v2: Update copyright date (Alex)

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-31 16:33:27 -04:00