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364 Commits

Author SHA1 Message Date
Yifan Zhang
8f8cb7124e drm/amdgpu: update headers for nbio v7.11 
This patch is to update headers for nbio v7.11.

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Tim Huang <Tim.Huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2024-01-15 18:31:41 -05:00
Tom St Denis
44f3356e36 drm/amd/amdgpu: Add SMUIO headers for 10.0.2 
These were requested by a UMR user for debugging purposes.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-12-06 15:22:37 -05:00
Li Ma
ee95135bfe drm/amdgpu: add init_registers for nbio v7.11 
enable init_registers callback func for nbio v7.11.

Signed-off-by: Li Ma <li.ma@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-11-29 16:49:00 -05:00
Alex Sierra
20b07b0cb3 drm/amdgpu: Force order between a read and write to the same address 
Setting register to force ordering to prevent read/write or write/read
hazards for un-cached modes.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-11-29 16:48:59 -05:00
Daniel Miess
5f70d4ff80 drm/amd/display: Enable DCN clock gating for DCN35 
[WHY & HOW]
Enable DCN clock gating for DCN35.
Disable DTBCLK gate before link training
and re-enable afterwards

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Daniel Miess <daniel.miess@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-11-17 09:30:50 -05:00
Hawking Zhang
38a64e3a33 drm/amdgpu: Add C2PMSG_109/126 reg field shift/masks 
Add MP0_C2PMSG_109/126 register field shift/masks
that are used to identify boot status by driver.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Le Ma <le.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-11-03 12:18:33 -04:00
Li Ma
fa9dd7a285 drm/amdgpu: fix missing stuff in NBIO v7.11 
add get_clockgating_state, update_medium_grain_light_sleep and
update_medium_grain_clock_gating in nbio_v7_11_funcs
v1:
add missing funcs in nbio_v7_11.c
v2:
modify the if condition and add spport for nbio v7.11 clockgating.

Signed-off-by: Li Ma <li.ma@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-10-20 15:11:28 -04:00
Alex Deucher
20ace55bc0 drm/amdgpu: update to the latest GC 11.5 headers 
Add some additional bitfields.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-10-19 18:26:51 -04:00
Lang Yu
4661482b9c drm/amdgpu: correct NBIO v7.11 programing 
Use v7.7 before, switch to v7.11 now.
Fix incorrect programing.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Yifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-10-13 11:33:21 -04:00
Yang Wang
25396684b5 drm/amd/pm: add smu_13_0_6 mca dump support 
v1:
implement smu_v13_0_6 mca bank interface.

v2:
- remove unnecessary lock
- move MCMP1_* macros to mp_13_0_6_sh_mask.h file

Signed-off-by: Yang Wang <kevinyang.wang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-09-20 16:24:06 -04:00
Candice Li
806c6b3d6f drm/amd: Add umc v12_0_0 ip headers 
Add umc v12_0_0 ip headers.

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-09-06 14:35:12 -04:00
Lang Yu
2c98de563b drm/amdgpu: add UMSCH 4.0 register headers 
Add headers for UMSCH 4.0.

v2: updates (Alex)

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Veerabadhran Gopalakrishnan <Veerabadhran.Gopalakrishnan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-31 16:35:06 -04:00
Saleemkhan Jamadar
c2066c5fb3 drm/amdgpu: add vcn 4_0_5 header files 
Add VCN 4.0.5 registers

v2 - Add license header (Alexander Deucher)
v3 - updates (Alex)

Signed-off-by: Saleemkhan Jamadar <saleemkhan.jamadar@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-31 16:34:25 -04:00
Lang Yu
2edc59309f drm/amdgpu: add VPE 6.1.0 header files 
Add initial headers. (Ray)
Update to align with hardware changes. (Lang)
Updates (Alex)

Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:17 -04:00
Qingqing Zhuo
ea629e5cf2 drm/amd/display: Add dcn35 register header files 
[Why & How]
Add register headers for DCN35.

Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:51:13 -04:00
Li Ma
ed807f0cbf drm/amdgpu: add header files for MP 14.0.0 
This patch will add header files for MP 14.0.0.

v2: updates (Alex)

Signed-off-by: Li Ma <li.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:27:30 -04:00
Lang Yu
1aa68225de drm/amdgpu: add mmhub 3.3.0 headers 
Add new headers.

v2: updates (Alex)

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:01:06 -04:00
Lang Yu
bfb1ee9451 drm/amdgpu: add gc headers for gc 11.5.0 
Add gc_11_5_0 headers.

v2: updates (Alex)

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:00:34 -04:00
benl
ca8c68142a drm/amdgpu: add nbio 7.11 registers 
Add register headers.

v2: Updates (Alex)
v3: Updates (Alex)
v4: Updates (Alex)

Signed-off-by: benl <ben.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-30 15:00:24 -04:00
Aurabindo Pillai
b73b737f3d drm/amd/display: Add some missing register definitions 
[Why&How]
Add some missing register definitions and rearrange some others to
maintain consistency with related definitions.

Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-15 18:08:28 -04:00
Asad Kamal
59070fd9cc drm/amdgpu: Add pci usage to nbio v7.9 
Add implementation to get pcie usage for nbio v7.9.

Signed-off-by: Asad Kamal <asad.kamal@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Shiwu Zhang <shiwu.zhang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-09 09:46:05 -04:00
Ben Li
85c391abd2 drm/amdgpu: add ih 6.1 registers 
Add new registers.

v2: updates (Alex)

Signed-off-by: Ben Li <ben.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-08-07 16:35:31 -04:00
Jonathan Kim
4504f14338 drm/amdgpu: setup hw debug registers on driver initialization 
Add missing debug trap registers references and initialize all debug
registers on boot by clearing the hardware exception overrides and the
wave allocation ID index.

The debugger requires that TTMPs 6 & 7 save the dispatch ID to map
waves onto dispatch during compute context inspection.
In order to correctly set this up, set the special reserved CP bit by
default whenever the MQD is initailized.

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-06-09 12:34:56 -04:00
Lijo Lazar
a3ffabb250 drm/amdgpu: Disable interrupt tracker on NBIOv7.9 
Enabling nBIF interrupt history tracker prevents LCLK deep sleep,
hence disable it

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-06-09 10:45:23 -04:00
Hawking Zhang
2b80ffc2d8 drm/amdgpu: Add gc v9_4_3 ras error status registers 
GC v9_4_3 introduces UE|CE_ERR_STATUS_LO|HI to log
hardware errors

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-06-09 10:37:34 -04:00
Hawking Zhang
6c2bebfca4 drm/amdgpu: Add vcn/jpeg ras err status registers 
Add new ras error status registers introduced in
vcn v4_0_3 to log vcn and jpeg ras error.

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-06-09 09:58:12 -04:00
Hawking Zhang
90cbee204e drm/amdgpu: Add mmhub v1_8_0 ras err status registers 
add new ras error status registers introduced in
mmhub v1_8_0 to log mmea and mm_cane ras err, including
MMEAx_UE|CE_ERR_STATUS_LO|HI
MM_CANE_UE|CE_ERR_STATUS_LO|HI

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-06-09 09:53:09 -04:00
Hawking Zhang
d90d90a197 drm/amdgpu: Add sdma v4_4_2 ras registers 
SDMA_UE_ERR_STATUS_HI|LO are introduced in v4_4_2
to replace SDMA_EDC_COUNTER/COUNTER2 registers to
log SDMA RAS errors

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-06-09 09:52:57 -04:00
Hawking Zhang
63121b11a9 drm/amdgpu: add smuio v13_0_3 ip headers 
Add smuio v13_0_3 register offset and shift masks
header files

v2: update headers (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-06-09 09:48:30 -04:00
Hawking Zhang
50b8b62ea4 drm/amdgpu: add vcn v4_0_3 ip headers 
Add vcn v4_0_3 register offset adn shift masks
header files

v2: update headers (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-06-09 09:40:50 -04:00
Mukul Joshi
318e431b30 drm/amdgpu: Enable IH retry CAM on GFX9 
This patch enables the IH retry CAM on GFX9 series cards. This
retry filter is used to prevent sending lots of retry interrupts
in a short span of time and overflowing the IH ring buffer. This
will also help reduce CPU interrupt workload.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-04-13 00:14:08 -04:00
Hawking Zhang
8e7a49e09e drm/amdgpu: add mmhub v1_8_0 ip headers 
Add mmhub v1_8_0 register offset and shift masks
header files

v2: update headers (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-03-31 11:18:43 -04:00
Hawking Zhang
b11e193093 drm/amdgpu: add gc v9_4_3 ip headers 
Add gc v9_4_3 register offset and shift masks
header files

v2: update headers (Alex)
v3: more updates (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-03-31 11:18:43 -04:00
Hawking Zhang
40a9634b4f drm/amdgpu: add osssys v4_4_2 ip headers 
Add osssys v4_4_2 register offset and shift masks
header files

v2: update headers (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-03-31 11:18:43 -04:00
Hawking Zhang
1b0f0f7b8b drm/amdgpu: add athub v1_8_0 ip headers 
Add athub v1_8_0 register offset and shift masks
header files

v2: update headers (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-03-31 11:18:43 -04:00
Hawking Zhang
52b36510a1 drm/amdgpu: add nbio v7_9_0 ip headers 
Add nbio v7_9_0 register offset and shift masks
header files

v2: update headers (Alex)
v3: squash in updates (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-03-31 11:18:42 -04:00
Tom St Denis
67f3c20969 drm/amd/amdgpu: Add missing INT_STAT_DEBUG registers to GC 10.1 and 10.3 headers 
Checked against database, copied from GC 9.4.2 header.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-03-13 17:15:23 -04:00
Hawking Zhang
3e22193d8c drm/amdgpu: add mp v13_0_6 ip headers 
Add mp v13_0_6 register offset and shift masks
header files

v2: update headers (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-03-07 14:22:41 -05:00
Hawking Zhang
fbf46565c6 drm/amdgpu: add sdma v4_4_2 ip headers 
Add sdma v4_4_2 register offset and shift masks
header files

v2: update headers (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-03-07 14:21:57 -05:00
Hawking Zhang
4f17289f14 drm/amdgpu: add hdp v4_4_2 ip headers 
Add hdp v4_4_2 register offset and shift masks
header files

v2: update headers (Alex)

Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Le Ma <Le.Ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-03-07 14:21:56 -05:00
Stanley.Yang
442d61af79 drm/amdgpu: correct query xgmi3x16 pcs error status 
There is xgmi3x16 pcs error status for aldebaran, driver should
check xgmi3x16 pcs error status field instead of gopx16 pcs error
status field.

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-01-17 16:11:52 -05:00
YiPeng Chai
79d949a2d6 amd/amdgpu: Add RLC_RLCS_FED_STATUS_* to gc v11_0_3 ip headers 
V2:
   Add RLC_RLCS_FED_STATUS_0 and RLC_RLCS_FED_STATUS_1 register
   offset and shift masks.

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2023-01-17 16:11:50 -05:00
Candice Li
6c03a3fc91 drm/amdgpu: Add df v4_3 headers 
Add df v4_3 header files.

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-12-15 12:19:22 -05:00
Alex Deucher
e93e075d34 drm/amdgpu: add missing license to some files 
The driver is MIT, so add the licenses.

Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/2265
Acked-by: Luben Tuikov <luben.tuikov@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-11-23 10:31:31 -05:00
Tao Zhou
88733d6801 drm/amdgpu: add register definition for VCN RAS initialization 
Prepare for enableing VCN RAS poison.

v2: move SHIFT and MASK definitions to related sh_mask.h file.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-11-23 10:31:31 -05:00
Candice Li
6dddc1eb96 drm/amdgpu: Update umc v8_10_0 headers 
Add GeccCtrl offset and mask to umc v8_10_0 headers.

Signed-off-by: Candice Li <candice.li@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-10-11 11:05:35 -04:00
Tom St Denis
82806c25d5 drm/amd/amdgpu: Add missing XGMI hive registers for mmhub 9.4.1 
These are used by umr to sort the hive nodes since the kernel
initializes the nodes in order of bus enumeration not XGMI hive
enumeration.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-09-29 09:41:43 -04:00
Tom St Denis
1ed1f6be6e drm/amd/amdgpu: update GC 10.3.0 pwrdec 
The 10.3 GC headers were missing most of the pwrdec block.
This patch adds the registers and bits present in the 10.1 header
but based on the contents of the 10.3 specs.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-09-13 12:54:23 -04:00
Tom St Denis
780244a2fe drm/amd/amdgpu: Add missing CGTS*TCC_DISABLE to 10.3 headers 
The TCC_DISABLE registers were not included in the 10.3 headers and
instead just placed directly in the gfx_v10_0.c source.  This patch
adds them to the headers so tools like umr can scan them and support them.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-09-07 22:28:42 -04:00
Frank Min
a40a92af46 drm/amdgpu: add gc v11_0_3 ip headers 
Add gc v11_0_3 register offset and shift masks
header files

v2: update registers (Alex)

Signed-off-by: Frank Min <Frank.Min@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
 2022-08-30 16:36:42 -04:00