Konrad Dybcio
23eeae60b0
drm/msm/a6xx: Add missing regs for A7XX
...
Add some missing definitions required for A7 support.
This may be substituted with a mesa header sync.
Tested-by: Neil Armstrong <neil.armstrong@linaro.org > # on SM8550-QRD
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org > # sm8450
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/559282/
Signed-off-by: Rob Clark <robdclark@chromium.org >
2023-10-09 11:22:05 -07:00
Konrad Dybcio
b3ba797e45
drm/msm/a6xx: Add some missing header definitions
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Add a definition of the GMU_AHB_FENCE_STATUS_CLR reg and CP_PROTECT_CNTL
bitfields.
This may be substituted with a mesa header sync.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org >
Patchwork: https://patchwork.freedesktop.org/patch/543330/
Signed-off-by: Rob Clark <robdclark@chromium.org >
2023-08-07 14:30:49 -07:00
Rob Clark
f73343fae5
drm/msm: Update generated headers
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It's been a bit overdue. Regen headers to pull in a2xx perfcntr
updates, etc.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Patchwork: https://patchwork.freedesktop.org/patch/527926/
Link: https://lore.kernel.org/r/20230320185416.938842-2-robdclark@gmail.com
2023-03-21 09:10:47 -07:00
Rob Clark
57cfe41c5f
drm/msm: Update generated headers
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Update headers from mesa commit:
commit 7e63fa2bb13cf14b765ad06d046789ee1879b5ef
Author: Rob Clark <robclark@freedesktop.org >
AuthorDate: Wed Mar 2 17:11:10 2022 -0800
freedreno/registers: Add a couple regs we need for kernel
Signed-off-by: Rob Clark <robdclark@chromium.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15221 >
Signed-off-by: Rob Clark <robdclark@chromium.org >
[for display bits:]
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com >
Link: https://lore.kernel.org/r/20220304005317.776110-2-robdclark@gmail.com
2022-03-04 11:50:41 -08:00
Rob Clark
cc4c26d4ae
drm/msm: Generated register update
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Based on mesa commit daa2ccff7a0201941db3901780d179e2634057d5
Small bit of .c churn in the phy code to adapt to split up of phy
related registers.
Signed-off-by: Rob Clark <robdclark@chromium.org >
2021-06-23 07:33:54 -07:00
Rob Clark
c28c82e9db
drm/msm: sync generated headers
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We haven't sync'd for a while.. pull in updates to get definitions for
some fields in pkt7 payloads.
Signed-off-by: Rob Clark <robdclark@chromium.org >
Acked-by: Jordan Crouse <jcrouse@codeaurora.org >
Signed-off-by: Rob Clark <robdclark@chromium.org >
2020-07-31 06:46:16 -07:00
Jonathan Marek
ad4968d51d
drm/msm/a6xx: enable GMU log
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This is required for a650 to work.
Signed-off-by: Jonathan Marek <jonathan@marek.ca >
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org >
Signed-off-by: Rob Clark <robdclark@chromium.org >
2020-05-18 09:26:33 -07:00
Jonathan Marek
02ef80c54e
drm/msm/a6xx: update pdc/rscc GMU registers for A640/A650
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Update the gmu_pdc registers for A640 and A650.
Some of the RSCC registers on A650 are in a separate region.
Note this also changes the address of these registers:
RSCC_TCS1_DRV0_STATUS
RSCC_TCS2_DRV0_STATUS
RSCC_TCS3_DRV0_STATUS
Based on the values in msm-4.14 and msm-4.19 kernels.
v3: replaced adreno_is_a650 around ->rscc with checks for "rscc" resource
Signed-off-by: Jonathan Marek <jonathan@marek.ca >
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org >
Signed-off-by: Rob Clark <robdclark@chromium.org >
2020-05-18 09:26:33 -07:00
Jonathan Marek
c6ed04f856
drm/msm/a6xx: A640/A650 GMU firmware path
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Newer GPUs have different GMU firmware path.
v3: updated a6xx_gmu_fw_load based on feedback, including gmu_write_bulk,
and removed extra whitespace change
Signed-off-by: Jonathan Marek <jonathan@marek.ca >
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org >
Signed-off-by: Rob Clark <robdclark@chromium.org >
2020-05-18 09:26:33 -07:00
Rob Clark
ccdf7e28b4
drm/msm: update generated headers
...
Signed-off-by: Rob Clark <robdclark@gmail.com >
2018-12-11 13:05:27 -05:00
Rob Clark
a69c5ed25d
drm/msm: update generated headers
...
Signed-off-by: Rob Clark <robdclark@gmail.com >
2018-10-07 14:40:19 -04:00
Rob Clark
2d75632253
drm/msm: update generated headers
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Resync generated headers to pull in a6xx registers.
Signed-off-by: Rob Clark <robdclark@gmail.com >
2018-08-10 18:49:18 -04:00
