3 Commits

Author	SHA1	Message	Date
Bharat Kumar Gogada	e2c6170a55	dt-bindings: PCI: xilinx-cpm: Fix reg property order ... All existing vendor DTSes are using "cpm_slcr" reg followed by "cfg" reg. This order is also suggested by node name which is pcie@fca10000 which suggests that cpm_slcr register should be the first. Driver itself is using devm_platform_ioremap_resource_byname() for both names that's why there is no functional change even on description which are using current order. But still prefer to change order to cover currently used description. Fixes: e22fadb1d0 ("PCI: xilinx-cpm: Add YAML schemas for Versal CPM Root Port") Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> Reviewed-by: Michal Simek <michal.simek@amd.com> Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220516102217.25960-1-bharat.kumar.gogada@xilinx.com	2022-06-01 14:55:18 -05:00
Rob Herring	da4b3d88b0	dt-bindings: Drop required 'interrupt-parent' ... 'interrupt-parent' is never required as it can be in a parent node or a parent node itself can be an interrupt provider. Where exactly it lives is outside the scope of a binding schema. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Lee Jones <lee.jones@linaro.org> Acked-by: Bartosz Golaszewski <brgl@bgdev.pl> Link: https://lore.kernel.org/r/20220107031905.2406176-1-robh@kernel.org	2022-01-11 11:54:35 -06:00
Bharat Kumar Gogada	e22fadb1d0	PCI: xilinx-cpm: Add YAML schemas for Versal CPM Root Port ... Add YAML schemas documentation for Versal CPM Root Port driver. Link: https://lore.kernel.org/r/1592312214-9347-2-git-send-email-bharat.kumar.gogada@xilinx.com Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@xilinx.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rob Herring <robh@kernel.org>	2020-08-05 17:04:24 -05:00