Nikunj Kela
88dbf374a5
dt-bindings: pinctrl: Add SA8255p TLMM
...
Add compatible for TLMM block representing support on SA8255p.
SA8255p uses the same TLMM block as SA8775p however the ownership
of pins are split between Firmware VM and Linux VM on SA8255p. For
example, pins used by UART are owned and configured by Firmware VM
while pins used by ethernet are owned and configured by Linux VM.
Therefore, adding a sa8255p specific compatible to mark the difference.
Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Link: https://lore.kernel.org/20240905200218.3810712-1-quic_nkela@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org >
2024-10-01 14:03:41 +02:00
Krzysztof Kozlowski
79d770afa0
dt-bindings: pinctrl: qcom: drop common properties
...
Drop common properties already defined in referenced common Qualcomm SoC
TLMM bindings and use "unevaluatedProperties: false". This makes the
binding smaller and easier to review.
In few places move the "required:" block to bottom, to match convention.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Link: https://lore.kernel.org/r/20231208215534.195854-9-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org >
2023-12-20 12:09:57 +01:00
Krzysztof Kozlowski
43c9dd099e
dt-bindings: pinctrl: qcom,sa8775p-tlmm: restrict number of interrupts
...
SA8775p TLMM pin controller comes with only one interrupt, so narrow
the number of interrupts previously defined in common TLMM bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Reviewed-by: Rob Herring <robh@kernel.org >
Link: https://lore.kernel.org/r/20231208215534.195854-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org >
2023-12-20 12:09:57 +01:00
Krzysztof Kozlowski
e2b0bac1aa
dt-bindings: pinctrl: qcom,sa8775p-tlmm: add missing wakeup-parent
...
Add missing wakeup-parent property, already used by DTS to indicate that
pins are wakeup capable:
sa8775p-ride.dtb: pinctrl@f000000: 'wakeup-parent' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Acked-by: Rob Herring <robh@kernel.org >
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org >
Link: https://lore.kernel.org/r/20231018145750.429385-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org >
2023-10-26 15:51:40 +02:00
Shazad Hussain
f00295e890
dt-bindings: pinctrl: qcom,sa8775p-tlmm: add gpio function constant
...
Alternative function 'gpio' is not listed in the constants for pin
configuration, so adding this constant to the list.
Cc: stable@vger.kernel.org
Fixes: 9a2aaee23cquic_shazhuss@quicinc.com >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Link: https://lore.kernel.org/r/20230719110344.19983-1-quic_shazhuss@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org >
2023-07-23 21:54:08 +02:00
Krzysztof Kozlowski
ece8e9affc
dt-bindings: pinctrl: qcom,sa8775p-tlmm: simplify with unevaluatedProperties
...
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar
capabilities regarding pin properties, thus we can just accept entire
set provided by qcom,tlmm-common.yaml schema.
Acked-by: Rob Herring <robh@kernel.org >
Link: https://lore.kernel.org/r/20230407184546.161168-21-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
2023-04-12 10:58:32 +02:00
Bartosz Golaszewski
9a2aaee23c
dt-bindings: pinctrl: describe sa8775p-tlmm
...
Add DT bindings for the TLMM controller on sa8775p platforms.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org >
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org >
Link: https://lore.kernel.org/r/20230201150011.200613-2-brgl@bgdev.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org >
2023-02-01 23:44:49 +01:00
