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247 Commits

Author SHA1 Message Date
AngeloGioacchino Del Regno
52edd09475 dt-bindings: iommu: mediatek: Add binding for MT6893 MM IOMMU 
Add binding for the MediaTek Dimensity 1200 (MT6893) SoC's
MultiMedia (MM) IOMMU.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250410144008.475888-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
 2025-04-17 16:41:09 +02:00
Pratyush Brahma
df90abbc31 dt-bindings: arm-smmu: Document QCS8300 GPU SMMU 
Add the compatible for Qualcomm QCS8300 GPU SMMU. Add the compatible
in the list of clocks required by the GPU SMMU and remove it from the
list of disallowed clocks.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Pratyush Brahma <quic_pbrahma@quicinc.com>
Link: https://lore.kernel.org/r/20250310-b4-branch-gfx-smmu-v6-1-15c60b8abd99@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2025-03-11 13:18:38 +00:00
Barnabás Czémán
7506be7d25 dt-bindings: iommu: qcom,iommu: Add MSM8937 IOMMU to SMMUv1 compatibles 
Add MSM8937 compatible string with "qcom,msm-iommu-v1" as fallback
for the MSM8937 IOMMU which is compatible with Qualcomm's secure
fw "SMMU v1" implementation.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Link: https://lore.kernel.org/r/20250224-msm8937-v3-4-dad7c182cccb@mainlining.org
Signed-off-by: Will Deacon <will@kernel.org>
 2025-03-01 07:19:38 +00:00
Joerg Roedel
125f34e4c1 Merge branches 'arm/smmu/updates', 'arm/smmu/bindings', 'qualcomm/msm', 'rockchip', 'riscv', 'core', 'intel/vt-d' and 'amd/amd-vi' into next 2025-01-17 09:02:35 +01:00
Andy Yan
5a0751fc9e dt-bindings: iommu: rockchip: Add Rockchip RK3576 
Just like RK3588, RK3576 is compatible to the existing rk3568
binding.

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20241231093154.252595-1-andyshrk@163.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
 2025-01-06 12:36:19 +01:00
Barnabás Czémán
8735e47e3a dt-bindings: iommu: qcom,iommu: Add MSM8917 IOMMU to SMMUv1 compatibles 
Add MSM8917 compatible string with "qcom,msm-iommu-v1" as fallback
for the MSM8917 IOMMU which is compatible with Qualcomm's secure
fw "SMMU v1" implementation.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Barnabás Czémán <barnabas.czeman@mainlining.org>
Link: https://lore.kernel.org/r/20241215-msm8917-v9-4-bacaa26f3eef@mainlining.org
Signed-off-by: Will Deacon <will@kernel.org>
 2024-12-19 15:36:11 +00:00
Melody Olvera
2593988fd0 dt-bindings: arm-smmu: Document SM8750 SMMU 
Document the SM8750 SMMU block.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Link: https://lore.kernel.org/r/20241204-sm8750_master_smmu-v2-1-9e73e3fc15f2@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2024-12-09 19:19:27 +00:00
Qingqing Zhou
d1e22c7145 dt-bindings: arm-smmu: document QCS615 GPU SMMU 
Add the compatible for Qualcomm QCS615 GPU SMMU. Add the compatible
in the list of 3 clocks required by the GPU SMMU. Remove the compatible
from the "no clocks" list.

Signed-off-by: Qingqing Zhou <quic_qqzhou@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241122074922.28153-2-quic_qqzhou@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2024-12-09 19:16:57 +00:00
Richard Acayan
87cafa082c dt-bindings: iommu: arm,smmu: add sdm670 adreno iommu compatible 
SDM670 has a separate IOMMU for the GPU, like SDM845. Add the compatible
for it.

Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20241114004713.42404-5-mailingradian@gmail.com
Signed-off-by: Will Deacon <will@kernel.org>
 2024-12-09 19:05:53 +00:00
Joerg Roedel
ae3325f752 Merge branches 'arm/smmu', 'mediatek', 's390', 'ti/omap', 'riscv' and 'core' into next 2024-11-15 09:27:02 +01:00
Qingqing Zhou
515c8ff024 dt-bindings: arm-smmu: document QCS615 APPS SMMU 
Add the compatible for Qualcomm QCS615 APPS SMMU.

Signed-off-by: Qingqing Zhou <quic_qqzhou@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241025030732.29743-3-quic_qqzhou@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2024-10-29 16:08:56 +00:00
Tomasz Jeznach
14d050cd45 dt-bindings: iommu: riscv: Add bindings for RISC-V IOMMU 
Add bindings for the RISC-V IOMMU device drivers.

Co-developed-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Tomasz Jeznach <tjeznach@rivosinc.com>
Acked-by: Palmer Dabbelt <palmer@rivosinc.com>
Link: https://lore.kernel.org/r/6c255602e296feaf0f005b498de4e6fdf8686ff7.1729059707.git.tjeznach@rivosinc.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
 2024-10-29 09:46:22 +01:00
Dmitry Baryshkov
0ddb903fab dt-bindings: iommu: arm,smmu: Add Qualcomm SAR2130P compatible 
Document compatible for ARM-500 SMMU controller on Qualcomm SAR2130P
platform.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241018-sar2130p-iommu-v2-1-64c361fceac8@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2024-10-24 13:38:10 +01:00
Joerg Roedel
97162f6093 Merge branches 'fixes', 'arm/smmu', 'intel/vt-d', 'amd/amd-vi' and 'core' into next 2024-09-13 12:53:05 +02:00
Zhenhua Huang
4638a0474d dt-bindings: arm-smmu: Add compatible for QCS8300 SoC 
Qualcomm QCS8300 SoC includes apps smmu that implements arm,mmu-500, which
is used to translate device-visible virtual addresses to physical
addresses. Add compatible for it.

Signed-off-by: Zhenhua Huang <quic_zhenhuah@quicinc.com>
Signed-off-by: Jingyi Wang <quic_jingyw@quicinc.com>
Link: https://lore.kernel.org/r/20240911-qcs8300_smmu_binding-v2-1-f53dd9c047ba@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2024-09-12 12:52:03 +01:00
Nikunj Kela
757c5ceedc dt-bindings: arm-smmu: document the support on SA8255p 
Add compatible for smmu representing support on SA8255p.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com>
Link: https://lore.kernel.org/r/20240905193656.3785537-1-quic_nkela@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2024-09-06 13:42:53 +01:00
Konrad Dybcio
0710c3d304 dt-bindings: Batch-update Konrad Dybcio's email 
Use my @kernel.org address everywhere.

Signed-off-by: Konrad Dybcio <konradybcio@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240726-topic-konrad_email-v1-3-f94665da2919@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
 2024-07-29 13:35:47 -06:00
Will Deacon
710f1071f1 Merge branch 'iommu/qualcomm/msm' into iommu/next 
* iommu/qualcomm/msm:
  dt-bindings: iommu: Convert msm,iommu-v0 to yaml
  dt-bindings: iommu: qcom,iommu: Add MSM8953 GPU IOMMU to SMMUv2 compatibles
 2024-07-12 16:54:10 +01:00
Will Deacon
cbf9520823 Merge branch 'iommu/arm/smmu' into iommu/next 
* iommu/arm/smmu: (32 commits)
  iommu: Move IOMMU_DIRTY_NO_CLEAR define
  iommu/arm-smmu-qcom: Register the TBU driver in qcom_smmu_impl_init
  iommu/arm-smmu-v3: Enable HTTU for stage1 with io-pgtable mapping
  iommu/arm-smmu-v3: Add support for dirty tracking in domain alloc
  iommu/io-pgtable-arm: Add read_and_clear_dirty() support
  iommu/arm-smmu-v3: Add feature detection for HTTU
  iommu/arm-smmu-v3: Add support for domain_alloc_user fn
  iommu/arm-smmu-qcom: record reason for deferring probe
  iommu/arm-smmu: Pretty-print context fault related regs
  iommu/arm-smmu-qcom-debug: Do not print for handled faults
  iommu/arm-smmu: Add CB prefix to register bitfields
  dt-bindings: arm-smmu: Add X1E80100 GPU SMMU
  iommu/arm-smmu-v3: add missing MODULE_DESCRIPTION() macro
  iommu/arm-smmu-v3: Shrink the strtab l1_desc array
  iommu/arm-smmu-v3: Do not zero the strtab twice
  iommu/arm-smmu-v3: Allow setting a S1 domain to a PASID
  iommu/arm-smmu-v3: Allow a PASID to be set when RID is IDENTITY/BLOCKED
  iommu/arm-smmu-v3: Test the STE S1DSS functionality
  iommu/arm-smmu-v3: Allow IDENTITY/BLOCKED to be set while PASID is used
  iommu/arm-smmu-v3: Put the SVA mmu notifier in the smmu_domain
  ...
 2024-07-12 16:53:45 +01:00
David Heidelberg
b577060ac7 dt-bindings: iommu: Convert msm,iommu-v0 to yaml 
Convert Qualcomm IOMMU v0 implementation to yaml format.

iommus part being ommited for the other bindings, as mdp4 one.

Signed-off-by: David Heidelberg <david@ixit.cz>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240705221520.109540-1-david@ixit.cz
Signed-off-by: Will Deacon <will@kernel.org>
 2024-07-10 13:13:11 +01:00
Akhil P Oommen
d6c102881b dt-bindings: arm-smmu: Add X1E80100 GPU SMMU 
Update the devicetree bindings to support the gpu present in
X1E80100 platform.

Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com>
Link: https://lore.kernel.org/r/20240629015111.264564-5-quic_akhilpo@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2024-07-02 17:48:47 +01:00
Neil Armstrong
7f7f41c33b dt-bindings: iommu: qcom,iommu: Add MSM8953 GPU IOMMU to SMMUv2 compatibles 
Add MSM8953 compatible string with "qcom,msm-iommu-v2" as fallback
for the MSM8953 GPU IOMMU which is compatible with Qualcomm's secure
fw "SMMU v2" implementation.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20240606-topic-sm8953-upstream-smmu-gpu-v2-1-67be88007d87@linaro.org
Signed-off-by: Joerg Roedel <jroedel@suse.de>
 2024-06-25 14:15:11 +02:00
Andre Przywara
2d1d1969a7 dt-bindings: iommu: add new compatible strings 
The Allwinner H616 and A523 contain IOMMU IP very similar to the H6, but
use a different reset value for the bypass register, which makes them
strictly speaking incompatible.

Add a new compatible string for the H616, and a version for the A523,
falling back to the H616.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20240616224056.29159-4-andre.przywara@arm.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
 2024-06-25 14:02:47 +02:00
Bjorn Andersson
e5af06b7cf dt-bindings: arm-smmu: Fix Qualcomm SC8180X binding 
Update the Qualcomm SC8180X SMMU binding to allow describing the Adreno
SMMU, with its three clocks.

Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20240525-sc8180x-adreno-smmu-binding-fix-v1-1-e3c00aa9b9d4@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2024-06-05 16:16:33 +01:00
Joerg Roedel
2bd5059c6c Merge branches 'arm/renesas', 'arm/smmu', 'x86/amd', 'core' and 'x86/vt-d' into next 2024-05-13 14:06:54 +02:00
Thanh Le
209516caff dt-bindings: iommu: renesas,ipmmu-vmsa: add r8a779h0 support 
Document support for the I/O Memory Management Unit (IPMMU) on the
Renesas R-Car V4M (R8A779H0) SoC.

Signed-off-by: Thanh Le <thanh.le.xv@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/13643259be4e8a8e30632de622ad7c685dbb7c61.1713526852.git.geert+renesas@glider.be
Signed-off-by: Joerg Roedel <jroedel@suse.de>
 2024-04-26 12:04:20 +02:00
Georgi Djakov
54a75d8f14 dt-bindings: iommu: Add Qualcomm TBU 
The "apps_smmu" on the Qualcomm sdm845 platform is an implementation
of the SMMU-500, that consists of a single TCU (Translation Control
Unit) and multiple TBUs (Translation Buffer Units). These TBUs have
hardware debugging features that are specific and only present on
Qualcomm hardware. Represent them as independent DT nodes. List all
the resources that are needed to operate them (such as registers,
clocks, power domains and interconnects).

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com>
Link: https://lore.kernel.org/r/20240417133731.2055383-2-quic_c_gdjako@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2024-04-18 15:48:01 +01:00
Neil Armstrong
8a05f74d56 dt-bindings: arm-smmu: Document SM8650 GPU SMMU 
Document the GPU SMMU found on the SM8650 platform.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240216-topic-sm8650-gpu-v3-3-eb1f4b86d8d3@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2024-02-22 18:01:18 +00:00
Neil Armstrong
2777781ca9 dt-bindings: arm-smmu: Fix SM8[45]50 GPU SMMU 'if' condition 
The 'if' condition for the SM8[45]50 GPU SMMU is too large,
add the other compatible strings to the condition to only
allow the clocks for the GPU SMMU nodes.

Fixes: 4fff78dc24 ("dt-bindings: arm-smmu: Document SM8[45]50 GPU SMMU")
Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240216-topic-sm8650-gpu-v3-2-eb1f4b86d8d3@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2024-02-22 18:01:01 +00:00
Konrad Dybcio
0eca305f8e dt-bindings: arm-smmu: Add QCM2290 GPU SMMU 
The GPU SMMU on QCM2290 nicely fits into the description we already have
for SM61[12]5. Add it.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240219-topic-rb1_gpu-v1-1-d260fa854707@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2024-02-22 15:43:47 +00:00
Joerg Roedel
75f74f85a4 Merge branches 'apple/dart', 'arm/rockchip', 'arm/smmu', 'virtio', 'x86/vt-d', 'x86/amd' and 'core' into next 2024-01-03 09:59:32 +01:00
Andy Yan
f8aa519976 dt-bindings: iommu: rockchip: Add Rockchip RK3588 
Add a Rockchip RK3588 compatible

I split it from the vop2 patch series as suggested by Heiko[0]

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

[0]https://patchwork.kernel.org/project/dri-devel/patch/20231207080235.652719-1-andyshrk@163.com/

Link: https://lore.kernel.org/r/20231212005710.1837066-1-andyshrk@163.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
 2023-12-15 09:05:35 +01:00
Konrad Dybcio
4fff78dc24 dt-bindings: arm-smmu: Document SM8[45]50 GPU SMMU 
SM8450 and SM8550 both use a Qualcomm-modified MMU500 for their GPU.
In both cases, it requires a set of clocks to be enabled. Describe that.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231127-topic-a7xx_dt-v2-1-2a437588e563@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-12-12 12:26:20 +00:00
Rajendra Nayak
fa27b35c91 dt-bindings: arm-smmu: Add compatible for X1E80100 SoC 
Add the SoC specific compatible for X1E80100 implementing arm,mmu-500.

Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com>
Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20231124100608.29964-3-quic_sibis@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2023-12-12 12:11:39 +00:00
Neil Armstrong
61683b47df dt-bindings: iommu: arm,smmu: document the SM8650 System MMU 
Document the System MMU on the SM8650 Platform.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231128-topic-sm8650-upstream-bindings-smmu-v2-1-d3fbcaf1ea92@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-12-12 12:09:01 +00:00
Krzysztof Kozlowski
54dae6d5d3 dt-bindings: iommu: arm,smmu: document clocks for the SM8350 GPU SMMU 
Document the clocks for Qualcomm SM8350 Adreno GPU SMMU, already used in
DTS:

  sm8350-hdk.dtb: iommu@3da0000: clock-names: False schema does not allow ['bus', 'iface', 'ahb', 'hlos1_vote_gpu_smmu', 'cx_gmu', 'hub_cx_int', 'hub_aon']

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231112184522.3759-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-12-12 12:05:44 +00:00
Sven Peter
a08bd8df97 dt-bindings: iommu: dart: Add t8103-usb4-dart compatible 
This DART variant is found in the t8103 (M1) SoCs and used for the
USB4/Thunderbolt PCIe ports. Unlike the regular t8103 DART these support
up to 64 SIDs and require a slightly different MMIO layout.

Acked-by: Hector Martin <marcan@marcan.st>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
Link: https://lore.kernel.org/r/20231126151701.16534-2-sven@svenpeter.dev
Signed-off-by: Joerg Roedel <jroedel@suse.de>
 2023-11-27 11:15:10 +01:00
Danila Tikhonov
c53cdc0291 dt-bindings: arm-smmu: Add SM7150 GPU SMMUv2 
SM7150 has a qcom,smmu-v2-style SMMU just for Adreno and friends.
Document it.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230913184526.20016-2-danila@jiaxyga.com
Signed-off-by: Will Deacon <will@kernel.org>
 2023-10-12 13:48:28 +01:00
Konrad Dybcio
938ba2f252 dt-bindings: arm-smmu: Fix SDM630 clocks description 
SDM630 was abusingly referencing one of the internal bus clocks, that
were recently dropped from Linux (because the original implementation
did not make much sense), circumventing the interconnect framework.

Fix it by dropping the bus-mm clock (which requires separating 630 from
similar entries) and keeping the rest as-is.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230721-topic-rpm_clk_cleanup-v2-4-1e506593b1bd@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-09-18 10:17:35 +01:00
Linus Torvalds
0468be89b3 Merge tag 'iommu-updates-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu 
Pull iommu updates from Joerg Roedel:
 "Core changes:

   - Consolidate probe_device path

   - Make the PCI-SAC IOVA allocation trick PCI-only

  AMD IOMMU:

   - Consolidate PPR log handling

   - Interrupt handling improvements

   - Refcount fixes for amd_iommu_v2 driver

  Intel VT-d driver:

   - Enable idxd device DMA with pasid through iommu dma ops

   - Lift RESV_DIRECT check from VT-d driver to core

   - Miscellaneous cleanups and fixes

  ARM-SMMU drivers:

   - Device-tree binding updates:
      - Add additional compatible strings for Qualcomm SoCs
      - Allow ASIDs to be configured in the DT to work around Qualcomm's
        broken hypervisor
      - Fix clocks for Qualcomm's MSM8998 SoC

   - SMMUv2:
      - Support for Qualcomm's legacy firmware implementation featured
        on at least MSM8956 and MSM8976
      - Match compatible strings for Qualcomm SM6350 and SM6375 SoC
        variants

   - SMMUv3:
      - Use 'ida' instead of a bitmap for VMID allocation

   - Rockchip IOMMU:
      - Lift page-table allocation restrictions on newer hardware

   - Mediatek IOMMU:
      - Add MT8188 IOMMU Support

   - Renesas IOMMU:
      - Allow PCIe devices

  .. and the usual set of cleanups an smaller fixes"

* tag 'iommu-updates-v6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (64 commits)
  iommu: Explicitly include correct DT includes
  iommu/amd: Remove unused declarations
  iommu/arm-smmu-qcom: Add SM6375 SMMUv2
  iommu/arm-smmu-qcom: Add SM6350 DPU compatible
  iommu/arm-smmu-qcom: Add SM6375 DPU compatible
  iommu/arm-smmu-qcom: Sort the compatible list alphabetically
  dt-bindings: arm-smmu: Fix MSM8998 clocks description
  iommu/vt-d: Remove unused extern declaration dmar_parse_dev_scope()
  iommu/vt-d: Fix to convert mm pfn to dma pfn
  iommu/vt-d: Fix to flush cache of PASID directory table
  iommu/vt-d: Remove rmrr check in domain attaching device path
  iommu: Prevent RESV_DIRECT devices from blocking domains
  dmaengine/idxd: Re-enable kernel workqueue under DMA API
  iommu/vt-d: Add set_dev_pasid callback for dma domain
  iommu/vt-d: Prepare for set_dev_pasid callback
  iommu/vt-d: Make prq draining code generic
  iommu/vt-d: Remove pasid_mutex
  iommu/vt-d: Add domain_flush_pasid_iotlb()
  iommu: Move global PASID allocation from SVA to core
  iommu: Generalize PASID 0 for normal DMA w/o PASID
  ...
 2023-09-01 16:54:25 -07:00
Krzysztof Kozlowski
440b075bd2 dt-bindings: use capital "OR" for multiple licenses in SPDX 
Documentation/process/license-rules.rst and checkpatch expect the SPDX
identifier syntax for multiple licenses to use capital "OR".  Correct it
to keep consistent format and avoid copy-paste issues.

Correct also the format // -> .* in few Allwinner binding headers as
pointed out by checkpatch:

  WARNING: Improper SPDX comment style for 'include/dt-bindings/reset/sun50i-h6-ccu.h', please use '/*' instead

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20230823084540.112602-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
 2023-08-23 15:00:31 -05:00
Joerg Roedel
d8fe59f110 Merge branches 'apple/dart', 'arm/mediatek', 'arm/renesas', 'arm/rockchip', 'arm/smmu', 'unisoc', 'x86/vt-d', 'x86/amd' and 'core' into next 2023-08-21 14:18:43 +02:00
Konrad Dybcio
b606e2e8ed dt-bindings: arm-smmu: Fix MSM8998 clocks description 
MSM8998 was abusingly referencing one of the internal bus clocks, that
were recently dropped from Linux (because the original implementation
did not make much sense), circumventing the interconnect framework.

Fix it by dropping the bus-mm clock (which requires separating 8998 from
similar entries) and keeping the rest as-is.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230531-topic-8998_mmssclk-v3-6-ba1b1fd9ee75@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-08-11 12:33:26 +01:00
AngeloGioacchino Del Regno
a7a7c8c1a0 dt-bindings: iommu: qcom,iommu: Add QSMMUv2 and MSM8976 compatibles 
Add compatible string "qcom,msm-iommu-v2" for the inner node,
along with "qcom,msm8976-iommu" as a first user of it and
"qcom,msm-iommu-v2-ns" and "qcom,msm-iommu-v2-sec" for the context
bank nodes to support Qualcomm's secure fw "SMMU v2" implementation.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230622092742.74819-6-angelogioacchino.delregno@collabora.com
Signed-off-by: Will Deacon <will@kernel.org>
 2023-08-09 12:43:05 +01:00
AngeloGioacchino Del Regno
e4c2450ae0 dt-bindings: iommu: qcom,iommu: Add qcom,ctx-asid property 
Add a new "qcom,ctx-asid" property to force an ASID number on IOMMU
contexts where required.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230622092742.74819-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Will Deacon <will@kernel.org>
 2023-08-09 12:43:05 +01:00
Chengci.Xu
d5cda142d6 dt-bindings: mediatek: mt8188: Add binding for MM & INFRA IOMMU 
Add descriptions for mt8188 IOMMU which also use ARM Short-Descriptor
translation table format.

In mt8188, there are two smi-common HW and IOMMU, one is for vdo(video
output), the other is for vpp(video processing pipe). They connects
with different smi-larbs, then some setting(larbid_remap) is different.
Differentiate them with the compatible string.

Something like this:

   IOMMU(VDO)          IOMMU(VPP)
      |                   |
 SMI_COMMON_VDO      SMI_COMMON_VPP
 ---------------     ----------------
  |     |    ...      |     |    ...
larb0 larb2  ...    larb1 larb3  ...

We also have an IOMMU that is for infra master like PCIe.
And infra master don't have the larb and ports.

Signed-off-by: Chengci.Xu <chengci.xu@mediatek.com>
Signed-off-by: Yong Wu <yong.wu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230602090227.7264-2-yong.wu@mediatek.com
Signed-off-by: Joerg Roedel <jroedel@suse.de>
 2023-08-07 14:15:45 +02:00
Rohit Agarwal
48989c0b25 dt-bindings: arm-smmu: Add SDX75 SMMU compatible 
Add devicetree binding for Qualcomm SDX75 SMMU.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/1684487350-30476-5-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2023-06-05 16:47:14 +01:00
Konrad Dybcio
44984d56e0 dt-bindings: arm-smmu: Add SM6375 GPU SMMU 
SM6375 has a "Qualcomm SMMU V2" implementation for its GPU SMMU. It
does not however qualify for the qcom,adreno-smmu compatible, as it can
not do split pagetables. It consumes a single clock and a single genpd.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230531-topic-sm6375_gpusmmu-v1-1-860943894c71@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
 2023-06-05 16:40:55 +01:00
Bartosz Golaszewski
387a80a741 dt-bindings: iommu: arm,smmu: enable clocks for sa8775p Adreno SMMU 
The GPU SMMU will require the clocks property to be set so put the
relevant compatible into the adreno if-then block.

Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230417125844.400782-5-brgl@bgdev.pl
[will: Fixed conflict with 'qcom,sc8280xp-smmu-500' entry]
Signed-off-by: Will Deacon <will@kernel.org>
 2023-06-05 16:36:21 +01:00
Bjorn Andersson
84b8a7fe29 dt-bindings: arm-smmu: Fix SC8280XP Adreno binding 
The qcom,sc8280xp-smmu-500 Adreno SMMU binding has clocks, so fix up the
binding to allow this.

Fixes: 38db6b41b2 ("dt-bindings: arm-smmu: Add compatible for Qualcomm SC8280XP")
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230523010441.63236-1-quic_bjorande@quicinc.com
Signed-off-by: Will Deacon <will@kernel.org>
 2023-06-05 16:28:16 +01:00