Bringing in the tegra dma/reset rework as a base for new SoC branches.
* tegra/dma-reset-rework: (81 commits)
spi: tegra: checking for ERR_PTR instead of NULL
ASoC: tegra: update module reset list for Tegra124
clk: tegra: remove bogus PCIE_XCLK
clk: tegra: remove legacy reset APIs
ARM: tegra: remove legacy DMA entries from DT
ARM: tegra: remove legacy clock entries from DT
USB: EHCI: tegra: use reset framework
Input: tegra-kbc - use reset framework
serial: tegra: convert to standard DMA DT bindings
serial: tegra: use reset framework
spi: tegra: convert to standard DMA DT bindings
spi: tegra: use reset framework
staging: nvec: use reset framework
i2c: tegra: use reset framework
ASoC: tegra: convert to standard DMA DT bindings
ASoC: tegra: allocate AHUB FIFO during probe() not startup()
ASoC: tegra: call pm_runtime APIs around register accesses
ASoC: tegra: use reset framework
dma: tegra: register as an OF DMA controller
dma: tegra: use reset framework
...
Signed-off-by: Olof Johansson <olof@lixom.net>
From Stephen Warren:
ARM: tegra: implement common DMA and resets DT bindings
This series converts the Tegra DTs and drivers to use the common/
standard DMA and reset bindings, rather than custom bindings. It also
adds complete documentation for the Tegra clock bindings without
actually changing any binding definitions.
This conversion relies on a few sets of patches in branches from outside
the Tegra tree:
1) A patch to add an DMA channel request API which allows deferred probe
to be implemented.
2) A patch to implement a common part of the of_xlate function for DMA
controllers.
3) Some ASoC patches (which in turn rely on (1) above), which support
deferred probe during DMA channel allocation.
4) The Tegra clock driver changes for 3.14.
Consequently, this branch is based on a merge of all of those external
branches.
In turn, this branch is or will be pulled into a few places that either
rely on features introduced here, or would otherwise conflict with the
patches:
a) Tegra's own for-3.14/powergate and for-4.14/dt branches, to avoid
conflicts.
b) The DRM tree, which introduces new code that relies on the reset
controller framework introduced in this branch, and to avoid
conflicts.
* tag 'tegra-for-3.14-dmas-resets-rework' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (30 commits)
spi: tegra: checking for ERR_PTR instead of NULL
ASoC: tegra: update module reset list for Tegra124
clk: tegra: remove bogus PCIE_XCLK
clk: tegra: remove legacy reset APIs
ARM: tegra: remove legacy DMA entries from DT
ARM: tegra: remove legacy clock entries from DT
USB: EHCI: tegra: use reset framework
Input: tegra-kbc - use reset framework
serial: tegra: convert to standard DMA DT bindings
serial: tegra: use reset framework
spi: tegra: convert to standard DMA DT bindings
spi: tegra: use reset framework
staging: nvec: use reset framework
i2c: tegra: use reset framework
ASoC: tegra: convert to standard DMA DT bindings
ASoC: tegra: allocate AHUB FIFO during probe() not startup()
ASoC: tegra: call pm_runtime APIs around register accesses
ASoC: tegra: use reset framework
dma: tegra: register as an OF DMA controller
dma: tegra: use reset framework
...
Signed-off-by: Olof Johansson <olof@lixom.net>
This reverts commit b652896b02.
Unfortunately this commit prevents multiplatform from booting to
the point where a serial console is available. Revert it while
a solution is sought.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This reverts commit 6dea2c1ebc.
Unfortunately this commit prevents multiplatform from booting to
the point where a serial console is available. Revert it while
a solution is sought.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds DT board setup for the LaCie NAS LaPlug.
Chipset list:
- CPU MARVELL 88FR131 800Mhz
- SDRAM memory: 128MB DDR2-800 400Mhz
- 1 Ethernet Gigabit port (PHY MARVELL 88E1318)
- 1 Mini PCI-Express port
- 1 NAND 512 MB
- 1 push button
- 2 LEDs (red and blue)
- 4 USB Ports
Signed-off-by: Maxime Hadjinlian <maxime.hadjinlian@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This file is mainly a copy of kirkwood-6281.dtsi.
The pinctrl seems to be the same.
These platforms differs only with their CPU, memory capabilities and the
number of GPIO available (36 on 6192, 50 on 6281).
Signed-off-by: Maxime Hadjinlian <maxime.hadjinlian@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
The per-CPU PMSU registers documented in the datasheet start at
0x22100 and the last register for CPU3 is at 0x22428. However, the DT
informations use <0x22100 0x430>, which makes the region end at
0x22530 and not 0x22430.
Moreover, looking at the datasheet, we can see that the registers for
CPU0 start at 0x22100, for CPU1 at 0x22200, for CPU2 at 0x22300 and
for CPU3 at 0x22400. It seems clear that 0x100 bytes of registers have
been used per CPU.
Therefore, this commit reduces the length of the PMSU per-CPU register
area from the incorrect 0x430 bytes to a more logical 0x400 bytes.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Now that the DTS file r8a7790-koelsch.dts can be used with
board-koelsch.c and board-koelsch-reference.c, proceed with removing
r8a7790-koelsch-reference.dts.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
From Kukjin Kim:
Samsung non-critical 2nd fixes for v3.14
- Correct HSMMC1 card detection type for s3c6410-mini6410
- Fix different key mapping backslash and search key for exynos5250-snow
- Fix definitions of div_mmc_pre4 divider for CLK_SET_RATE_PARENT
- Fix clock provider for mshc on exynos4412
- Fix definitions of mshc dt nodes for exynos4x12
- use mshc controller for eMMC for exynos4412-trats2
* tag 'samsung-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Use MSHC controller for eMMC memory for exynos4412-trats2
ARM: dts: Fix definition of MSHC device tree nodes for exynos4x12
ARM: dts: add clock provider for mshc node for Exynos4412 SOC
clk: samsung: exynos4: Fix definition of div_mmc_pre4 divider
ARM: dts: Fix exynos5250-snow's search key to be L_META
ARM: dts: Add the missing "\" key in non-US keyboards for exynos5250-snow
ARM: S3C64XX: Correct card detect type for HSMMC1 for MINI6410
Signed-off-by: Olof Johansson <olof@lixom.net>
From Kukjin Kim:
Samsung DT 2nd updates for v3.14
- add DMA controller, SPI, and TMU DT nodes for exynos5420
- add PWM DT nodes for exynos5250 and exynos5420
- drop interrupt controller properties from MCT nodes
because MCT is not an interrupt controller
- move MCT nodes to exynos4x12 from board because it is
a per-processor interrupt and same 4212 and 4412
- use one cell for MCT interrupt map for exynos4 SoCs
- update Exynos MCT DT bindings accordingly
- fix missing spaces after labels for exynos
- fix mmc status property for exynos5250-snow
- add MCLK for codec for exynos5250-smdk5250
- disable SPI and I2C by default for exynos5250 SoC
and enable into requiring some boards
- rename cros5250-common to exynos5250-cros-common
* tag 'samsung-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (27 commits)
ARM: dts: Rename Exynos5250 ChromeOS common file to have exynos prefix
ARM: dts: Disable I2C controllers by default on Exynos5250
ARM: dts: Leave Exynos5250 SPI controller disabled by default
ARM: dts: Add CODEC MCLK for SMDK5250
ARM: dts: Add device nodes for TMU blocks for exynos5420
ARM: dts: Fix status property of mmc nodes for snow board
ARM: dts: Fix missing spaces after labels for exynos
ARM: dts: Simplify MCT interrupt map for exynos4 SoCs
ARM: dts: Move MCT node to exynos4x12.dtsi
ARM: dts: Drop interrupt controller properties from MCT nodes for exynos4 SoCs
Documentation: devicetree: Update Exynos MCT bindings description
ARM: dts: add pwm DT nodes to Exynos5250 and Exynos5420
ARM: dts: Add SPI nodes to the exynos5420 device tree file
ARM: dts: Add DMA controller node info on Exynos5420
ARM: dts: Use MSHC controller for eMMC memory for exynos4412-trats2
ARM: dts: Fix definition of MSHC device tree nodes for exynos4x12
ARM: dts: add clock provider for mshc node for Exynos4412 SOC
clk: samsung: exynos4: Fix definition of div_mmc_pre4 divider
ARM: dts: Fix exynos5250-snow's search key to be L_META
ARM: dts: Add the missing "\" key in non-US keyboards for exynos5250-snow
...
Signed-off-by: Olof Johansson <olof@lixom.net>
The frequency property in "snps,dw-apb-uart" entries are no longer
required if the rate of the external clock can be determined using the
clk api (see e302cd9 serial: 8250_dw: add support for clk api).
This patch replaces the frequency property in the UART nodes of
bcm11351.dtsi with references to the relevant clocks following the
common clock binding.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
Declare clocks that are enabled and configured by bootloaders as fixed
rate clocks in the DTS such that device drivers may use standard clock
function calls.
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-by: Markus Mayer <markus.mayer@linaro.org>
Reviewed-by: Matt Porter <matt.porter@linaro.org>
Signed-off-by: Christian Daudt <bcm@fixthebug.org>
From Nicolas Ferre:
Second DT pull-request for 3.14
- now that PWM driver is on its way to mainline,
we can integrate the DT entries
- As an example, use PWM for at91sam9m10g45ek leds
- Addition of clock specification for newly introduced
crypto DT entries
* tag 'at91-dt2' of git://github.com/at91linux/linux-at91:
ARM: at91/dt: add clk properties to sama5d3 TDES device node
ARM: at91/dt: add clk properties to sama5d3 AES device node
ARM: at91/dt: add clk properties to sama5d3 SHA device node
ARM: at91: at91sam9m10g45ek: switch to PWM leds
ARM: at91: add PWM device node
Signed-off-by: Olof Johansson <olof@lixom.net>
From Kukjin Kim:
Samsung DT updates for v3.14
- Add support Octa Cores for exynos5420
: populate CPU node entries to 8 Cores
: extend mct to support 8 local interrupts
- Update dwmmc nodes for exynos5250 and exynos5420
: change status property of dwmmc nodes for exynos5250
: move dwmmc nodes from exynos5 to exynos5250 because
it's different between exynos5250 and exynos5420
: rename mmc nodes from dwmmc for exynos5 SoCs
: add dwmmc nodes for exynos5420
- Add G-Scaler nodes for exynos5420
- Add HS-i2c nodes in exynos5420
: High Speed I2C 7 channels (4 to 10)
- Update sysreg binding and node name in exynos4
- Update min voltage on exynos5250-arndale
- Move fifo-depth property from boards to exynos5250 SoC
: because the fifo-depth property is SoC specific
* tag 'samsung-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Update Samsung sysreg binding document
ARM: dts: Fix sysreg node name in exynos4.dtsi
ARM: dts: Add hs-i2c nodes to exynos5420
ARM: dts: Update min voltage for vdd_arm on Arndale
ARM: dts: populate cpu node entries to 8 cpus for exynos5420
clocksource: mct: extend mct to support 8 local interrupts for Exynos5420
ARM: dts: Add device nodes for GScaler blocks for exynos5420
ARM: dts: Add dwmmc DT nodes for exynos5420 SOC
ARM: dts: rename mmc dts node for exynos5 series
ARM: dts: Move fifo-depth property from exynos5250 board dts
ARM: dts: change status property of dwmmc nodes for exynos5250
ARM: dts: Move dwmmc nodes from exynos5.dtsi to exynos5250.dtsi
Signed-off-by: Olof Johansson <olof@lixom.net>
From Kukjin Kim:
Samsung non-critical fixes for v3.14
- Switch FIFO mode for arch_enable_uart_fifo()
- Add missing op_mode for PMIC on exynos5250-arndale
- Add missing clock-frequency for CPU on exynos5250
- Fix typo samaung to samsung for exynos5420-pinctrl
- Fix display clock-frequency for exynos4210/exynos4412-origen
* tag 'samsung-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Update display clock frequency for Origen-4412
ARM: dts: Update display clock frequency for Origen-4210
ARM: dts: Fix a typo in exynos5420-pinctrl.dtsi
ARM: dts: Add missing frequency property to exynos5250
ARM: dts: Add missing op_mode property to PMIC on Arndale
ARM: SAMSUNG: Fix switching FIFO in arch_enable_uart_fifo function
Signed-off-by: Olof Johansson <olof@lixom.net>
Add a generic (dtsi) include file for MOXA ART SoCs.
Also add a file for UC-7112-LX.
Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
We recently sorted the nodes in dove, orion5x, kirkwood, and armada
370/xp. However, I missed this file. -6281 is fine.
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Add nodes for the two SATA PHYs on kirkwood.
Add node for the one SATA PHY on Dove.
Add pHandles to the PHYs in the sata nodes.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Make it easier to notice the common file for ChromeOS devices based on
the Exynos5250 by giving it the exynos5250 prefix that the boards have.
Signed-off-by: Mark Brown <broonie@linaro.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Ensure that unused I2C controllers are not activated, causing problems due
to inappropriate pinmuxing or similar, by marking the controllers as
disabled by default and requiring boards to explicitly enable those that
are in use.
Signed-off-by: Mark Brown <broonie@linaro.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Rather than requiring each board to explicitly disable the SPI controllers
it is not using instead require boards to enable those that they are using.
This is less work overall since normally at most one of the controllers is
in use and avoids issues caused by inappropriate pinmuxing.
Signed-off-by: Mark Brown <broonie@linaro.org>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
There is a 16.934MHz fixed rate clock connected to MCLK1 on the CODEC, add
this to the device tree bindings.
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Exynos5420 SoC has per core thermal management unit.
5 TMU channels 4 for CPUs and 5th for GPU.
This patch adds the device tree nodes to the DT device list.
Nodes carry the misplaced second base address and the second
clock to access the misplaced base address.
Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Commit e908d5c5 ("ARM: dts: change status property of dwmmc nodes
for exynos5250") missed out handling the exynos5250 snow dts file.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
There is no need to use two cells for interrupt specifiers inside the
MCT interrupt map, so this patch simplifies the map to use one cell.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
For MCT block compatible with "samsung,exynos4412-mct", that uses PPI
interrupts for local timers, only one local interrupt needs to be
specified, since it is a per-processor interrupt.
This allows moving MCT node of Exynos4x12 SoCs back to common
exynos4x12.dtsi, since they have the same set of interrupts to be
specified, which was the only difference.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
MCT is not an interrupt controller and so there is no point for device
tree nodes representing it to contain interrupt-controller
and #interrupt-cells properties.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch adds dma controller node info on Exynos5420.
Exynos5420 has adma for audio IPs. As adma clk is dependent
on audss clk provider that will be added later.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This patch removes device tree node of SDHCI0 controller and replaces
it with MSHC to enable support MMC 4.4 and improve performance of eMMC
memory.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
All SoCs from Exynos4x12 series contain the MSHC block, so its node can
be located in exynos4x12.dtsi. In addition, missing clock specifiers
are added, generic SoC attributes are moved from board dts files
to common dtsi file of SoC family and the node is renamed to a more
generic name to follow node naming recommendations.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Clock lookup information is required as driver can manipulate
clock rate properly.
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
The device tree sent upstream for exynos5250-snow encoded the search
key as CAPSLK. However in all ChromeOS kernels it is L_META. One can
certainly have long debates about which it ought to be, but I'm
proposing setting it to L_META because:
* That's how _all_ ChromeOS kernels do it and will do it.
* There is no L_META key on the board, so it's nice to have.
* For those people who really want it to be caps lock, they can use
xmodmap or somesuch.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
