B2120 HDK is the reference board for STiH407 SoC.
It has the following characteristics:
- 1GB DDR3
- 8GB eMMC / SD-Card slot
- 32MB NOR Flash
- 1 x Gbit Ethernet
- 1 x USB 3.0 port
- 1 x Mini-PCIe
- 1 x SATA
- 1 x HDMI output
- 1 x HDMI input
- 1 x SPDIF
This patch only introduces basic functionnalities, such as I2C and UART.
Acked-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The compatible strings have to be ordered from specific to generic.
This patch fixes this for STi boards, which did the exact opposite.
Cc: Olof Johansson <olof@lixom.net>
Acked-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Pull staging driver fixes from Greg KH:
"Here are five staging driver fixes for 3.15-rc6 that resolve some
reported issues. They are for the imx and rtl8723au drivers"
* tag 'staging-3.15-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging:
staging: rtl8723au: Do not reset wdev->iftype in netdev_close()
staging: rtl8723au: Use correct pipe type for USB interrupts
imx-drm: imx-tve: correct DDC property name to 'ddc-i2c-bus'
imx-drm: imx-drm-core: skip components whose parent device is disabled
imx-drm: imx-drm-core: fix imx_drm_encoder_get_mux_id
Provide information through SOC_BUS to user space.
Silicon revision is provided through devcfg device.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Merge "Renesas ARM Based SoC soc-cleanup Updates for v3.16" from Simon Horman:
r8a7791 (R-Car H2) SoC and its Koelsch board and,
r8a7740 (R-Mobile A1) SoC and its Armadillo800eva board
* Set CPU clock frequency from OF nodes
* tag 'renesas-soc-cleanup-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Set clock frequency in HZ from OF nodes
ARM: shmobile: Use shmobile_init_late() on r8a7740
ARM: shmobile: Remove unused r8a7791_init_early()
ARM: shmobile: Use r8a7791 DT CPU Frequency for Koelsch
ARM: shmobile: Use r8a7791 DT CPU Frequency in common case
ARM: shmobile: Remove unused r8a7740_init_delay()
ARM: shmobile: Use r8a7740 DT CPU Frequency for Armadillo DT Ref
ARM: shmobile: Use r8a7740 DT CPU Frequency in common case
ARM: shmobile: Add r8a7740 Maximum CPU Frequency to DTS
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "at91: DT for 3.16 #2" from Nicolas Ferre:
3.16: second DT series:
- at91sam9rl and at91sam9261 fixes about PLL ranges
- at91sam9261 more comprehensive support for SSC
- sama5d3 Xplained: addition of pull-ups, PWM and PMIC (regulator)
* tag 'at91-dt2' of git://github.com/at91linux/linux-at91:
ARM: at91/dt: at91-sama5d3_xplained: add the regulator device node
ARM: at91: add 2 PWM outputs to SAMA5D3 Xplained
ARM: at91: add PWM pinctrl to SAMA5D3
ARM: at91: add pull-up to i2c[02] on SAMA5D3 Xplained
ARM: at91/dt: sam9rl: Fix PLL output range and mck divisors
ARM: at91/dt: sam9261: Add ssc2, SSC clocks and pcks
ARM: at91/dt: sam9261: Fix PLL output ranges and other clocks divisors
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "ARM: Keystone DTS updates for 3.16" from Santosh Shilimkar:
Keystone DTS updates for 3.16
- Few of address cell warning fixes.
- Add Lamarr and Edision EVM NOR flash and NAND devices.
- Update dts to make use of dma-ranges and dma-coherent properties.
* tag 'keystone-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: dts: keystone-evm: add spi nor flash support
ARM: dts: k2l-evm: add AEMIF/NAND device entry
ARM: dts: k2e-evm: add AEMIF/NAND device entry
ARM: dts: keystone: Update USB node for dma properties
ARM: dts: keystone: Use dma-ranges property
ARM: dts: keystone: add cell's information to spi nodes
ARM: dts: keystone: move i2c0 device node from SoC to board files
ARM: dts: keystone: add cell's information to i2c nodes
ARM: dts: keystone: drop address and size cells from GIC node
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "ARM: rockchip: devicetree changes for v3.16" from Heiko Stübner:
Addition of missing board compatible names and their vendor-prefixes
as well as the dts portions of the pinctrl rework.
* tag 'v3.16-rockchip-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: convert pinctrl nodes to new bindings
ARM: dts: rockchip: add root compatible properties
of: add mundoreader and radxa vendor prefixes
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "ARM: mvebu: SoC orion5x DT conversion for v3.16" from Jason Cooper:
mvebu SoC orion5x DT conversion for v3.16
- orion5x
- convert to DT
* tag 'mvebu-soc-orion5x-3.16' of git://git.infradead.org/linux-mvebu: (29 commits)
ARM: orion: remove no longer needed gpio DT code
ARM: orion: remove no longer needed DT IRQ code
ARM: orion5x: convert Maxtor Shared Storage II to the Device Tree
ARM: orion5x: convert d2net to Device Tree
ARM: orion5x: convert RD-88F5182 to Device Tree
ARM: orion5x: remove unneeded code for edmini_v2
ARM: orion5x: keep TODO list in edmini_v2 DT
ARM: orion5x: use DT to describe NOR on edmini_v2
ARM: orion5x: use DT to describe EHCI on edmini_v2
ARM: orion5x: use DT to describe I2C devices on edmini_v2
ARM: orion5x: convert edmini_v2 to DT pinctrl
ARM: orion5x: add standard pinctrl configs for sata0 and sata1
ARM: orion5x: add Device Bus description at SoC level
ARM: orion5x: update I2C description at SoC level
ARM: orion5x: enable pinctrl driver at SoC level
ARM: orion5x: switch to DT interrupts and timer
ARM: orion: switch to a per-platform handle_irq() function
ARM: orion5x: convert to use 'clocks' property for UART controllers
ARM: orion5x: switch to use the clock driver for DT platforms
ARM: orion5x: add interrupt for Ethernet in Device Tree
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "ARM: mvebu: DT changes for v3.16" from Jason Cooper:
mvebu DT changes for v3.16
- kirkwood
- rework nsa3x0 board to add nsa320
- large cleanup to facilitate use in barebox
- guruplug phy updates
- audio updates for t5325
- mvebu
- use clocks vice clock-frequency for uart nodes
- armada 375/380/385
- add watchdog node
- add coherency fabric
- add smp support
- add sdhci
- add ahci
- add thermal sensor
- armada 370/XP
- and pmsu
* tag 'mvebu-dt-3.16' of git://git.infradead.org/linux-mvebu: (35 commits)
ARM: Kirkwood: t5325: Use simple card to instantiate audio
ARM: Kirkwood: DT: Add missing #sound-dai-cells property
ARM: Kirkwood: Add node for audio codec
ARM: dts: kirkwood: set Guruplug phy-connection-type to rgmii-id
ARM: dts: kirkwood: set Guruplug ethernet PHY compatible
ARM: dts: kirkwood: set default pinctrl for I2C1 on 6282
ARM: dts: kirkwood: set default pinctrl for I2C0
ARM: dts: kirkwood: set default pinctrl for NAND
ARM: dts: kirkwood: set default pinctrl for SPI0
ARM: dts: kirkwood: set default pinctrl for UART0/1
ARM: dts: kirkwood: set default pinctrl for GBE1
ARM: dts: kirkwood: consolidate common pinctrl settings
ARM: dts: kirkwood: add pinctrl node to common SoC include
ARM: dts: kirkwood: rename pin-controller nodes
ARM: dts: kirkwood: remove clock-frequency properties from UART nodes
ARM: dts: kirkwood: add stdout-path property to all boards
ARM: dts: kirkwood: add node labels
ARM: mvebu: Enable the thermal sensor in Armada 380/385 SoC
ARM: mvebu: Enable the thermal sensor in Armada 375 SoC
ARM: mvebu: don't use clocks property in UART node for Netgear RN2120
...
Signed-off-by: Olof Johansson <olof@lixom.net>
Since commit 7adb0933b1 (ARM: dts: omap4: Set all audio related
IP's status to disabled as default) all audio related device are
disabled by default. Most boards were updated to enable devices
explicitly, but DuoVero was missed.
mcpdm is used for twl6040 and mcbsp1 is used for BlueTooth audio.
Cc: florian.vaussard@epfl.ch
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
MTD NAND partition for file-system should start at offset=0xA00000
Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
DRA7xx platform has in-build GPMC and ELM h/w engines which can be used
for accessing externel NAND flash device. This patch:
- adds generic DT binding in dra7.dtsi for enabling GPMC and ELM h/w engines
- adds DT binding for Micron NAND Flash (MT29F2G16AADWP) present on dra7-evm
*Important*
On DRA7 EVM, GPMC_WPN and NAND_BOOTn are controlled by DIP switch
So following board settings are required for NAND device detection:
SW5.9 (GPMC_WPN) = LOW
SW5.1 (NAND_BOOTn) = HIGH
Signed-off-by: Minal Shah <minalkshah@gmail.com>
Signed-off-by: Pekon Gupta <pekon@ti.com>
Reviewed-by: Javier Martinez Canillas <javier@dowhile0.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add CPSW ethernet support for AM437x GP EVM which has one slave pinned out
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add cpsw phy sel device tree node for selecting phy mode in control module
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Both the VAR-STK-OM44 and VAR-DVK-OM44 boards comes with the
WLAN/BT version of the system on module VAR-SOM-OM44.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The OMAP4/5 TRMs primarily list address offsets from the padconf
physical address (which is not driver base address) and not
always the absolute physical address for padconf registers like
some other OMAP TRMs. So create a new macro to use this offset
and to avoid confusion between different OMAP parts.
For more information, see the tables in TRM for named something like
"Device Core Control Module Pad Configuration Register Fields"
and "Device Wake-Up Control Module Pad Configuration Register Fields"
Note that we now also have to update cm-t54 for the fixed up
offsets.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
[tony@atomide.com: updated comments, updated cm-t54]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable the SD Card reader and the internal eMMC on the Berlin BG2Q DMP
using two of the SDHCI nodes of the Berlin BG2Q.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Add pinctrl bindings and system control nodes to what we currently know
about Berlin SoCs. Where available, also set default pinctrl property
for uarts, when there is only one pinmux option for it.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This converts Berlin BG2 SoC dtsi to make use of the new DT clock
nodes for Berlin SoCs. While at it, also fix up twdclk which is
running at cpuclk/3 instead of sysclk.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
This converts Berlin BG2CD SoC dtsi to make use of the new DT clock
nodes for Berlin SoCs. Also add a binding include to ease core clock
references.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
The Berlin BG2 has 32 GPIOs in SoC power domain and 16 in the SM one.
Only the first 8 SM GPIOs have interrupt support.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Adds initial support for the Marvell BG2-Q DMP. The board has 2GB of
memory, an uart activated and what's initially supported by the Marvell
Armada 1500 pro dtsi.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Adds initial support for the Marvell Armada 1500 pro (BG2Q) SoC (Berlin family).
The SoC has nodes for cpu, l2 cache controller, interrupt controllers, local
timer, apb timers and uarts for now. Also add corresponding binding documentation.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
LDO4 regulator was getting disabled preventing the system from
going into low power states. Keep it always on to fix it.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
