Commit Graph

113914 Commits

Author SHA1 Message Date
Andrey Smetanin
e7d9513b60 kvm/x86: added hyper-v crash msrs into kvm hyperv context
Added kvm Hyper-V context hv crash variables as storage
of Hyper-V crash msrs.

Signed-off-by: Andrey Smetanin <asmetanin@virtuozzo.com>
Signed-off-by: Denis V. Lunev <den@openvz.org>
Reviewed-by: Peter Hornyack <peterhornyack@google.com>
CC: Paolo Bonzini <pbonzini@redhat.com>
CC: Gleb Natapov <gleb@kernel.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-23 08:27:06 +02:00
Andrey Smetanin
e83d58874b kvm/x86: move Hyper-V MSR's/hypercall code into hyperv.c file
This patch introduce Hyper-V related source code file - hyperv.c and
per vm and per vcpu hyperv context structures.
All Hyper-V MSR's and hypercall code moved into hyperv.c.
All Hyper-V kvm/vcpu fields moved into appropriate hyperv context
structures. Copyrights and authors information copied from x86.c
to hyperv.c.

Signed-off-by: Andrey Smetanin <asmetanin@virtuozzo.com>
Signed-off-by: Denis V. Lunev <den@openvz.org>
Reviewed-by: Peter Hornyack <peterhornyack@google.com>
CC: Paolo Bonzini <pbonzini@redhat.com>
CC: Gleb Natapov <gleb@kernel.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-23 08:27:06 +02:00
Thomas Huth
9ef03193a9 powerpc/rtas: Replace magic values with defines
rtas.h already has some nice #defines for RTAS return status
codes - let's use them instead of hard-coded "magic" values!

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Tyrel Datwyler <tyreld@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2015-07-23 16:27:05 +10:00
Eugene Korenevsky
f9eb4af67c KVM: nVMX: VMX instructions: add checks for #GP/#SS exceptions
According to Intel SDM several checks must be applied for memory operands
of VMX instructions.

Long mode: #GP(0) or #SS(0) depending on the segment must be thrown
if the memory address is in a non-canonical form.

Protected mode, checks in chronological order:
- The segment type must be checked with access type (read or write) taken
into account.
	For write access: #GP(0) must be generated if the destination operand
		is located in a read-only data segment or any code segment.
	For read access: #GP(0) must be generated if if the source operand is
		located in an execute-only code segment.
- Usability of the segment must be checked. #GP(0) or #SS(0) depending on the
	segment must be thrown if the segment is unusable.
- Limit check. #GP(0) or #SS(0) depending on the segment must be
	thrown if the memory operand effective address is outside the segment
	limit.

Signed-off-by: Eugene Korenevsky <ekorenevsky@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-23 08:26:39 +02:00
Paolo Bonzini
0da029ed7e KVM: x86: rename quirk constants to KVM_X86_QUIRK_*
Make them clearly architecture-dependent; the capability is valid for
all architectures, but the argument is not.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-23 08:24:42 +02:00
Xiao Guangrong
fb279950ba KVM: vmx: obey KVM_QUIRK_CD_NW_CLEARED
OVMF depends on WB to boot fast, because it only clears caches after
it has set up MTRRs---which is too late.

Let's do writeback if CR0.CD is set to make it happy, similar to what
SVM is already doing.

Signed-off-by: Xiao Guangrong <guangrong.xiao@intel.com>
Tested-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-23 08:23:01 +02:00
Paolo Bonzini
41dbc6bcd9 KVM: x86: introduce kvm_check_has_quirk
The logic of the disabled_quirks field usually results in a double
negation.  Wrap it in a simple function that checks the bit and
negates it.

Based on a patch from Xiao Guangrong.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-23 08:22:45 +02:00
Xiao Guangrong
3e5d2fdced KVM: MTRR: simplify kvm_mtrr_get_guest_memory_type
kvm_mtrr_get_guest_memory_type never returns -1 which is implied
in the current code since if @type = -1 (means no MTRR contains the
range), iter.partial_map must be true

Simplify the code to indicate this fact

Signed-off-by: Xiao Guangrong <guangrong.xiao@intel.com>
Tested-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-23 08:21:48 +02:00
Xiao Guangrong
10dc331ff5 KVM: MTRR: fix memory type handling if MTRR is completely disabled
Currently code uses default memory type if MTRR is fully disabled,
fix it by using UC instead.

Signed-off-by: Xiao Guangrong <guangrong.xiao@intel.com>
Tested-by: Alex Williamson <alex.williamson@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-07-23 08:21:33 +02:00
Maxime Coquelin
2303553f3f ARM: dts: Use stdout-path in STM32F429 Discovery board
This patch replaces use of linux,stdout-path by stdout-path as per
"chosen" DT bindings documentation.

Doing that, the "console" argument is no more needed in kernel command
line.

Reported-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
2015-07-23 07:07:12 +02:00
Maxime Coquelin
83722c2c7e ARM: dts: Add STM32429i-EVAL board support
Main features of STM32429i-EVAL evaluation kit are:
 - STM32F429 Cortex-M4 MCU @180MHz
   * 2MB internal Flash
   * 256KB internal RAM
 - 32MB SDRAM
 - 16MB NOR Flash
 - 2MB SRAM
 - 4.3" TFT LCD with resistive touchscreen
 - SDCard connector (SDIO compatible)
 - 1x USB 2.0 OTG + 1x USB 1.1 OTG
 - Ethernet

Signed-off-by: Maxime Coquelin <mcoquelin.stm32@gmail.com>
2015-07-23 06:59:50 +02:00
Olof Johansson
f1d28f0b39 Merge tag 'omap-for-v4.3/defconfig-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/defconfig
Merge "defconfig changes for v4.3" from Tony Lindgren:

Few defconfig changes for omap2plus_defconfig to enable
SPI NOR, CPTS, touchscreen and ADC used on am335x, am437x
and ra7 devices.

* tag 'omap-for-v4.3/defconfig-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: omap2plus_defconfig: enable support for M25P80 SPI NOR
  ARM: omap2plus_defconfig: enable support for TI CPTS
  ARM: omap2plus_defconfig: enable support for TI touchscreen
  ARM: omap2plus_defconfig: enable support for TI ADC

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-22 16:28:37 -07:00
Olof Johansson
9521f492f0 Merge tag 'omap-for-v4.3/legacy-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
Merge "drop few more legacy boards for v4.3" from Tony Lindgren:

Drop more omap3 legacy board-*.c files for v4.3. This time we're
dropping the board files for omap3logic and omap3pandora.

The reason for dropping these now rather than later is that now
we can simply revert the patches in case of unexpected issues as
we are not dropping any platform data at this point.

This leaves us with only the following board-*.c files:

BOARD                   REASON NEEDED
board-ldp.c             Still used in RMKs boot test system
board-rx51-*.c          Needs /proc/atags support for user space

Once we have the n900 legacy user space issues sorted out for
/proc/atags and system_rev, we can drop the remaining two
board-*.c files. And then one merge window after that we can
drop the legacy booting support assuming no unexpected issues
are found.

* tag 'omap-for-v4.3/legacy-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Remove legacy booting support for Pandora
  ARM: OMAP2+: Remove legacy booting support for LogicPD Torpedo

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-22 16:26:03 -07:00
Olof Johansson
9e3cffd877 Merge tag 'omap-for-v4.3/dt-pt2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "omap dts changes for v4.3, part2" from Tony Lindgren:

More omap dts changes for v4.3 merge window:

- Add missing devices for pandora. Note that we're adding wl1251
  WLAN and LCD backlight support for now using legacy pdata as that
  allows us to drop the legacy board file for pandora in another
  series of patches

- Enable power button support for omap5-uevm

- Add aliases for am437x UARTs

- Add support for phyCORE phyBOARD-WEGA-AM335x rdk and
  phyCORE-AM335x SoM

- Use u16 values for tsc2046 on omap3-lilly

* tag 'omap-for-v4.3/dt-pt2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: omap3-pandora: add wifi support
  ARM: OMAP2+: omap3-pandora: add backlight support
  ARM: dts: omap3-pandora: add support for usb host and 32k buffer
  ARM: dts: omap3-pandora: miscellaneous corrections
  ARM: dts: omap5-uevm: Add Palmas power button support
  ARM: dts: am437x: add aliases for all UART instances
  ARM: dts: Add phyBOARD-WEGA-AM335x rdk
  ARM: dts: Add support for phyCORE-AM335x SoM
  ARM: dts: omap3: correct the format of u16 values for tsc2046 node

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-07-22 16:25:04 -07:00
Paul E. McKenney
f78f5b90c4 rcu: Rename rcu_lockdep_assert() to RCU_LOCKDEP_WARN()
This commit renames rcu_lockdep_assert() to RCU_LOCKDEP_WARN() for
consistency with the WARN() series of macros.  This also requires
inverting the sense of the conditional, which this commit also does.

Reported-by: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Reviewed-by: Ingo Molnar <mingo@kernel.org>
2015-07-22 15:27:32 -07:00
Linus Torvalds
c5dfd654d0 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Pull networking fixes from David Miller:

 1) Don't use shared bluetooth antenna in iwlwifi driver for management
    frames, from Emmanuel Grumbach.

 2) Fix device ID check in ath9k driver, from Felix Fietkau.

 3) Off by one in xen-netback BUG checks, from Dan Carpenter.

 4) Fix IFLA_VF_PORT netlink attribute validation, from Daniel Borkmann.

 5) Fix races in setting peeked bit flag in SKBs during datagram
    receive.  If it's shared we have to clone it otherwise the value can
    easily be corrupted.  Fix from Herbert Xu.

 6) Revert fec clock handling change, causes regressions.  From Fabio
    Estevam.

 7) Fix use after free in fq_codel and sfq packet schedulers, from WANG
    Cong.

 8) ipvlan bug fixes (memory leaks, missing rcu_dereference_bh, etc.)
    from WANG Cong and Konstantin Khlebnikov.

 9) Memory leak in act_bpf packet action, from Alexei Starovoitov.

10) ARM bpf JIT bug fixes from Nicolas Schichan.

11) Fix backwards compat of ANY_LAYOUT in virtio_net driver, from
    Michael S Tsirkin.

12) Destruction of bond with different ARP header types not handled
    correctly, fix from Nikolay Aleksandrov.

13) Revert GRO receive support in ipv6 SIT tunnel driver, causes
    regressions because the GRO packets created cannot be processed
    properly on the GSO side if we forward the frame.  From Herbert Xu.

14) TCCR update race and other fixes to ravb driver from Sergei
    Shtylyov.

15) Fix SKB leaks in caif_queue_rcv_skb(), from Eric Dumazet.

16) Fix panics on packet scheduler filter replace, from Daniel Borkmann.

17) Make sure AF_PACKET sees properly IP headers in defragmented frames
    (via PACKET_FANOUT_FLAG_DEFRAG option), from Edward Hyunkoo Jee.

18) AF_NETLINK cannot hold mutex in RCU callback, fix from Florian
    Westphal.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (84 commits)
  ravb: fix ring memory allocation
  net: phy: dp83867: Fix warning check for setting the internal delay
  openvswitch: allocate nr_node_ids flow_stats instead of num_possible_nodes
  netlink: don't hold mutex in rcu callback when releasing mmapd ring
  ARM: net: fix vlan access instructions in ARM JIT.
  ARM: net: handle negative offsets in BPF JIT.
  ARM: net: fix condition for load_order > 0 when translating load instructions.
  tcp: suppress a division by zero warning
  drivers: net: cpsw: remove tx event processing in rx napi poll
  inet: frags: fix defragmented packet's IP header for af_packet
  net: mvneta: fix refilling for Rx DMA buffers
  stmmac: fix setting of driver data in stmmac_dvr_probe
  sched: cls_flow: fix panic on filter replace
  sched: cls_flower: fix panic on filter replace
  sched: cls_bpf: fix panic on filter replace
  net/mdio: fix mdio_bus_match for c45 PHY
  net: ratelimit warnings about dst entry refcount underflow or overflow
  caif: fix leaks and race in caif_queue_rcv_skb()
  qmi_wwan: add the second QMI/network interface for Sierra Wireless MC7305/MC7355
  ravb: fix race updating TCCR
  ...
2015-07-22 14:45:25 -07:00
Matthew Gerlach
7db85dd082 ARM: socfpga: dts: add missing clock gates to socfpga.dtsi
The gates for the clocks coming out of the sdram pll
were missing.  The change adds the missing nodes to
the device tree.

Signed-off-by: Matthew Gerlach <mgerlach@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-07-22 15:17:20 -05:00
Dinh Nguyen
e9f9fe35f8 ARM: socfpga: dts: Fix gpio dts entry for the correct clock
The correct clock for the HPS gpio(s) should be the l4_mp_clk.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-07-22 13:17:12 -05:00
Dinh Nguyen
c5dab6e2c1 ARM: socfpga: dts: Correct the parent clock for l3_sp_clk and dbg_clk
The l3_sp_clk's parent should be the l3_mp_clk. This will account for
the extra divider that is present for the l3_mp_clk.

The dbg_clk's parent should be the dbg_at_clk. This will account for
the extra divider that is present for the dbg_at_clk.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-07-22 13:16:51 -05:00
Jiang Liu
3bf15f53c9 sparc/PCI: Use helper functions to access fields in struct msi_desc
Use helper functions to access fields in struct msi_desc, so we could
easily refine struct msi_desc later.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Acked-by: David S. Miller <davem@davemloft.net>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Stuart Yoder <stuart.yoder@freescale.com>
Cc: Yijing Wang <wangyijing@huawei.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Eric Snowberg <eric.snowberg@oracle.com>
Link: http://lkml.kernel.org/r/1436428847-8886-8-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-22 18:37:43 +02:00
Jiang Liu
39118e31e1 x86/PCI: Use for_pci_msi_entry() to access MSI device list
Use accessor for_each_pci_msi_entry() to access MSI device list, so we
could easily move msi_list from struct pci_dev into struct device
later.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Acked-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: xen-devel@lists.xenproject.org
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Stuart Yoder <stuart.yoder@freescale.com>
Cc: Yijing Wang <wangyijing@huawei.com>
Cc: Borislav Petkov <bp@alien8.de>
Link: http://lkml.kernel.org/r/1436428847-8886-6-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-22 18:37:43 +02:00
Jiang Liu
df516f4278 s390/pci: Use for_pci_msi_entry() to access MSI device list
Use accessor for_each_pci_msi_entry() to access MSI device list, so we could
easily move msi_list from struct pci_dev into struct device later.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Acked-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Stuart Yoder <stuart.yoder@freescale.com>
Cc: Yijing Wang <wangyijing@huawei.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Gerald Schaefer <gerald.schaefer@de.ibm.com>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: linux390@de.ibm.com
Link: http://lkml.kernel.org/r/1436428847-8886-5-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-22 18:37:42 +02:00
Jiang Liu
2921d1790e powerpc/PCI: Use for_pci_msi_entry() to access MSI device list
Use accessor for_each_pci_msi_entry() to access MSI device list, so we
could easily move msi_list from struct pci_dev into struct device
later.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Stuart Yoder <stuart.yoder@freescale.com>
Cc: Yijing Wang <wangyijing@huawei.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Olof Johansson <olof@lixom.net>
Cc: Gavin Shan <gwshan@linux.vnet.ibm.com>
Cc: Alexey Kardashevskiy <aik@ozlabs.ru>
Cc: David Gibson <david@gibson.dropbear.id.au>
Cc: Daniel Axtens <dja@axtens.net>
Cc: Wei Yang <weiyang@linux.vnet.ibm.com>
Cc: Nishanth Aravamudan <nacc@linux.vnet.ibm.com>
Cc: Alexander Gordeev <agordeev@redhat.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Cc: Tudor Laurentiu <b10716@freescale.com>
Cc: Hongtao Jia <hongtao.jia@freescale.com>
Link: http://lkml.kernel.org/r/1436428847-8886-4-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-22 18:37:42 +02:00
Jiang Liu
bbcffac3a8 MIPS/PCI: Use for_pci_msi_entry() to access MSI device list
Use accessor for_each_pci_msi_entry() to access MSI device list, so we
could easily move msi_list from struct pci_dev into struct device
later.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mips@linux-mips.org
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Stuart Yoder <stuart.yoder@freescale.com>
Cc: Yijing Wang <wangyijing@huawei.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Ralf Baechle <ralf@linux-mips.org>
Link: http://lkml.kernel.org/r/1436428847-8886-3-git-send-email-jiang.liu@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-22 18:37:42 +02:00
Linus Torvalds
5a5ca73ac0 Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux
Pull ARM64 fixes from Catalin Marinas:

 - arm64 build fix following the move of the thread_struct to the end of
   task_struct and the asm offsets becoming too large for the AArch64
   ISA

 - preparatory patch for moving irq_data struct members (applied now to
   reduce dependency for the next merging window)

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  ARM64/irq: Use access helper irq_data_get_affinity_mask()
  arm64: switch_to: calculate cpu context pointer using separate register
2015-07-22 08:52:42 -07:00
Toshi Kani
9a58eebe1a x86/mm: Remove region_is_ram() call from ioremap
__ioremap_caller() calls region_is_ram() to walk through the
iomem_resource table to check if a target range is in RAM, which was
added to improve the lookup performance over page_is_ram() (commit
906e36c5c7 "x86: use optimized ioresource lookup in ioremap
function"). page_is_ram() was no longer used when this change was
added, though.

__ioremap_caller() then calls walk_system_ram_range(), which had
replaced page_is_ram() to improve the lookup performance (commit
c81c8a1eee "x86, ioremap: Speed up check for RAM pages").

Since both checks walk through the same iomem_resource table for
the same purpose, there is no need to call both functions.

Aside of that walk_system_ram_range() is the only useful check at the
moment because region_is_ram() always returns -1 due to an
implementation bug. That bug in region_is_ram() cannot be fixed
without breaking existing ioremap callers, which rely on the subtle
difference of walk_system_ram_range() versus non page aligned ranges.

Once these offending callers are fixed we can use region_is_ram() and
remove walk_system_ram_range().

[ tglx: Massaged changelog ]

Signed-off-by: Toshi Kani <toshi.kani@hp.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Cc: Roland Dreier <roland@purestorage.com>
Cc: Mike Travis <travis@sgi.com>
Cc: Luis R. Rodriguez <mcgrof@suse.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/1437088996-28511-3-git-send-email-toshi.kani@hp.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-22 17:20:34 +02:00
Toshi Kani
1c9cf9b211 x86/mm: Move warning from __ioremap_check_ram() to the call site
__ioremap_check_ram() has a WARN_ONCE() which is emitted when the
given pfn range is not RAM. The warning is bogus in two aspects:

- it never triggers since walk_system_ram_range() only calls
  __ioremap_check_ram() for RAM ranges.

- the warning message is wrong as it says: "ioremap on RAM' after it
  established that the pfn range is not RAM.

Move the WARN_ONCE() to __ioremap_caller(), and update the message to
include the address range so we get an actual warning when something
tries to ioremap system RAM.

[ tglx: Massaged changelog ]

Signed-off-by: Toshi Kani <toshi.kani@hp.com>
Reviewed-by: Dan Williams <dan.j.williams@intel.com>
Cc: Roland Dreier <roland@purestorage.com>
Cc: Luis R. Rodriguez <mcgrof@suse.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Borislav Petkov <bp@alien8.de>
Cc: linux-mm@kvack.org
Link: http://lkml.kernel.org/r/1437088996-28511-2-git-send-email-toshi.kani@hp.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-22 17:20:33 +02:00
Fabien Dessenne
7944450957 ARM: DT: STiH410: Add bdisp dt nodes
Add the bdisp (2D blitter for STMicroelectronics SoC) dt nodes for the
first of the two bdisp devices, defining register address, interrupt and
clock.

Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 15:05:31 +02:00
Lee Jones
5ecd29ac5e ARM: multi_v7_defconfig: Enable support for PWM Regulators
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 14:29:45 +02:00
Lee Jones
eb592bc2f3 ARM: multi_v7_defconfig: Enable ST's PWM driver
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 14:16:33 +02:00
Lee Jones
23155ffc55 ARM: STi: STiH407: Add PWM Regulator node
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 14:15:08 +02:00
Lee Jones
cd9f59ca6d ARM: STi: STiH407: Move PWM nodes STiH407 => STiH407-family
This also incorporates the STiH410.

Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 14:15:07 +02:00
Jiang Liu
3bc38fc110 ARM64/irq: Use access helper irq_data_get_affinity_mask()
This is a preparatory patch for moving irq_data struct members.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2015-07-22 10:57:09 +01:00
Will Deacon
c0d3fce5e1 arm64: switch_to: calculate cpu context pointer using separate register
Commit 0c8c0f03e3 ("x86/fpu, sched: Dynamically allocate 'struct fpu'")
moved the thread_struct to the bottom of task_struct. As a result, the
offset is now too large to be used in an immediate add on arm64 with
some kernel configs:

arch/arm64/kernel/entry.S: Assembler messages:
arch/arm64/kernel/entry.S:588: Error: immediate out of range
arch/arm64/kernel/entry.S:597: Error: immediate out of range

This patch calculates the offset using an additional register instead of
an immediate offset.

Fixes: 0c8c0f03e3 ("x86/fpu, sched: Dynamically allocate 'struct fpu'")
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Ingo Molnar <mingo@kernel.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
2015-07-22 10:56:41 +01:00
Gabriel Fernandez
5eb26c6059 ARM: STi: DT: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x
Use a generic name for this kind of PLL

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 11:41:33 +02:00
Peter Griffin
50de4dd4bc ARM: STi: Remove platform call to trace_hardirqs_off()
Calling trace_hardirqs_off() from the platform specific
secondary startup code as not been necessary since Dec 2010
when Russell King consolidated the call into the common SMP
code.

2c0136d ARM: SMP: consolidate trace_hardirqs_off() into common SMP code

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 11:15:30 +02:00
Peter Griffin
94a8cfceaa ARM: STi: Add code to release secondary cores from holding pen.
Most upstream devs boot STi platform via JTAG which abuses the
boot process by setting the PC of secondary cores directly. As
a consquence, booting STi platforms via u-boot results in only
the primary core being brought up as the code to manage the
holding pen is not upstream.

This patch adds the necessary code to bring the secondary cores
out of the holding pen. It uses the cpu-release-addr DT property
to get the address of the holding pen from the bootloader.

With this patch booting upstream kernels via u-boot works
correctly:

[    0.045456] CPU: Testing write buffer coherency: ok
[    0.045597] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.045734] Setting up static identity map for 0x40209000 - 0x40209098
[    0.065047] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[    0.065081] Brought up 2 CPUs
[    0.065089] SMP: Total of 2 processors activated (5983.43 BogoMIPS).
[    0.065092] CPU: All CPU(s) started in SVC mode.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 11:14:18 +02:00
Peter Griffin
0a8c739c06 ARM: STi: DT: STiH418: Add cpu-release-addr dt property.
To enable SMP when booting via u-boot we need to specify the
newly implemented cpu-release-addr DT property for cores 2 & 3.
Cores 0 & 1 are inherited from stih407-family.dtsi.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 11:11:04 +02:00
Peter Griffin
c1dc02da79 ARM: STi: DT: STiH407: Add cpu-release-addr dt property.
To enable SMP when booting via u-boot we need to specify the
newly implemented cpu-release-addr DT property.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 11:11:04 +02:00
Peter Griffin
810099f657 ARM: STi: DT: Add STiH407 family mtsin0 pinctrl configuration
mtsin0 channel can only be configured for parallel data transfer.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 11:03:11 +02:00
Peter Griffin
e0decdd60a ARM: STi: DT: Add STiH407 family tsout1 pinctrl configuration
tsout1 channel can only be configured for serial data tranfer.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 11:03:10 +02:00
Peter Griffin
75d28b8306 ARM: STi: DT: Add STiH407 family tsout0 pinctrl configuration
tsout0 channel can be configured for either serial or parallel
data transfer. Both pin configurations are provided.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 11:03:10 +02:00
Peter Griffin
dd72896f0d ARM: STi: DT: Add STiH407 family tsin5 pinctrl configuration
tsin5 can only be configured for serial data transfer. However
depending on board design, two alternate tsin5 pin configurations
are available, both in pin-controller-front0.

pinctrl_tsin5_serial_alt1 is brought out on B2120 reference
design as TSD on NIMB slot of the B2004A daughter board.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 11:03:10 +02:00
Peter Griffin
af4d191e44 ARM: STi: DT: Add STiH407 family tsin4 pinctrl configuration
tsin4 can only be configured for serial data transfer. However
depending on board design, two alternate pin configurations
are available. One in pin-controller-front0 and the other in
pin-controller-front1.

pinctrl_tsin4_serial_alt3 is brought out on B2120 reference
design as TSC on NIMA slot of the B2004A daughter board.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 11:03:10 +02:00
Peter Griffin
36cfc8c143 ARM: STi: DT: Add STiH407 family tsin3 pinctrl configuration
tsin3 channel can only be configured for serial data transfer.

On B2120 reference design tsin3 is brought out as TSB on the NIMB
slot of the B2004A daughter board.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 11:03:10 +02:00
Peter Griffin
855617d6aa ARM: STi: DT: Add STiH407 family tsin2 pinctrl configuration
tsin2 channel can be configured for either serial or parallel data
transfer. This patch adds the pinctrl config for both possibilities.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 11:03:09 +02:00
Peter Griffin
71cae849b9 ARM: STi: DT: Add STiH407 family tsin1 pinctrl configuration
tsin1 channel can be configured for either serial or parallel data
transfer. This patch adds the pinctrl config for both possibilities.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 11:03:09 +02:00
Peter Griffin
747d7e6e4c ARM: STi: DT: Add STiH407 family tsin0 pinctrl configuration
tsin0 and be configured as either serial or parallel. This patch
adds the pinctrl config for both possiblities. On B2120 reference
design tsin0 is brought out as TSA on the NIMA slot of the B2004A
daughter board.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
2015-07-22 11:03:09 +02:00
Romain Perier
117ccc11ac ARM: dts: rockchip: Use correct dts properties for tsadc node on veyron
tsadc-tshut-mode and tsadc-tshut-polarity properties don't exist. The rockchip
thermal driver looks for rockchip,hw-tshut-mode and rockchip,hw-tshut-polarity
instead, otherwise it might freeze or hang the device according to the default
mode or polarity used.

Signed-off-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-07-22 10:58:17 +02:00
Sebastian Ott
198a527894 s390/pci: inline get_zdev
Inline get_zdev to save ~200 bytes of kernel text for CONFIG_PCI=y.
Also rename the function to to_zpci to make clear that we don't do
reference counting here.

Signed-off-by: Sebastian Ott <sebott@linux.vnet.ibm.com>
Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
2015-07-22 09:58:05 +02:00