Commit Graph

113914 Commits

Author SHA1 Message Date
Viresh Kumar
69ec063f60 ARM/omap1/timer32: Migrate to new 'set-state' interface
Migrate omap timer32 driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2015-07-17 08:28:39 +05:30
Viresh Kumar
29105e1020 ARM/omap1/time: Migrate to new 'set-state' interface
Migrate omap driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2015-07-17 08:26:24 +05:30
Viresh Kumar
c22437b78e ARM/netx/time: Migrate to new 'set-state' interface
Migrate netx driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

We aren't writing zero twice on the control register for shutdown or
resume state now.

Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2015-07-17 08:26:23 +05:30
Viresh Kumar
a785fb39e1 ARM/mmp/time: Migrate to new 'set-state' interface
Migrate mmp driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

We weren't doing anything in set_mode(RESUME) except of
local_irq_{save|restore}(), which isn't required and so ->tick_resume
isn't implemented.

Cc: Eric Miao <eric.y.miao@gmail.com>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2015-07-17 08:26:21 +05:30
Viresh Kumar
9325a3a896 ARM/lpc32xx/timer: Migrate to new 'set-state' interface
Migrate lpc32xx driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

Cc: Roland Stigge <stigge@antcom.de>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2015-07-17 08:26:12 +05:30
Viresh Kumar
7cfa3c69ca ARM/ks8695/time: Migrate to new 'set-state' interface
Migrate ks8695 driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

There is nothing to be done for oneshot or shutdown states and so are
not implemented.

Acked-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2015-07-17 08:25:49 +05:30
Viresh Kumar
cea50eeef1 ARM/ixp4xx/timer: Migrate to new 'set-state' interface
Migrate ixp4xx driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

NOTE: ixp4xx_set_{oneshot|periodic} don't perform read operation on
'IXP4XX_OSRT1' register anymore.

Cc: Imre Kaloz <kaloz@openwrt.org>
Acked-by: Krzysztof Hałasa <khalasa@piap.pl>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2015-07-17 08:25:27 +05:30
Viresh Kumar
3200579faf ARM/imx/epit: Migrate to new 'set-state' interface
Migrate imx driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

Also drop 'clockevent_mode': It was caching the last state of the
clockevent device. The same behavior can be achieved by using
clockevents state helpers. These helpers are only required for oneshot
mode as shutdown/resume wouldn't be done twice by the core.

Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2015-07-17 08:24:57 +05:30
Viresh Kumar
e2efda2480 ARM/gemini/time: Migrate to new 'set-state' interface
Migrate gemini driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

Acked-by: Hans Ulli Kroll <ulli.kroll@googlemail.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2015-07-17 08:22:59 +05:30
Viresh Kumar
947d9cf53f ARM/dc21285-timer: Migrate to new 'set-state' interface
Migrate footbridge driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2015-07-17 08:22:56 +05:30
Viresh Kumar
bc660a454f ARM/davinci/time: Migrate to new 'set-state' interface
Migrate davinci driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

We weren't doing anything in set_mode(RESUME) and so .tick_resume()
isn't implemented.

Cc: Sekhar Nori <nsekhar@ti.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2015-07-17 08:22:48 +05:30
Viresh Kumar
9bdc2e0c9a ARM/cns3xxx/timer: Migrate to new 'set-state' interface
Migrate cns3xxx driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

NOTE: We don't read TIMER1_2_CONTROL_OFFSET register on shutdown
anymore.

Acked-by: Krzysztof Hałasa <khalasa@piap.pl>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2015-07-17 08:22:25 +05:30
Viresh Kumar
5e2535710e ARM/smp_twd: Migrate to new 'set-state' interface
Migrate smp_twd driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2015-07-17 08:22:11 +05:30
Magnus Damm
821e79cb56 ARM: shmobile: Remove marzen_defconfig
Now when the Marzen legacy board code is removed also
get rid of the marzen_defconfig file. Existing users
shall move over to shmobile_defconfig.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-07-17 08:29:45 +09:00
Murali Karicheri
8b4769cc53 ARM: keystone: dts: rename pcie nodes to help override status
Now that PCIe DT binding is disabled in SoC specific DTS,
we need a way to override it in a board specific DTS. So
rename the PCIe nodes accordingly.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2015-07-16 18:13:03 -04:00
Murali Karicheri
9dd4f28f36 ARM: keystone: dts: fix dt bindings for PCIe
Currently PCIe DT bindings are broken. PCIe driver can't function
without having a SerDes driver that provide the phy configuration.
On K2E EVM, this causes problem since the EVM has Marvell SATA
controller present and with default values in the SerDes register,
it seems to pass the PCIe link check, but causes issues since
the configuration is not correct. The manifestation is that when
EVM is booted with NFS rootfs, the boot hangs. We shouldn't enable
PCIe on this EVM since to work, SerDes driver has to be present as
well. So by default, the PCIe DT binding should be disabled in SoC
specific DTS. It can be enabled in the board specific DTS when the
SerDes device driver is also present.

So fix the status of PCIe DT bindings in the SoC specific DTS to
"disabled". To enable PCIe, the status should be set to "ok" in
the EVM DTS file when SerDes driver support becomes available in
the upstream tree.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2015-07-16 18:12:57 -04:00
Jiang Liu
507a883ed5 treewide: Use helper function to access irq_data->msi_desc
Use irq_data access helper to access irq_data->msi_desc, so we can
move msi_desc from struct irq_data into struct irq_common_data later.

Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Cc: Chris Metcalf <cmetcalf@ezchip.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-16 23:31:37 +02:00
Robert Jarzmik
a927ef895e ARM: pxa: fix dm9000 platform data regression
Since dm9000 driver added support for a vcc regulator, platform data
based platforms have their ethernet broken, as the regulator claiming
returns -EPROBE_DEFER and prevents dm9000 loading.

This patch fixes this for all pxa boards using dm9000, by using the
specific regulator_has_full_constraints() function.

This was discovered and tested on the cm-x300 board.

Fixes: 7994fe55a4 ("dm9000: Add regulator and reset support to dm9000")
Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
2015-07-16 22:43:59 +02:00
Heiko Stuebner
4863dcd394 ARM: dts: rockchip: add rk3288 arm-pmu irq affinity
The rk3288 uses spi irqs for the arm-pmu on individual cpu cores, so needs
the affinity to them defined.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Sonny Rao <sonnyrao@chromium.org>
2015-07-16 22:22:47 +02:00
Andy Shevchenko
f33d159ea7 x86/platform/iosf_mbi: Add Intel Tangier PCI id
Intel Tangier has an IOSF Mailbox with PCI ID 8086:1170.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: David E . Box <david.e.box@linux.intel.com>
Link: http://lkml.kernel.org/r/1436366709-17683-6-git-send-email-andriy.shevchenko@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-16 17:48:48 +02:00
Andy Shevchenko
7e1ff15b69 x86/platform/iosf_mbi: Source cleanup
- Move the static variables to one place
 - Fix indentations in the header
 - Correct comments

No functional change.

[ tglx: Massaged changelog ]

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: David E . Box <david.e.box@linux.intel.com>
Link: http://lkml.kernel.org/r/1436366709-17683-5-git-send-email-andriy.shevchenko@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-16 17:48:48 +02:00
Andy Shevchenko
b93fb9f6ae x86/platform/iosf_mbi: Remove NULL pointer checks for pci_dev_put()
pci_dev_put() has already a check for NULL pointer.

[ tglx: Massaged changelog ]

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: David E . Box <david.e.box@linux.intel.com>
Link: http://lkml.kernel.org/r/1436366709-17683-4-git-send-email-andriy.shevchenko@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-16 17:48:48 +02:00
Andy Shevchenko
64279c7e05 x86/platform/iosf_mbi: Check return value of debugfs_create properly
The code checks the result of the first debugfs_create call several
times and fails to check the result of the subsequent calls due to
missing assigments.

Add the missing assignments and check only for !res because
debugfs_create() returns only NULL on error and not an encoded error
code.

[ tglx: Massaged changelog ]

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: David E . Box <david.e.box@linux.intel.com>
Link: http://lkml.kernel.org/r/1436366709-17683-3-git-send-email-andriy.shevchenko@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-16 17:48:48 +02:00
Andy Shevchenko
23ae2a16bb x86/platform/iosf_mbi: Move to dedicated folder
Move the driver to arch/x86/platform/intel since it is not a core
kernel code and it is related to many Intel SoCs from different
groups: Atom, MID, etc.

There is no functional change.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: David E . Box <david.e.box@linux.intel.com>
Link: http://lkml.kernel.org/r/1436366709-17683-2-git-send-email-andriy.shevchenko@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2015-07-16 17:48:47 +02:00
Heiko Stuebner
6158e6d004 ARM: dts: rockchip: add missing device_type = "memory" to boards
The memory node is supposed to contain a device_type property marking
it as memory. The currently included boards miss this property.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-07-16 14:21:54 +02:00
Heiko Stuebner
05ffc63062 ARM: dts: rockchip: add veyron-pinky board
While pinky was one of the earlier development models, is on the list
of endangered species today and nearly extinct, I want to keep mine
around for the foreseeable future after spending all the time making a
nice hole into the base below the dut-connector.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2015-07-16 14:18:37 +02:00
Alexandru M Stan
f3ee390e4e ARM: dts: rockchip: add veyron-jerry board
The Hisense Chromebook C11, also named jerry.

Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
2015-07-16 13:38:49 +02:00
Alexandru M Stan
e28ea9dbc5 ARM: dts: rockchip: add shared rk3288-veyron files
This adds the shared devicetree files for the Veyron device family.
They are split, as not all veyron devices are chromebooks and
not all contain a sd-card slot.

Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
2015-07-16 13:38:43 +02:00
Tony Lindgren
7fcf7e061e ARM: OMAP2+: Remove legacy booting support for Pandora
We've been moving all omap2+ based systems to boot in device tree only
mode for a few years now. Only omap3 has legacy booting support
remaining. Most omap3 boards already have related arch/arm/boot/*.dts*
files for booting with device tree.

This board has support for device tree based booting, and we've been
printing warnings about the legacy booting being deprecated for a
few merge cycles now. Let's attempt to remove the legacy booting
for it.

The reason for removing the legacy booting support now rather than
later is we can simply revert this patch if necessary if we run
into some unexpected issues that are not trivial to fix for the
device tree based booting.

Cc: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-16 04:12:32 -07:00
Tony Lindgren
9cf705de06 ARM: OMAP2+: Add support for initializing dm814x clocks
Let's add a minimal clocks for dm814x to get it booted. This is
mostly a placeholder and relies on the PLLs being on from the
bootloader.

Note that the divider clocks work the same way as on dm816x and
am335x.

Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Mike Turquette <mturquette@linaro.org>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Tero Kristo <t-kristo@ti.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-16 02:09:33 -07:00
Tony Lindgren
7c80a3f89c ARM: OMAP2+: Add custom prwdm_operations for 81xx to support dm814x
Looking at the TI kernel tree I noticed that dm81xx need custom
ti81xx_pwrdm_operations. Let's also change dm816x over to use them
as the registers are different for dm81xx compared to others.

Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-16 02:09:33 -07:00
Tony Lindgren
185fde6d5b ARM: OMAP2+: Add minimal clockdomains for dm814x
For now, let's just add the ones shared with dm816x.
The dm814x specific ones can be added as they are tested.

Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-16 02:09:33 -07:00
Tony Lindgren
9444f10346 ARM: OMAP2+: Fix scm compatible for dm814x
Fix scm compatible for dm814x.

Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-16 02:09:10 -07:00
Tony Lindgren
9fd274c069 ARM: OMAP2+: Fix dm814x DT_MACHINE_START
Fix dm814x DT_MACHINE_START.

Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-16 02:09:10 -07:00
Thierry Reding
7e939de1b2 soc/tegra: fuse: Unify Tegra20 and Tegra30 drivers
Unifying the drivers makes it easier to restrict the legacy probing
paths to 32-bit ARM. This in turn will come in handy as support for
new 64-bit ARM SoCs is added.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 10:38:28 +02:00
Sekhar Nori
da104dc845 ARM: omap2plus_defconfig: enable support for M25P80 SPI NOR
M25P80 driver provides support for most common SPI NOR devices.
These devices are commonly found on TI EVMs for AM437x and DRA7x
SoCs.

Enable support for this driver in defconfig for omap2plus devices.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-16 00:54:53 -07:00
Sekhar Nori
5c107aa031 ARM: omap2plus_defconfig: enable support for TI CPTS
CPTS module of CPSW IP enables timestamp synchronization
using PTP. Enable CPTS feature of CPSW driver.

Available on AM335x, AM437x and DRA7x SoCs.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-16 00:54:10 -07:00
Sekhar Nori
af7b9f8942 ARM: omap2plus_defconfig: enable support for TI touchscreen
Enable support for on-chip resistive touchscreen m found on AM335x and
AM437x devices.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-16 00:54:09 -07:00
Sekhar Nori
588f2c31f3 ARM: omap2plus_defconfig: enable support for TI ADC
Enable support for on-chip ADC found on AM335x and
AM437x devices.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-16 00:54:09 -07:00
Tuomas Tynkkynen
fa63aa3dea clk: tegra: Add functions for parsing CVB tables
Tegra CVB tables encode the relationship between operating voltage
and optimal frequency as a function of the so-called speedo value.
The speedo value is written to the on-chip fuses at the factory,
which allows the voltage-frequency operating points to be calculated
on an per-chip basis.

Add utility functions to parse the Tegra-specific tables and export the
voltage-frequency pairs to the generic OPP framework for other drivers
to use.

Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Signed-off-by: Mikko Perttunen <mikko.perttunen@kapsi.fi>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-07-16 09:32:47 +02:00
Suman Anna
228e5fadba ARM: OMAP2+: Remove module references from IOMMU machine layer
The OMAP IOMMU driver has been adapted to the IOMMU framework
for a while now, and it no longer supports being built as a
module. Cleanup all the module related references both from
the code and in the build.

While at it, also relocate a comment around the initcall to
avoid a checkpatch strict warning about using a blank line
after function/struct/union/enum declarations.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-16 00:14:50 -07:00
Nishanth Menon
ea827ad5ff ARM: DRA7: Provide proper IO map table
DRA7 uses OMAP5 IO table at the moment. This is purely spurious since
the OMAP5 and DRA7 register maps are different in many aspects.

AM57xx/DRA7 TRM Reference: http://www.ti.com/lit/ug/spruhz6/spruhz6.pdf

NOTE: Most of the drivers are already doing ioremap, so, there should'nt
be any functional improvement involved here, other than making the
initial iotable more accurate.

Fixes: a3a9384a11 ("ARM: DRA7: Reuse io tables and add a new .init_early")
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-16 00:06:05 -07:00
Tony Lindgren
d1dabab284 ARM: OMAP2+: Clean up omap4_local_timer_init
Inspired by a patch from Felipe Balbi <balbi@ti.com>, we can
now get rid of most the code in omap4_local_timer_init.

Omap4 is now device tree only.. And we have not properly supported
omap4 ES1.0 revision for a really long time AFAIK.

Let's just remove all that code to simplify things. This assumes
we have arm,cortex-a9-twd-timer entry in the omap4.dtsi file, which
we do.

Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-15 23:50:35 -07:00
Anshuman Khandual
4c576229ac powerpc/signal: Fix confusing header documentation in sigcontext.h
Commit ce48b21007 "powerpc: Add VSX context save/restore, ptrace and
signal support" expanded the 'vmx_reserve' array element to contain 101
double words, but the comment block above was not updated.

Also reorder the constants in the array size declaration to reflect the
logic mentioned in the comment block above. This change helps in
explaining how the HW registers are represented in the array. But no
functional change.

Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
[mpe: Reworded change log and added whitespace around +'s]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2015-07-16 16:14:40 +10:00
Anshuman Khandual
829023df86 powerpc/tm: Drop tm_orig_msr from thread_struct
Currently tm_orig_msr is getting used during process context switch only.
Then there is ckpt_regs which saves the checkpointed userspace context
The MSR slot contained in ckpt_regs structure can be used during process
context switch instead of tm_orig_msr, thus allowing us to drop it from
thread_struct structure. This patch does that change.

Acked-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Anshuman Khandual <khandual@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2015-07-16 16:02:37 +10:00
Markus Elfring
9a0cb98589 ARM: OMAP2: Delete an unnecessary check
The of_node_put() function tests whether its argument is NULL and then
returns immediately if so.  Furthermore, the kerneldoc for
of_node_put() explicitly supports passing in a NULL pointer as its
argument.  Thus the test around the call is not needed.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
[paul@pwsan.com: dropped the omap_device.c and omap_hwmod.c changes for
 now, edited the commit message accordingly and to note the documented
 "contract"]
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-07-15 23:59:39 -06:00
Sekhar Nori
9e5d46b051 ARM: OMAP2+: sparse: add missing function declarations
omap3xxx_restart() and omap44xx_restart() are global
functions declared in common.h. Include this file
in omap3-restart.c and omap4-restart.c to prevent
sparse warnings of type:

arch/arm/mach-omap2/omap4-restart.c:22:6: warning: symbol 'omap44xx_restart' was not declared. Should it be static?

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-07-15 23:43:41 -06:00
Sekhar Nori
f734a9b3b1 ARM: OMAP2+: sparse: add missing static declaration
Add missing static declaration for file local variables.
This fixes sparse warnings of type:

arch/arm/mach-omap2/omap_hwmod_81xx_data.c:491:26: warning: symbol 'dm81xx_alwon_l3_slow__gpmc' was not declared. Should it be static?

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-07-15 23:42:12 -06:00
Vipin K Parashar
3b476aadbc powerpc/powernv: Add poweroff (EPOW, DPO) events support for PowerNV platform
This patch adds support for OPAL EPOW (Environmental and Power Warnings)
and DPO (Delayed Power Off) events for the PowerNV platform. These events
are generated on FSP (Flexible Service Processor) based systems. EPOW
events are generated due to various critical system conditions that
require system shutdown. A few examples of these conditions are high
ambient temperature or system running on UPS power with low UPS battery.
DPO event is generated in response to admin initiated system shutdown
request. Upon receipt of EPOW and DPO events the host kernel invokes
orderly_poweroff() for performing graceful system shutdown.

Signed-off-by: Vipin K Parashar <vipin@linux.vnet.ibm.com>
Acked-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2015-07-16 13:34:36 +10:00
Lokesh Vutla
aaf2c0fbbb ARM: OMAP2+: hwmod: add support for lock and unlock hooks
Some IP blocks like RTC, needs an additional setting for writing to its
registers. This is to prevent any spurious writes from changing the
register values.

This patch adds optional lock and unlock function pointers to
the IP block's hwmod data. These unlock and lock function pointers
are called by hwmod code before and after writing sysconfig registers.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[paul@pwsan.com: fixed indentation level to conform with the rest of the
 structure members]
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-07-15 18:16:16 -06:00