53 Commits

Author	SHA1	Message	Date
Leela Krishna Amudala	17d4caccef	clk: exynos5250: register display block gate clocks to common clock framework ... Add gate clocks for fimd, mie, dsim, dp, mixer and hdmi. Register it to common clock framework. Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>	2013-04-04 15:51:23 +09:00
Tomasz Figa	6b5756e8bd	clk: exynos4: Add support for SoC-specific register save list ... This patch extends suspend/resume support for SoC-specific registers to handle differences in register sets on particular SoCs. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>	2013-04-04 15:51:22 +09:00
Thomas Abraham	6e3ad26816	clk: exynos5250: register clocks using common clock framework ... The Exynos5250 clocks are statically listed and registered using the Samsung specific common clock helper functions. Both device tree based clock lookup and clkdev based clock lookups are supported. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>	2013-03-25 18:16:56 +09:00