Commit Graph

2 Commits

Author SHA1 Message Date
Sibi Sankar
526ce9eb45 dt-bindings: mailbox: qcom: Document Glymur CPUCP mailbox controller binding
Document CPU Control Processor (CPUCP) mailbox controller for Qualcomm
Glymur SoCs. It is software compatible with X1E80100 CPUCP mailbox
controller hence fallback to it.

Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2025-10-06 18:13:53 -05:00
Sibi Sankar
6e7c4cc55d dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings
Add devicetree binding for CPUSS Control Processor (CPUCP) mailbox
controller.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Jassi Brar <jassisinghbrar@gmail.com>
2024-07-10 13:24:55 -05:00