Ville Syrjälä
0aed9d3454
drm/i915/de: Use intel_de_wait_for_{set,clear}_us()
...
Use intel_de_wait_for_{set,clear}_us() instead of
intel_de_wait_us() where appropriate.
Done with cocci (with manual formatting fixes):
@@
identifier func !~ "intel_de_wait_for";
expression display, reg, mask, timeout_us;
@@
func(...)
{
<...
(
- intel_de_wait_us(display, reg, mask, mask, timeout_us, NULL)
+ intel_de_wait_for_set_us(display, reg, mask, timeout_us)
|
- intel_de_wait_us(display, reg, mask, 0, timeout_us, NULL)
+ intel_de_wait_for_clear_us(display, reg, mask, timeout_us)
)
...>
}
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patch.msgid.link/20251110172756.2132-10-ville.syrjala@linux.intel.com
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com >
Acked-by: Jani Nikula <jani.nikula@intel.com >
2025-11-11 19:31:09 +02:00
Ville Syrjälä
45554c1c64
drm/i915/de: Use intel_de_wait_us()
...
Convert some of the intel_de_wait_custom() users over to
intel_de_wait_us(). We'll eventually want to eliminate
intel_de_wait_custom() as it's a hinderance towards using
poll_timeout_us().
This includes all the obvious cases where we only specify
a microsecond timeout to intel_de_wait_custom().
Done with cocci (with manual formatting fixes):
@@
expression display, reg, mask, value, timeout_us, out_value;
@@
- intel_de_wait_custom(display, reg, mask, value, timeout_us, 0, out_value)
+ intel_de_wait_us(display, reg, mask, value, timeout_us, out_value)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patch.msgid.link/20251110172756.2132-6-ville.syrjala@linux.intel.com
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com >
Acked-by: Jani Nikula <jani.nikula@intel.com >
2025-11-11 19:28:54 +02:00
Ville Syrjälä
93e0f7c8a9
drm/i915/de: Include units in intel_de_wait*() function names
...
intel_de_wait*() take the timeout in milliseconds. Include
that information in the function name to make life less
confusing. I'll also be introducing microsecond variants
of these later.
Done with cocci:
@@
@@
(
static int
- intel_de_wait
+ intel_de_wait_ms
(...)
{
...
}
|
static int
- intel_de_wait_fw
+ intel_de_wait_fw_ms
(...)
{
...
}
|
static int
- intel_de_wait_for_set
+ intel_de_wait_for_set_ms
(...)
{
...
}
|
static int
- intel_de_wait_for_clear
+ intel_de_wait_for_clear_ms
(...)
{
...
}
)
@@
@@
(
- intel_de_wait
+ intel_de_wait_ms
|
- intel_de_wait_fw
+ intel_de_wait_fw_ms
|
- intel_de_wait_for_set
+ intel_de_wait_for_set_ms
|
- intel_de_wait_for_clear
+ intel_de_wait_for_clear_ms
)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patch.msgid.link/20251110172756.2132-4-ville.syrjala@linux.intel.com
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com >
Acked-by: Jani Nikula <jani.nikula@intel.com >
2025-11-11 19:27:46 +02:00
Jani Nikula
1c1960f571
Merge drm/drm-next into drm-intel-next
...
Primarily sync with the drm_print.h changes from drm-misc.
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-11-11 12:32:07 +02:00
Dave Airlie
e237dfe708
Merge tag 'drm-misc-next-2025-11-05-1' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-next
...
drm-misc-next for v6.19-rc1:
UAPI Changes:
- Add userptr support to ivpu.
- Add IOCTL's for resource and telemetry data in amdxdna.
Core Changes:
- Improve some atomic state checking handling.
- drm/client updates.
- Use forward declarations instead of including drm_print.h
- RUse allocation flags in ttm_pool/device_init and allow specifying max
useful pool size and propagate ENOSPC.
- Updates and fixes to scheduler and bridge code.
- Add support for quirking DisplayID checksum errors.
Driver Changes:
- Assorted cleanups and fixes in rcar-du, accel/ivpu, panel/nv3052cf,
sti, imxm, accel/qaic, accel/amdxdna, imagination, tidss, sti,
panthor, vkms.
- Add Samsung S6E3FC2X01 DDIC/AMS641RW, Synaptics TDDI series DSI,
TL121BVMS07-00 (IL79900A) panels.
- Add mali MediaTek MT8196 SoC gpu support.
- Add etnaviv GC8000 Nano Ultra VIP r6205 support.
- Document powervr ge7800 support in the devicetree.
Signed-off-by: Dave Airlie <airlied@redhat.com >
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com >
Link: https://patch.msgid.link/5afae707-c9aa-4a47-b726-5e1f1aa7a106@linux.intel.com
2025-11-07 12:41:26 +10:00
Gustavo Sousa
af28e607fc
drm/i915/xe3p_lpd: Add CDCLK table
...
Add CDCLK table for Xe3p_LPD.
Just as with Xe3_LPD, we don't need to send voltage index info in the
PMDemand message, so we are able to re-use xe3lpd_cdclk_funcs.
With the new CDCLK table, we also need to update the maximum CDCLK value
returned by intel_update_max_cdclk().
Bspec: 68861, 68863
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com >
Reviewed-by: Matt Roper <matthew.d.roper@intel.com >
Link: https://patch.msgid.link/20251103-xe3p_lpd-basic-enabling-v3-8-00e87b510ae7@intel.com
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com >
2025-11-06 18:22:50 -03:00
Jani Nikula
b062cf5456
drm/i915/display: switch to intel_display_utils.h
...
The remaining utils display needs from i915_utils.h are primarily
MISSING_CASE() and fetch_and_zero(), with a couple of
i915_inject_probe_failure() uses.
To avoid excessive churn, add duplicates of MISSING_CASE() and
fetch_and_zero() to intel_display_utils.h, and switch display to use the
display utils.
As long as there are display files that include i915_drv.h, which
includes i915_utils.h, we'll need #ifndef guards for MISSING_CASE() and
fetch_and_zero() in both utils headers. We can remove them once display
no longer depends on i915_drv.h.
A couple of files in display still need i915_utils.h for
i915_inject_probe_failure(). Annotate this. They will be handled
separately.
Reviewed-by: Luca Coelho <luciano.coelho@intel.com >
Link: https://patch.msgid.link/79f9e31ca64c8c045834d48e20ceb0c515d1e9e1.1761146196.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-10-31 13:22:52 +02:00
Jani Nikula
f6e8dc9edf
drm: include drm_print.h where needed
...
There are a gazillion files that depend on drm_print.h being indirectly
included via drm_buddy.h, drm_mm.h, or ttm/ttm_resource.h. In
preparation for removing those includes, explicitly include drm_print.h
where needed.
Cc: Thomas Zimmermann <tzimmermann@suse.de >
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de >
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
Link: https://lore.kernel.org/r/5fe67395907be33eb5199ea6d540e29fddee71c8.1761734313.git.jani.nikula@intel.com
2025-10-31 10:34:52 +02:00
Naladala Ramanaidu
bbbfa70dfe
drm/i915: Add fallback for CDCLK selection when min_cdclk is too high
...
In cases where the requested minimum CDCLK exceeds all available
values for the current reference clock, the CDCLK selection logic
previously returned 0. This could result coverity division or
modulo by zero issue.
Introduce a fallback mechanism that returns platform's max_cdclk_freq
instead of 0.
v2: Update safe fallback value to max cdclk. (Ville)
v3: Update commit messgae (Mika)
Signed-off-by: Naladala Ramanaidu <ramanaidu.naladala@intel.com >
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com >
Link: https://patch.msgid.link/20251017150526.781715-1-ramanaidu.naladala@intel.com
2025-10-29 13:58:28 +05:30
Ville Syrjälä
7a8d9cfa6d
drm/i915: Compute per-crtc min_cdclk earlier
...
Currently we compute the min_cdclk for each pipe during
intel_cdclk_atomic_check(). But that is too late for the
pipe prefill vs. vblank length checks (done during
intel_compute_global_watermarks).
We can't just reorder these things due to other dependencies,
so instead pull only the per-crtc minimum cdclk calculation
ahead. We should have enough information for that as soon
as we've computed the min cdclk for the planes.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20251013201236.30084-8-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-17 00:05:04 +03:00
Ville Syrjälä
5785ace8e1
drm/i915: s/min_cdck[]/plane_min_cdclk[]/
...
Rename crtc_state->min_cdclk[] into crtc_state->plane_min_cdclk[]
to better reflect what it represents.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20251013201236.30084-7-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-17 00:05:04 +03:00
Ville Syrjälä
68de4d6544
drm/i915/fbc: Decouple FBC from intel_cdclk_atomic_check()
...
Always account for FBC requirements in intel_crtc_compute_min_cdclk()
so that we don't have to worry about the actual CDCLK frequency in
intel_fbc_check_plane() any longer.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20251013201236.30084-6-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-17 00:05:04 +03:00
Ville Syrjälä
1c67c43669
drm/i915/bw: Relocate intel_bw_crtc_min_cdclk()
...
intel_bw_crtc_min_cdclk() (aka. the thing that deals with what bspec
calls "Maximum Pipe Read Bandwidth") doesn't really have anything to
do with the rest of intel_bw.c (which is all about SAGV/QGV and
memory bandwidth). Move it into intel_crtc.c (for the lack of a better
place).
And I don't really want to call intel_bw.c functions from intel_crtc.c,
so move out intel_bw_crtc_data_rate() as well. And when we move that we
pretty much have to move intel_bw_crtc_num_active_planes() as well since
the two are meant to be used as a pair (they both implement the same
"ignore the cursor" logic).
And in an effort to keep the namespaces at least semi-sensible we
flip the intel_bw_crtc_ prefix into intel_crtc_bw_.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20251013201236.30084-4-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-17 00:05:04 +03:00
Ville Syrjälä
ac930bab1c
drm/i915/bw: Untangle dbuf bw from the sagv/mem bw stuff
...
Currently intel_bw.c contains basically three completely independent
parts:
- SAGV/memory bandwidth handling
- DBuf bandwidth handling
- "Maximum pipe read bandwidth" calculation, which is some kind
of internal per-pipe bandwidth limit.
Carve out the DBuf bandwdith handling into a separate file since
there is no actual dependency between it and the rest of intel_bw.c.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20251013201236.30084-2-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-17 00:05:04 +03:00
Ville Syrjälä
4157c75604
drm/i915/cdclk: Add intel_cdclk_min_cdclk_for_prefill()
...
Introduce a helper to compute the min required cdclk frequency
for a given guardband size. This could be used to bump up the
cdclk in case the vblank is so small that the normally computed
minimum cdclk results in too slow a prefill.
Reviewed-by: Uma Shankar <uma.shankar@intel.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20251014191808.12326-5-ville.syrjala@linux.intel.com
2025-10-16 18:20:32 +03:00
Ville Syrjälä
2b4c2a5e4d
drm/i915/cdclk: Add prefill helpers for CDCLK
...
Add helpers to compute the CDCLKl adjustment factor for prefill
calculations. The adjustment factor is always <= 1.0. That is,
a faster CDCLK speeds up the pipe prefill.
intel_cdclk_prefill_adjustment_worst() gives out a worst case estimate,
meant to be used during guardband sizing. We can actually do better
than 1.0 here because the absolute minimum CDCLK is limited by the
dotclock. This will still allow planes, pfit, etc. to be changed any
which way without having to resize the guardband yet again.
intel_cdclk_prefill_adjustment() is supposed to give a more accurate
value based on the current min cdclk for the pipe, but currently that
is not yet available when this gets called. So for now use the same
worst case estimate here.
The returned numbers are in .16 binary fixed point.
TODO: the intel_cdclk_prefill_adjustment_worst() approach here
can result in guardband changes for DRRS. But I'm thinking
that is fine since M/N changes will always happen on the
legacy timing generator so guardband doesn't actually matter.
May need to think about this a bit more though...
v2: Use the worst case estimate always for now
Reviewed-by: Uma Shankar <uma.shankar@intel.com > #v1
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20251014191808.12326-4-ville.syrjala@linux.intel.com
2025-10-16 18:19:55 +03:00
Ville Syrjälä
a051ef9f12
drm/i915/cdclk: Move intel_cdclk_atomic_check()
...
Move intel_cdclk_atomic_check() a bit so that we don't need an
extra intel_modeset_calc_cdclk() forward declaration.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250923171943.7319-21-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-11 03:48:06 +03:00
Ville Syrjälä
1cb17a6a27
drm/i915/cdclk: Hide intel_modeset_calc_cdclk()
...
We no longer have anything of importance between
intel_cdclk_atomic_check() and intel_modeset_calc_cdclk(), so
hide the latter inside the former.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250923171943.7319-20-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-11 03:48:06 +03:00
Ville Syrjälä
4b044b1368
drm/i915/cdclk: Use enabled_pipes instead of active_pipes for the glk audio w/a
...
Currently we are considering the set of active pipes when
determining if we need to boost the cdclk due to glk audio
issues. Replace that with the set of logically enabled pipes
instead. That is generally how everything else cdclk related
is computed (cdclk_state->logical is based on logically
enabled pipes).
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250923171943.7319-19-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-11 03:48:06 +03:00
Ville Syrjälä
ba91b9eecb
drm/i915/cdclk: Decouple cdclk from state->modeset
...
There's no real reason anymore to tie cdclk updates to
state->modeset/any_ms. Always call the cdclk functions and
allow them to decide whether cdclk update is necessary/desired
or not.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250923171943.7319-17-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-11 03:47:58 +03:00
Ville Syrjälä
3d23ce8c55
drm/i915/cdclk: Move intel_bw_crtc_min_cdclk() handling into intel_crtc_compute_min_cdclk()
...
intel_bw_crtc_min_cdclk() depends only on per-crtc state,
so there is no real point in having it complicate the global
bw_min_cdclk. Instead let's just account for it in
intel_crtc_compute_min_cdclk().
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250923171943.7319-16-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-11 02:52:00 +03:00
Ville Syrjälä
fa7fd8ebb6
drm/i915/cdclk: Rework crtc min_cdclk handling
...
Update crtc min_cdclk directly from when calling
intel_cdclk_update_crtc_min_cdclk() rather than doing it later
from intel_compute_min_cdclk().
This will eg. allow better control over when to update the
cdclk. For now we preserve the current behaviour by allowing
the cdclk to decrease when any pipe needs to do a full modeset.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250923171943.7319-15-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-11 02:51:49 +03:00
Ville Syrjälä
a6d20cb1d8
drm/i915/cdclk: Relocate intel_plane_calc_min_cdclk() calls
...
There's no reason to defer intel_plane_calc_min_cdclk() until
intel_cdclk_atomic_check(). Just do this as part of
intel_atomic_check_planes() (after we've added all the planes to
the state that affect the per-plane min_cdclk calculation).
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250923171943.7319-14-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-11 02:51:34 +03:00
Ville Syrjälä
8f7443ae52
drm/i915/cdclk: Do intel_cdclk_update_crtc_min_cdclk() per-pipe
...
Currently we call intel_cdclk_update_crtc_min_cdclk() per-plane.
That is rather wasteful, and also won't account for any of the
other per-pipe min_cdclk restrictions from
intel_crtc_compute_min_cdclk(). Change the behaviour to do
do the comparison per-crtc instead, and use the final min cdclk
as computed by intel_crtc_compute_min_cdclk().
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250923171943.7319-13-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-11 02:51:18 +03:00
Ville Syrjälä
84105a358f
drm/i915/cdclk: Rework bw_min_cdclk handling
...
Update bw_min_cdclk directly from intel_bw_calc_min_cdclk()
rather than doing it later from intel_compute_min_cdclk().
This will allow better control over when to update the
cdclk. For now we preserve the current behaviour by allowing
the cdclk to decrease when any pipe needs to do a full modeset.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250923171943.7319-12-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-11 02:51:07 +03:00
Ville Syrjälä
25b0657e7f
drm/i915/cdclk: Extract intel_cdclk_update_crtc_min_cdclk()
...
Hide the cdclk state details better by providing a helper
(intel_cdclk_update_crtc_min_cdclk()) by which the crtc code
can inform the cdclk code about a new per-pipe min_cdclk value.
Note that this is currently being called once per-plane, but
it'll be changed to be just a single call for the whole pipe
later.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250923171943.7319-11-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-11 02:50:44 +03:00
Ville Syrjälä
dd45d5a615
drm/i915/cdclk: Extract intel_cdclk_update_bw_min_cdclk()
...
Hide the cdclk state details better by providing a helper
(intel_cdclk_update_bw_min_cdclk()) by which the bw code can
inform the cdclk code about a new bw_min_cdclk value.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250923171943.7319-10-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-11 02:50:30 +03:00
Ville Syrjälä
f8dfd916fa
drm/i915/cdclk: Handle the force_min_cdclk state locking in intel_cdclk_atomic_check()
...
Clean up the mess inside intel_modeset_calc_cdclk() a bit by
moving the intel_atomic_lock_global_state() for force_min_cdclk
changes into intel_cdclk_atomic_check().
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250923171943.7319-9-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-11 02:50:15 +03:00
Ville Syrjälä
bcc492d712
drm/i915/cdclk: Introduce intel_cdclk_modeset_checks()
...
I plan to better decouple the cdclk computation from actual
modesets. To that end make the cdclk code self sufficient in
being able to determine if a full cdclk calculation/update is
needed or not due to some not strictly cdclk related reason.
Currently we have three such things that depend active_pipes:
- cdclk_state->actual
- glk audio w/a
- dg2 power well stuff
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250923171943.7319-8-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-11 02:50:01 +03:00
Ville Syrjälä
9112ce99c1
drm/i915/cdclk: Extract dg2_power_well_count()
...
Extract the code to determine the DG2 pipe power well count
into a small helper. I'll have other uses for this later.
TODO: need to move this power well stuff out from the cdclk code...
v2: Don't lose the early return from intel_cdclk_pcode_pre_notify()
(kernel test robot)
v3: Compare old vs. new, not old vs. old (Jani)
Cc: Jani Nikula <jani.nikula@linux.intel.com >
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250926083950.24486-1-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-11 02:49:31 +03:00
Ville Syrjälä
24c78dda6d
drm/i915/cdclk: Extract glk_cdclk_audio_wa_needed()
...
Extract the glk audio w/a check into a small helper. We'll
have other uses for this later.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://patchwork.freedesktop.org/patch/msgid/20250923171943.7319-6-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
2025-10-11 02:49:09 +03:00
Jani Nikula
5615e78e81
drm/i915: split out vlv_clock.[ch]
...
Move the VLV clock related functions to their own file.
v2: Rebase
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com > # v1
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://lore.kernel.org/r/0bc4a930f3e364c4fc37479f56bf07ccee854fcc.1757688216.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-09-17 11:29:53 +03:00
Jani Nikula
a6e8325b86
drm/i915: cache the results in vlv_clock_get_hpll_vco() and use it more
...
Use vlv_clock_get_hpll_vco() helper more to avoid looking at
i915->hpll_freq directly. Cache and return the cached results to avoid
repeated lookups.
v2: Rebase
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com > # v1
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://lore.kernel.org/r/14695618682d8d8fad1adc485de7a122c8e1494a.1757688216.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-09-17 11:29:14 +03:00
Jani Nikula
f6b784c44a
drm/i915: rename vlv_get_hpll_vco() to vlv_clock_get_hpll_vco()
...
Follow the new vlv_clock_*() naming pattern for all the related VLV
clock functions.
v2: Rebase
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com >
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://lore.kernel.org/r/75ac6b1cda2cb0afe3171250c4d5ba1ff81df877.1757688216.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-09-17 11:29:13 +03:00
Jani Nikula
d451c5bff5
drm/i915: add vlv_clock_get_cdclk()
...
Add vlv_clock_get_cdclk() helper to hide the details from the callers.
For now, this means running vlv_get_hpll_vco() twice in vlv_get_cdclk(),
but this will be improved later.
v2: Rebase
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com >
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://lore.kernel.org/r/fc93ccf998300048432d18ce7e8690bd54e1e18d.1757688216.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-09-17 11:29:09 +03:00
Jani Nikula
9c2f799255
drm/i915: add vlv_clock_get_hrawclk()
...
Add vlv_clock_get_hrawclk() helper to hide the details from the callers.
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com >
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://lore.kernel.org/r/ad3c3d0baf16eb0ef3a0ac3edfbab327c564e743.1757688216.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-09-17 11:29:06 +03:00
Jani Nikula
8c2833ff1d
drm/i915: add vlv_clock_get_czclk()
...
Add vlv_clock_get_czclk() helper to avoid looking at i915->czclk_freq
directly.
Reviewed-by: Mika Kahola <mika.kahola@intel.com >
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com >
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://lore.kernel.org/r/4885f6e486a31c773a3bfebd6936670234e57bd0.1757688216.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-09-17 11:29:05 +03:00
Jani Nikula
7d11281178
drm/i915: do cck get/put inside vlv_get_cck_clock()
...
Move towards VLV/CHV clock interfaces that handle sideband get/put
inside them instead of at the caller.
With this, we can switch to the simpler vlv_punit_get()/vlv_punit_put()
in vlv_get_cdclk().
We'll need to move vlv_init_gpll_ref_freq() outside of the existing
get/put in vlv_rps_init() and chv_rps_init().
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://lore.kernel.org/r/480b654b6c736a03343dfd17eb130c39fd82c637.1757688216.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-09-17 11:27:57 +03:00
Jani Nikula
c8cf6e3cc2
drm/i915: do cck get/put inside vlv_get_hpll_vco()
...
Move towards VLV/CHV clock interfaces that handle sideband get/put
inside them instead of at the caller.
We'll need to move the calls outside of existing get/put.
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com >
Link: https://lore.kernel.org/r/1a6553f54619275aa05512421e19115a71cd3eb0.1757688216.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-09-17 11:27:37 +03:00
Jani Nikula
032a3bd4d6
drm/i915/cdclk: use generic poll_timeout_us() instead of wait_for()
...
Prefer generic poll helpers over i915 custom helpers.
The functional change is losing the exponentially growing sleep of
wait_for(), which used to be 10, 20, 40, ..., 640, and 1280 us.
Use an arbitrary constant 500 us sleep instead. The timeout remains at
50 ms.
Reviewed-by: Jouni Högander <jouni.hogander@intel.com >
Link: https://lore.kernel.org/r/6d50031411d5517508867d4b595ce90a2b44073b.1756383233.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-09-04 14:02:58 +03:00
Jani Nikula
e0b1bbed5e
drm/i915/dram: add intel_fsb_freq() and use it
...
Add a more generic intel_fsb_freq() function instead of platform
specific ones.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://lore.kernel.org/r/c5b77311c5f64b7163c86a042b7d023c07a685e2.1755511595.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-08-19 11:20:40 +03:00
Jani Nikula
39896c5294
drm/i915/display: use drm->debugfs_root for creating debugfs files
...
Since commit 0b30d57aca ("drm/debugfs: rework debugfs directory
creation v5") we should be using drm->debugfs_root instead of
minor->debugfs_root for creating debugfs files.
As a rule of thumb, use a local variable when there are two or more
uses, otherwise just have the single reference inline.
Drop drm/drm_file.h include where possible.
Reviewed-by: Luca Coelho <luciano.coelho@intel.com >
Link: https://lore.kernel.org/r/e8268546ec2a2941a3dc43c2fdc60f678dc03fce.1753782998.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-08-07 11:30:26 +03:00
Jani Nikula
4274a2b756
drm/xe/compat: stop including i915_utils.h from compat i915_drv.h
...
Expose the places that need i915_utils.h, and include it where needed.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Link: https://lore.kernel.org/r/6338c8524e600e048b56c5484624cfb51ed49d1d.1753965351.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-08-04 11:13:07 +03:00
Jani Nikula
cc2cce4a8a
drm/i915/cdclk: use intel_de_wait_custom() instead of wait_for_us()
...
Prefer the register read specific wait function over i915 wait_for_us().
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com >
Link: https://lore.kernel.org/r/fadd74e9450afff5e32bf921b192f19ea1629fff.1753956266.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-08-01 11:37:10 +03:00
Jani Nikula
9807aba1ea
drm/i915/cdclk: make struct intel_cdclk_state opaque
...
With all the code touching struct intel_cdclk_state moved inside
intel_cdclk.c, we move the struct definition there too, and make the
type opaque. This nicely reduces includes from intel_cdclk.h.
Reviewed-by: Imre Deak <imre.deak@intel.com >
Link: https://lore.kernel.org/r/2b58c52e8cbcb66a48ecd4a1453e49dc7bd66289.1750847509.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-06-26 11:55:54 +03:00
Jani Nikula
79be2da5d1
drm/i915/cdclk: abstract intel_cdclk_actual() and intel_cdclk_actual_voltage_level()
...
Add intel_cdclk_actual() and intel_cdclk_actual_voltage_level() helpers
to avoid looking at struct intel_cdclk_state internals outside of
intel_cdclk.c.
v2: Better location (Imre)
Reviewed-by: Imre Deak <imre.deak@intel.com >
Link: https://lore.kernel.org/r/241a9b80a8262b82fded54707ca5622af215dd86.1750847509.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-06-26 11:55:54 +03:00
Jani Nikula
f0bb81b275
drm/i915/cdclk: abstract intel_cdclk_read_hw()
...
Add intel_cdclk_read_hw() function to avoid looking at struct
intel_cdclk_state internals outside of intel_cdclk.c.
intel_cdclk_init_hw() would be a better name, but we already have that.
Reviewed-by: Imre Deak <imre.deak@intel.com >
Link: https://lore.kernel.org/r/ef720d37bfeee933d59b64e382dc976f3c9fade1.1750847509.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-06-26 11:55:54 +03:00
Jani Nikula
082fe699af
drm/i915/cdclk: abstract intel_cdclk_force_min_cdclk()
...
Add intel_cdclk_force_min_cdclk() helper to avoid modifying struct
intel_cdclk_state internals outside of intel_cdclk.c.
Reviewed-by: Imre Deak <imre.deak@intel.com >
Link: https://lore.kernel.org/r/0bf8a94a1a7d3ac564406ba427d12c4c8eefb5bb.1750847509.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-06-26 11:55:54 +03:00
Jani Nikula
f6d8b2261a
drm/i915/cdclk: abstract intel_cdclk_pmdemand_needs_update()
...
Add intel_cdclk_pmdemand_needs_update() helper to avoid looking at
struct intel_cdclk_state internals outside of intel_cdclk.c.
Reviewed-by: Imre Deak <imre.deak@intel.com >
Link: https://lore.kernel.org/r/d0d4f073707a2badb432187f6e02d6d7f9fe431b.1750847509.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-06-26 11:55:54 +03:00
Jani Nikula
3fda3bf0a6
drm/i915/cdclk: abstract intel_cdclk_bw_min_cdclk()
...
Add intel_cdclk_bw_min_cdclk() helper to avoid looking at struct
intel_cdclk_state internals outside of intel_cdclk.c.
Reviewed-by: Imre Deak <imre.deak@intel.com >
Link: https://lore.kernel.org/r/d07499174ebe55fa8fb98d4cb5ff541b6f5ec95b.1750847509.git.jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com >
2025-06-26 11:55:54 +03:00