Alexander Usyskin
3e9c49d4c3
mtd: intel-dg: wake card on operations
...
The Intel DG cards do not have separate power control for
persistent memory.
The memory is available when the whole card is awake.
Enable runtime PM in mtd driver to notify parent graphics driver
that whole card should be kept awake while nvm operations are
performed through this driver.
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com >
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com >
2025-10-28 17:24:49 +01:00
Reuven Abliyev
a1c940cbf5
drm/xe/nvm: add support for non-posted erase
...
Erase command is slow on discrete graphics storage
and may overshot PCI completion timeout.
BMG introduces the ability to have non-posted erase.
Add driver support for non-posted erase with polling
for erase completion.
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Signed-off-by: Reuven Abliyev <reuven.abliyev@intel.com >
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com >
Link: https://lore.kernel.org/r/20250617145159.3803852-9-alexander.usyskin@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2025-06-23 13:14:50 -04:00
Alexander Usyskin
4b93f5fc3b
mtd: intel-dg: align 64bit read and write
...
GSC NVM controller HW errors on quad access overlapping 1K border.
Align 64bit read and write to avoid readq/writeq over 1K border.
Reviewed-by: Raag Jadav <raag.jadav@intel.com >
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com >
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com >
Link: https://lore.kernel.org/r/20250617145159.3803852-6-alexander.usyskin@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2025-06-23 13:14:49 -04:00
Alexander Usyskin
044c8be05a
mtd: intel-dg: register with mtd
...
Register the on-die nvm device with the mtd subsystem.
Refcount nvm object on _get and _put mtd callbacks.
For erase operation address and size should be 4K aligned.
For write operation address and size has to be 4bytes aligned.
CC: Rodrigo Vivi <rodrigo.vivi@intel.com >
CC: Lucas De Marchi <lucas.demarchi@intel.com >
Reviewed-by: Raag Jadav <raag.jadav@intel.com >
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com >
Co-developed-by: Tomas Winkler <tomasw@gmail.com >
Signed-off-by: Tomas Winkler <tomasw@gmail.com >
Co-developed-by: Vitaly Lubart <lubvital@gmail.com >
Signed-off-by: Vitaly Lubart <lubvital@gmail.com >
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com >
Link: https://lore.kernel.org/r/20250617145159.3803852-5-alexander.usyskin@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2025-06-23 13:14:49 -04:00
Alexander Usyskin
9fe53abfac
mtd: intel-dg: implement access functions
...
Implement read(), erase() and write() functions.
CC: Lucas De Marchi <lucas.demarchi@intel.com >
CC: Rodrigo Vivi <rodrigo.vivi@intel.com >
Reviewed-by: Raag Jadav <raag.jadav@intel.com >
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com >
Co-developed-by: Tomas Winkler <tomasw@gmail.com >
Signed-off-by: Tomas Winkler <tomasw@gmail.com >
Co-developed-by: Vitaly Lubart <lubvital@gmail.com >
Signed-off-by: Vitaly Lubart <lubvital@gmail.com >
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com >
Link: https://lore.kernel.org/r/20250617145159.3803852-4-alexander.usyskin@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2025-06-23 13:14:49 -04:00
Alexander Usyskin
7234b321dd
mtd: intel-dg: implement region enumeration
...
In intel-dg, there is no access to the spi controller,
the information is extracted from the descriptor region.
CC: Lucas De Marchi <lucas.demarchi@intel.com >
Reviewed-by: Raag Jadav <raag.jadav@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com >
Co-developed-by: Tomas Winkler <tomasw@gmail.com >
Signed-off-by: Tomas Winkler <tomasw@gmail.com >
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com >
Link: https://lore.kernel.org/r/20250617145159.3803852-3-alexander.usyskin@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2025-06-23 13:14:49 -04:00
Alexander Usyskin
ceb5ab3cb6
mtd: add driver for intel graphics non-volatile memory device
...
Add auxiliary driver for intel discrete graphics
non-volatile memory device.
CC: Lucas De Marchi <lucas.demarchi@intel.com >
Reviewed-by: Raag Jadav <raag.jadav@intel.com >
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com >
Co-developed-by: Tomas Winkler <tomasw@gmail.com >
Signed-off-by: Tomas Winkler <tomasw@gmail.com >
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com >
Link: https://lore.kernel.org/r/20250617145159.3803852-2-alexander.usyskin@intel.com
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com >
2025-06-23 13:14:49 -04:00
