Linux 3.10-rc7
The sdvo lvds fix in this -fixes pull
commit c3456fb3e4
Author: Daniel Vetter <daniel.vetter@ffwll.ch>
Date: Mon Jun 10 09:47:58 2013 +0200
drm/i915: prefer VBT modes for SVDO-LVDS over EDID
has a silent functional conflict with
commit 990256aec2
Author: Ville Syrjälä <ville.syrjala@linux.intel.com>
Date: Fri May 31 12:17:07 2013 +0000
drm: Add probed modes in probe order
in drm-next. W simply need to add the vbt modes before edid modes, i.e. the
other way round than now.
Conflicts:
drivers/gpu/drm/drm_prime.c
drivers/gpu/drm/i915/intel_sdvo.c
This commit adds checking whether clock-frequency property acquisition
has succeeded. If not, the frequency is set to 100kHz by default.
The Device Tree binding documentation is updated accordingly.
Based on the intials patches from Zbigniew Bodek
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Zbigniew Bodek <zbb@semihalf.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
From Daniel Tang <dt.tangr@gmail.com>
This is the initial platform code for the TI-Nspire graphing
calculators. The platform support is rather unspectacular, but still
contains platform data for the LCD panel, which will get removed once
there is a DT binding for the AMBA CLCD driver.
* nspire/soc:
arm: Add Initial TI-Nspire support
arm: Add device trees for TI-Nspire hardware
Signed-off-by: Olof Johansson <olof@lixom.net>
From Kukjin Kim, this adds pinctrl support for Exynos 5420.
* tag 'soc-exynos5420-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
pinctrl: exynos: add exynos5420 SoC specific data
ARM: dts: add pinctrl support to EXYNOS5420
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch add pinctrl support to ST SoCs.
About hardware:
ST Set-Top-Box parts have two blocks called PIO and PIO-mux which handle
pin configurations.
Each multi-function pin is controlled, driven and routed through the PIO
multiplexing block. Each pin supports GPIO functionality (ALT0) and
multiple alternate functions(ALT1 - ALTx) that directly connect the pin
to different hardware blocks. When a pin is in GPIO mode, Output Enable
(OE), Open Drain(OD), and Pull Up (PU) are driven by the related PIO
block. Otherwise the PIO multiplexing block configures these parameters
and retiming the signal.
About driver:
This pinctrl driver manages both PIO and PIO-mux block using pinctrl,
pinconf, pinmux, gpio subsystems. All the pinctrl related config
information can only come from device trees.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mark Brown <broonie@linaro.org>
Some options currently take arguments in unspecified driver-specific units.
As pointed out by Stephen Warren, driver specific values should not be part
of generic devicetree bindings describing the hardware.
Therefore remove the critical bindings again, before they become part of
an official release.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
As the binding for slew-rate is under discussion and seems to need
more tought it will get removed for now, so it doesn't get an offical
release.
Therefore remove it again from the only current user, tz1090.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Currently the debounce time pinconfig option uses an unspecified
"time units" unit. As pinconfig options should use SI units and a
real unit is also necessary for generic dt bindings, change it
to usec. Currently no driver is using the generic pinconfig option
for this, so the unit change is safe to do.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
PULL_PIN_DEFAULT is meant for hardware completely hiding any pull
settings from the driver, so that it's really only possible to turn
the pull on or off, but it not being possible to determine any
pull settings from software.
Also the binding-documentation for the pull arguments did not match
the changes to the expected values.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch adds new regulator driver to support max77693 chip's regulators.
max77693 has two linear voltage regulators and one current regulator which
can be controlled through I2C bus. This driver also supports device tree.
Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: Myungjoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The ADAU1701 has 12 pins that can be configured depending on the system
configuration. Allow settting the corresponding registers from DT.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
The ADAU1701 has 2 hardware pins to configure the PLL mode in accordance
to the MCLK-to-LRCLK ratio. These pins have to be stable before the chip
is released from reset, and a full reset cycle, including a new firmware
download is needed whenever they change.
This patch adds GPIO properties to the DT bindings of the Codec, and
implements makes the set_sysclk memorize the configured sysclk.
Because the run-time parameters are unknown at probe time, the first
firmware download is postponed to the first hw_params call, when the
driver can determine the mclk/lrclk divider. Subsequent downloads
are only issued when the divider configuration changes.
Signed-off-by: Daniel Mack <zonque@gmail.com>
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@linaro.org>
The TAS5086 has two alternative modes to start its PWM channels, Mid-Z
and Low-Z. Which one to use depends on how the PWM power stages are
connected to the TAS5086.
This patch adds 6 optional boolean properties to the DT bindings of the
driver which allow the user to configure each individual channel to the
Mid-Z scheme, and leaves all the others to the default (Low-Z).
Signed-off-by: Daniel Mack <zonque@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
The Interlaken is a narrow, high speed channelized chip-to-chip interface. To
facilitate interoperability between a data path device and a look-aside
co-processor, the Interlaken Look-Aside protocol is defined for short
transaction-related transfers. Although based on the Interlaken protocol,
Interlaken Look-Aside is not directly compatible with Interlaken and can be
considered a different operation mode.
The Interlaken LA controller connects internal platform to Interlaken serial
interface. It accepts LA command through software portals, which are system
memory mapped 4KB spaces. The LA commands are then translated into the
Interlaken control words and data words, which are sent on TX side to TCAM
through SerDes lanes.
Signed-off-by: Joe Liccese <joe.liccese@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Add a pin control driver for the TZ1090's low power pins via the
powerdown controller SOC_GPIO_CONTROL registers.
These pins have individually controlled pull-up, and group controlled
schmitt, slew-rate, drive-strength, and power-on-start (pos).
The pdc_gpio0 and pdc_gpio1 pins can also be muxed onto the
ir_mod_stable_out and ir_mod_power_out functions respectively. If no
function is set they remain in GPIO mode. These muxes can be overridden
by requesting them as GPIOs.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Rob Landley <rob@landley.net>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: linux-doc@vger.kernel.org
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
From Sekhar Nori:
DaVinci SoC updates for v3.11 - part 2
This pull request adds DT and runtime PM to
EDMA ARM private API so it can be used on
DT enabled DaVinci and OMAP platforms.
Also adds DMA channel crossbar mapping
support to be used by DT-enabled platforms
which use it.
* tag 'davinci-for-v3.11/soc-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
dmaengine: edma: enable build for AM33XX
ARM: edma: Add EDMA crossbar event mux support
ARM: edma: Add DT and runtime PM support to the private EDMA API
dmaengine: edma: Add TI EDMA device tree binding
ARM: edma: Convert to devm_* api
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This patch adds primitive DT support to the max8973 regulator driver. None
of the configuration parameters, supported in the platform data are yet
available in DT, therefore no configuration is performed if booting with
no platform data. This means, that DT instantiation can only be used on
boards, where no run-time configuration of the chip is required. In such
cases the driver can be used to scale its output voltage. In the future
support for configuration parameters should be added.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
We use the same way to define pin muxing and pin configuration
than for nomadik. So pickup code from pinctrl_nomadik.c to be
able to implement pin multiplexing and pin configuration using
the device tree. Pin configuration uses generic parsing code.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The binding definition is based on the generic DMA controller
binding.
Joel:
* Droped reserved and queue DT entries from Documentation
for now from the original patch series (v10)
* Included properties in Documentation and clarified DMA properties (V11)
* Made ti,hwmod option
* Clarified DMA entries
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Matt Porter <mporter@ti.com>
Signed-off-by: Joel A Fernandes <joelagnel@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
This patch adds device trees for describing the TI-Nspire hardware.
Changes between v1 and v2:
* Change "keymap" binding to the standard "linux,keymap" binding.
Signed-off-by: Daniel Tang <dt.tangr@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Christian Daudt:
* 'armsoc/for-3.11/dt' of git://github.com/broadcom/bcm11351:
ARM: dts: bcm281xx: change comment to C89 style
ARM: mmc: bcm281xx SDHCI driver (dt mods)
ARM: dts: bcm281xx: use existing defines for irqs
ARM: dts: bcm281xx: use #include for device tree files
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Simon Horman:
Second Round of Renesas ARM-based SoC DT updates for v3.11
* Increased DT coverage for renesas-intc-irqpin
by Guennadi Liakhovetski
* Clean up of address format used in sh73a0 dtsi file
by Guennadi Liakhovetski
* tag 'renesas-dt2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: irqpin: add a DT property to enable masking on parent
ARM: shmobile: sh73a0: remove "0x" prefix from DT node names
irqchip: renesas-intc-irqpin: DT binding for sense bitfield width
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Simon Horman:
Second Round of Renesas ARM based SoC GPIO R-Car updates for v3.11
Documentation enhancement and code cleanup by Laurent Pinchart.
* tag 'renesas-gpio-rcar2-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
gpio-rcar: Remove #ifdef CONFIG_OF around OF-specific sections
gpio-rcar: Reference core gpio documentation in the DT bindings
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Kukjin Kim:
based on tags/common-clk-audio
- add support for exynos5420 SoC
* tag 'soc-exynos5420-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: EXYNOS: extend soft-reset support for EXYNOS5420
ARM: EXYNOS: add secondary CPU boot base location for EXYNOS5420
clocksource: exynos_mct: use (request/free)_irq calls for local timer registration
ARM: dts: Add initial device tree support for EXYNOS5420
clk: exynos5420: register clocks using common clock framework
ARM: EXYNOS: use four additional chipid bits to identify EXYNOS family
serial: samsung: select EXYNOS specific driver data if ARCH_EXYNOS is defined
ARM: EXYNOS: Add support for EXYNOS5420 SoC
ARM: dts: list the CPU nodes for EXYNOS5250
ARM: dts: fork out common EXYNOS5 nodes
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Heiko Stuebner:
Adds basic support for Rockchip Cortex-A9 SoCs.
* tag 'v3.11-rockchip-basics' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm: add basic support for Rockchip RK3066a boards
arm: add debug uarts for rockchip rk29xx and rk3xxx series
arm: Add basic clocks for Rockchip rk3066a SoCs
clocksource: dw_apb_timer_of: use clocksource_of_init
clocksource: dw_apb_timer_of: select DW_APB_TIMER
clocksource: dw_apb_timer_of: add clock-handling
clocksource: dw_apb_timer_of: enable the use the clocksource as sched clock
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The LP55xx DT structure is applicable to the LP5562 device.
The driver and documentation are updated.
Compatible property of the DT
: LP5521 and LP5223 were manufactured by National Semiconductor.
LP5562 is a new device from Texas Instruments.
Cc: Gabriel Fernandez <gabriel.fernandez@stericsson.com>
Signed-off-by: Milo(Woogyom) Kim <milo.kim@ti.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bryan Wu <cooloney@gmail.com>
Currently, the LP55xx DT structure supports max 3 channels.
However, LP5523 has max 9 channels and LP5562 has 4 channels.
To enhance this constraint, the DT structure has been changed.
(a) Use the child node for various channel settings instead of fixed array
(b) Remove 'num_channel' property.
This value can be retrieved by counting the children node.
(c) 'chan-name' property supported
(d) Documentation updates for LP5521 and LP5523
(cooloney@gmail.com: fix a coding style issue in leds-lp55xx.txt)
Cc: Gabriel Fernandez <gabriel.fernandez@stericsson.com>
Signed-off-by: Milo(Woogyom) Kim <milo.kim@ti.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Bryan Wu <cooloney@gmail.com>
This patch allows the lp5521 driver to be successfully probed and
initialised when Device Tree support is enabled.
Based on a patch by Gabriel Fernandez, rewritten in accordance
with review feedback.
Cc: Gabriel Fernandez <gabriel.fernandez@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Milo Kim <milo.kim@ti.com>
Signed-off-by: Bryan Wu <cooloney@gmail.com>
This adds basic support for gate-clocks on Rockchip SoCs.
There are 16 gates in each register and use the HIWORD_MASK
mechanism for changing gate settings.
The gate registers form a continuos block which makes the dt node
structure a matter of taste, as either all 160 gates can be put into
one gate clock spanning all registers or they can be divided into
the 10 individual gates containing 16 clocks each.
The code supports both approaches.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Add SDHCI bindings for the Broadcom 281xx SoCs.
Changes from V2:
- Documentation cleanups
Changes from V1:
- split original patch into 2, one for driver and this one for dt
Signed-off-by: Christian Daudt <csd@broadcom.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
From Kukjin Kim:
based on exynos-dt-2 and s3c24xx-dt-2
- use #include for all Samsung DT
- add clk for exynos audio subsystem (audss) and i2s
- support audss and i2s for exynos5250
* tag 'common-clk-audio' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
clk: exynos5250: Add enum entries for divider clock of i2s1 and i2s2
ARM: dts: Update Samsung I2S documentation
ARM: dts: add clock provider information for i2s controllers in Exynos5250
ARM: dts: add Exynos audio subsystem clock controller node
clk: samsung: register audio subsystem clocks using common clock framework
ARM: dts: use #include for all device trees for Samsung
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Kukjin Kim:
2nd exynos dt update based on tags/exynos-dt-1
- enable RTC on exynos5250 snow and Arndale boards
- add support LCD and PWM for exynos4210 Origen board
- update bootargs to support 8GiB for exynos5440 SSDK5440 and SD5v1 boards
- enable spi and add opp level for exynos5440
- add example doc for samsung-pinctrl dt bindings
* tag 'exynos-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Set BUCK7 as always on for Origen board
ARM: dts: Add FIMD node to Origen4210 board
ARM: dts: Add LCD related pinctrl entries for exynos4210
ARM: dts: Add PWM related pinctrl entries for exynos4210
Documentation: Add examples to samsung-pinctrl device tree bindings documentation
ARM: dts: Enable RTC node for exynos5250-snow
ARM: dts: Enable RTC node for Arndale
ARM: dts: Removing pdma for exynos5440
ARM: dts: update bootargs to support 8GiB for SSDK5440 and SD5v1
ARM: dts: Add more opp levels in exynos5440
ARM: dts: Add wm8994 regulator support on smdk5250
ARM: dts: enable spi for EXYNOS5440 SOC
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Tony Lindgren:
PM voltage domain clean-up via Kevin Hilman <khilman@linaro.org>:
OMAP: PM: remove requirement for voltage domain data; remove dummy data
* tag 'omap-for-v3.11/pm-voltdomain-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: AM33xx: Remove the unused voltagedomain data
ARM: OMAP2+: Powerdomain: Remove the need to always have a voltdm associated to a pwrdm
Includes an update to Linux 3.10-rc6.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
From Linus Walleij:
Nomadik DT and clock work:
- Lee Jones' pinctrl compat ontology patches
- A real clock driver for the Nomadik, 100% DT-based
- Device tree changes for the Nomadik clocks
* tag 'nomadik-dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: nomadik: add the new clocks to the device tree
clk: nomadik: implement the Nomadik clocks properly
pinctrl/nomadik: Standardise Pinctrl compat string for Nomadik based platforms
ARM: nomadik: Standardise Nomadik STN8815 based Pinctrl compat string in the DTS
Conflicts:
arch/arm/boot/dts/ste-nomadik-s8815.dts
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
