Commit Graph

1557 Commits

Author SHA1 Message Date
Alexandre Courbot
9139227d4c clk: tegra114: correctly output clk_32k
Tegra has a blink timer register that allows to modulate the
clk_32k clock before outputting it. Since clk_32k is presented to the
kernel as a fixed clock, make sure this register does not tamper with
the clock frequency and that clk_32k is outputted as-is, similarly to
what is done on t20 and t30.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-31 12:24:36 -07:00
Prashant Gaikwad
995968e40e clk: tegra: fix clk_out parents list
Number of parents for clk_out_2 and clk_out_3 was incorrectly set
to clk_out1_parents. Even though it did not break anything since the
size was same better to fix.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-31 12:22:00 -07:00
Daniel Tang
7d1818fa66 clk: Add TI-Nspire clock drivers
This patch adds a basic clock driver for the TI-Nspire calculator
series.

Changes from v1:
* Removed filename in header comment
* Removed unnecessary #undef EXTRACT statement

Signed-off-by: Daniel Tang <dt.tangr@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: fixed $SUBJECT and changelog max width]
2013-05-31 12:07:45 -07:00
Fabio Estevam
d68c380590 clk: mxs: Include clk mxs header file
Fix the following sparse warnings:

drivers/clk/mxs/clk-imx28.c:72:5: warning: symbol 'mxs_saif_clkmux_select' was not declared. Should it be static?
drivers/clk/mxs/clk-imx28.c:156:12: warning: symbol 'mx28_clocks_init' was not declared. Should it be static?

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: fixed $SUBJECT line]
2013-05-30 18:27:24 -07:00
Jingoo Han
c0431037b4 clk: use platform_{get,set}_drvdata()
Use the wrapper functions for getting and setting the driver data using
platform_device instead of using dev_{get,set}_drvdata() with &pdev->dev,
so we can directly pass a struct platform_device.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-30 18:19:34 -07:00
Tang Yuantian
4bcccf193d clk: mpc85xx: Update the compatible string
The compatible string of clock is changed from *-2 to *-2.0
on chassis 2. So updated it accordingly.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: improved $SUBJECT line]
2013-05-30 11:55:35 -07:00
Tony Prisk
419e321df8 clk: vt8500: Fix unbalanced spinlock in vt8500_dclk_set_rate()
With the addition of a DVO clock, a bug is now evident in the vt8500
clock code:
[    0.290000] WARNING: at init/main.c:698 do_one_initcall+0x158/0x18c()
[    0.300000] initcall wm8505fb_driver_init+0x0/0xc returned with disabled int

This is caused by an unbalanced spinlock in vt8500_dclk_set_rate().
Replace the second call to spin_lock_irqsave() with spin_unlock_irqrestore().

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-29 16:13:58 -07:00
Giacomo A. Catenazzi
61fd58dc57 clk: sunxi: "cpu_data" is defined in header files of some architectures
In some architectures, the #define cpu_data is not a "macro-function",
so the compiler will substitute the identifier with probably something
wrong.

Signed-off-by: Giacomo A. Catenazzi <cate@cateee.net>
Signed-off-by: Emilio López <emilio@elopez.com.ar>
[emilio@elopez.com.ar: use cpu_mux_data instead of this_cpu_data]
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-29 15:48:23 -07:00
Tushar Behera
0e56523fd7 clk: exynos5250: Add sclk_mpll to the parent list of mout_cpu clock
'mout_mpll' is added the list of parent clocks for 'mout_cpu'.
'mout_mpll' is an alias to the clock 'sclk_mpll'. Hence 'sclk_mpll'
should be added to the list of parent clocks.

This results in an error when cpufreq driver for EXYNOS5250 tries to
set 'mout_mpll' as a parent for 'mout_cpu'.

clk_set_parent: clk sclk_mpll can not be parent of clk mout_cpu

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-29 15:39:28 -07:00
Tushar Behera
37351fd562 clk: exynos5250: Update cpufreq related clocks for EXYNOS5250
cpufreq driver for EXYNOS5250 is not a platform driver, hence we cannot
currently pass the clock names through a device tree node. Instead, we
need to make them available through a global alias.

cpufreq driver for EXYNOS5250 requires four clocks - 'armclk',
'mout_cpu', 'mout_mpll' and 'mout_apll'.

'armclk' has already been defined with an alias, 'mout_cpu', 'mout_mpll'
and 'mout_apll' are now defined with an alias.

Signed-off-by: Tushar Behera <tushar.behera@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-29 15:39:17 -07:00
Marek Belisko
6532cb71fb clk: si5351: Set initial clkout rate when defined in platform data.
clock-frequency property from platform data was read but never used.
Apply defined rate when clock is registered.

Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: add missing changelog]
Cc: stable@kernel.org

Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-29 15:09:24 -07:00
Marek Belisko
67e1e2268e clk: si5351: Fix clkout rate computation.
Rate was incorrectly computed because we read from wrong divider register.

Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Cc: stable@kernel.org
2013-05-29 15:09:15 -07:00
Tony Prisk
65f2c58f0f clk: vt8500: Remove unnecessary divisor adjustment in vtwm_dclk_set_rate()
The divisor adjustment code to ensure that a divisor is not rounded down,
thereby giving a rate higher than requested, is unnecessary and in some
instances results in the actual rate being much lower than requested due to
rounding errors.

The test is already performed in vtwm_dclk_round_rate(), which is always
called when clk_set_rate is called. Due to rounding errors in the line:
divisor = parent_rate / rate (clk-vt8500.c:160) we will sometimes end up
adjusting the divisor twice - first in round_rate and then again in set_rate.

This patch removes the test/adjustment in vtwm_dclk_set_rate.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-29 14:47:17 -07:00
Tony Prisk
518d4709f1 clk: vt8500: Add support for clocks on the WM8850 SoCs
The WM8850 has a different PLL clock to the previous versions. This
patch adds support for the WM8850-style PLL clocks.

Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-29 14:47:05 -07:00
Sebastian Hesselbarth
ea7e0bd7e7 clk: mvebu: disintegrate obsolete file
Switch from function-centric to soc-centric clock drivers now makes
a bunch of files obsolete. This deletes all files and Kconfig options
that are not required anymore.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:28:29 +00:00
Sebastian Hesselbarth
68be12bda2 clk: mvebu: add Armada XP SoC-centric clock init
This is moving core clock and clock gating init for Armada XP to
its own file and adds a Kconfig option. Also init functions are added
and declared so they get called on of_clk_init.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:20:59 +00:00
Sebastian Hesselbarth
6b72333d5b clk: mvebu: add Armada 370 SoC-centric clock init
This is moving core clock and clock gating init for Armada 370 to
its own file and adds a Kconfig option. Also init functions are added
and declared so they get called on of_clk_init.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:20:51 +00:00
Sebastian Hesselbarth
e89406c957 clk: mvebu: add Kirkwood SoC-centric clock init
This is moving core clock and clock gating init for Kirkwood to its
own file and adds a Kconfig option. Also init functions are added and
declared so they get called on of_clk_init.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:20:38 +00:00
Sebastian Hesselbarth
5d8401668e clk: mvebu: add Dove SoC-centric clock init
This is moving core clock and clock gating init for Dove to its own
file and adds a Kconfig option. Also init functions are added and
declared so they get called on of_clk_init.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:20:30 +00:00
Sebastian Hesselbarth
a45184099a clk: mvebu: add common clock functions for core clk and clk gating
Based on the current common functions for core clocks and clock
gating control, new common functions are joined in a single file.
Given the opportunity, names of functions and structs are unified,
and also a Kconfig entry is added.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:20:22 +00:00
Sebastian Hesselbarth
29020c9a40 clk: mvebu: introduce per-clock-gate flags
Clock gates found on MVEBU SoCs get registered by a common function.
To allow specific SoCs to provide tweaks introduce flags to the clock
gate descriptor instead of filling up the common function SoC specific
tweaks.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-29 19:20:04 +00:00
Sylwester Nawrocki
056f3d58db clk: samsung: Add CLK_IGNORE_UNUSED flag for the sysreg clocks
Currently no driver *) handles the sysreg clock, with an assumption
that this clock is always left in its default state (enabled).

Before commit 6e6aac7590
ARM: EXYNOS: Migrate clock support to common clock framework

the sysreg clock was not even defined and hence wasn't handled
explicitly in the kernel.

To restore the previous behaviour disable masking the sysreg clock
off in the clock core by default.

*) Except the Exynos4x12 FIMC-IS driver, which will be modified
   to not touch the sysreg clock.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-29 11:52:19 -07:00
Fabio Baltieri
f586938ba2 clk: ux500: clk-sysctrl: handle clocks with no parents
Fix clk_reg_sysctrl() to set main clock registers of new struct
clk_sysctrl even if the registered clock has no parents.

This fixes an issue where "ulpclk" was registered with all clk->reg_*
fields uninitialized, causing a -EINVAL error from clk_prepare().

Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-29 11:52:18 -07:00
Lee Jones
dd47044803 clk: ux500: Provide device enumeration number suffix for SMSC911x
First Ethernet device has a ".0" appended onto the device name. It
appears that we need this in order to obtain the correct clock.

Without this fix Ethernet does not function on Ux500 devices, which is a
regression.

Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: improved changelog]
2013-05-29 11:52:18 -07:00
Saravana Kannan
d41d580587 clk: Disable unused clocks after deferred probing is done
With deferred probing, late_initcall() is too soon to declare a clock as
unused. Wait for deferred probing to finish before declaring a clock as
unused. Since deferred probing is done in late_initcall(), do the unused
check to late_initcall_sync.

Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-29 00:52:20 -07:00
Axel Lin
bcc7fd20e2 clk: wm831x: Fix wm831x_clkout_get_parent
Current code looks strange because calling wm831x_clkout_set_parent() with 0 as
parent parameter, wm831x_clkout_get_parent() will return 1.

According to the datasheet:
R16528 (4090h) Clock Control1
        BIT 0: CLKOUT output source select
                0 = FLL output
                1 = 32.768kHz oscillator

Thus fix the entry order in wm831x_clkout_parents[] to make it has
the same meaning as the datasheet and make the return value
of wm831x_clkout_get_parent() consistent with the parent pass to
wm831x_clkout_set_parent().

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-28 23:50:52 -07:00
Axel Lin
6f8b314583 clk: wm831x: Fix update wrong register for enable/disable FLL
According to the datasheet, FLL Enable is controlled by
R16530 (4092h) FLL Control1
        BIT 0: FLL Enable
                0 = Disable
                1 = Enable

Thus the code should update WM831X_FLL_CONTROL_1 register rather than
WM831X_FLL_CONTROL_2 register.

Also fixes a trivial typo in dev_crit message.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-28 23:50:31 -07:00
Sebastian Hesselbarth
4564dbdadc clk: si5351: Allow to build without CONFIG_OF
With of_clk_provider stubs for CONFIG_OF not set, we can now also enable
clk-si5351 on those architectures.

Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-28 22:53:22 -07:00
Saravana Kannan
f8aa0bd5c9 clk: Fix race condition between clk_set_parent and clk_enable()
Without this patch, the following race condition is possible.
* clk-A has two parents - clk-X and clk-Y.
* All three are disabled and clk-X is current parent.
* Thread A: clk_set_parent(clk-A, clk-Y).
* Thread A: <snip execution flow>
* Thread A: Grabs enable lock.
* Thread A: Sees enable count of clk-A is 0, so doesn't enable clk-Y.
* Thread A: Updates clk-A SW parent to clk-Y
* Thread A: Releases enable lock.
* Thread B: clk_enable(clk-A).
* Thread B: clk_enable() enables clk-Y, then enabled clk-A and returns.

clk-A is now enabled in software, but not clocking in hardware since the
hardware parent is still clk-X.

The only way to avoid race conditions between clk_set_parent() and
clk_enable/disable() is to ensure that clk_enable/disable() calls don't
require changes to hardware enable state between changes to software clock
topology and hardware clock topology.

The options to achieve the above are:
1. Grab the enable lock before changing software/hardware topology and
   release it afterwards.
2. Keep the clock enabled for the duration of software/hardware topology
   change so that any additional enable/disable calls don't try to change
   the hardware state. Once the topology change is complete, the clock can
   be put back in its original enable state.

Option (1) is not an acceptable solution since the set_parent() ops might
need to sleep.

Therefore, this patch implements option (2).

This patch doesn't violate any API semantics. clk_disable() doesn't
guarantee that the clock is actually disabled. So, no clients of a clock
can assume that a clock is disabled after their last call to clk_disable().
So, enabling the clock during a parent change is not a violation of any API
semantics.

This also has the nice side effect of simplifying the error handling code.

Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
[mturquette@linaro.org: fixed up whitespace issue]
2013-05-28 22:50:32 -07:00
Jean-Francois Moine
9807362bfe clk: si5351: declare all device IDs for module loading
When the si5351 driver is a kernel module, it is loaded into memory
from its i2c device IDs, but not from its DT compatible properties.

This patch declares the i2c device IDs of all chip variants.

Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-28 22:50:32 -07:00
Maxime Ripard
4f985b4c80 clk: sun5i: Add compatibles for Allwinner A13
The A13 has a lot less clocks than the one found in the Allwinner A10.
Add these stripped down clocks to the clock driver and in the
documentation.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Emilio López <emilio@elopez.com.ar>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-28 22:50:31 -07:00
Fabio Baltieri
20faa59e0f clk: ux500: abx500-clk: rename ux500 audio codec aliases
Change soc-audio related clk_register_clkdev() device names to reflect
the ones actually used in current snd-soc-mop500 and ab8500-codec
drivers.

Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-28 22:50:31 -07:00
Sebastian Hesselbarth
1a0483d2a4 clk: si5351: Allow user to define disabled state for every clock output
This patch adds platform data and DT bindings to allow to overwrite
the stored disabled state for each clock output.

Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-28 22:50:31 -07:00
Tang Yuantian
555eae9735 clk: add PowerPC corenet clock driver support
This adds the clock driver for Freescale PowerPC corenet
series SoCs using common clock infrastructure.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-28 22:50:31 -07:00
Olof Johansson
ff753f43da Merge tag 'nomadik-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
From Linus Walleij:
Device tree patches for the Nomadik machine:
- Move clock registration to the device tree
- Support probing the MTU timer from the device tree
- Register user LED and user key in the device tree
- Update defconfig to account for user LED and user key
- Move pin control mappings to the device tree

* tag 'nomadik-dt-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: nomadik: move the pin configuration to DT
  ARM: nomadik: add led and key for S8815
  ARM: nomadik: register clocksource from device tree
  ARM: nomadik: convert all clocks except timer to dt
  clocksource: nomadik-mtu: support of probe

Signed-off-by: Olof Johansson <olof@lixom.net>
2013-05-27 21:20:17 -07:00
Soren Brinkmann
97c4e87d45 clk: zynq: Remove deprecated clock code
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Rob Landley <rob@landley.net>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-doc@vger.kernel.org
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
2013-05-27 09:21:49 +02:00
Soren Brinkmann
30e1e28598 arm: zynq: Migrate platform to clock controller
Migrate the Zynq platform and its drivers to use the new clock
controller driver.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Jiri Slaby <jslaby@suse.cz>
Cc: linux-serial@vger.kernel.org
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
2013-05-27 09:21:22 +02:00
Soren Brinkmann
0ee52b157b clk: zynq: Add clock controller driver
Add a clock controller driver and documentation.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Rob Landley <rob@landley.net>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-doc@vger.kernel.org
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
2013-05-27 09:21:17 +02:00
Linus Torvalds
27a24cfa04 Merge branch 'fixes' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dma fixes from Vinod Koul:
 "We have two patches from Andy & Rafael fixing the Lynxpoint dma"

* 'fixes' of git://git.infradead.org/users/vkoul/slave-dma:
  ACPI / LPSS: register clock device for Lynxpoint DMA properly
  dma: acpi-dma: parse CSRT to extract additional resources
2013-05-25 20:30:31 -07:00
Joseph Lo
31972fd955 clk: tegra114: implement wait_for_reset and disable_clock for tegra_cpu_car_ops
The conventional CPU hotplug sequence on the other Tegra chips, we will also
clock gate the CPU in tegra_cpu_kill() after the CPU was power gated. For
Tegra114, the flow controller will clock gate the CPU after the power down
sequence. But we still need to implement a empty function for disable_clock
to avoid kernel warning message.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-22 15:19:22 -06:00
Soren Brinkmann
3682af46d5 clk: zynq: Factor out PLL driver
Refactor the PLL driver so it works with the clock controller driver.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
2013-05-21 16:21:35 +02:00
Lucas Stach
6ec3240047 clk: tegra: add ac97 controller clock
AC97 controller clock is hardwired to pll_a_out0.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-05-20 23:24:34 -07:00
Lucas Stach
7e94984495 clk: tegra: remove USB from clk init table
The USB clocks are just clock gates, so no need to set a specific clock.
In fact trying to set a specific clock is just a NOP if the requested
clockrate is the same as those of the parent (clk_m) or will trigger a
WARN_ON() if rates don't match up.

As we are not setting a specific rate, nor activating the clocks at
init, there is no point in keeping the the usb entries in the clock init
table.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-05-20 23:24:34 -07:00
Thomas Petazzoni
a5e69879cf clk: mvebu: add more PCIe clocks for Armada XP
The current revision of the datasheet only mentions the gatable clocks
for the PCIe 0.0, 0.1, 0.2 and 0.3 interfaces, and forgot to mention
the ones for the PCIe 1.0, 1.1, 1.2, 1.3, 2.0 and 3.0
interfaces. After confirmation with Marvell engineers, this patch adds
the missing gatable clocks for those PCIe interfaces.

It also changes the name of the previously existing PCIe gatable
clocks, in order to match the naming using the datasheets.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-20 19:18:44 +00:00
Thomas Petazzoni
fb6638ba43 clk: mvebu: create parent-child relation for PCIe clocks on Armada 370
The Armada 370 has two gatable clocks for each PCIe interface, and we
want both of them to be enabled. We therefore make one of the two
clocks a child of the other, as we did for the sataX and sataXlnk
clocks on Armada XP.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2013-05-20 19:18:43 +00:00
Rafael J. Wysocki
b59cc200ac ACPI / LPSS: register clock device for Lynxpoint DMA properly
The DMA controller in Lynxpoint is enumerated as a regular ACPI device now. To
work properly it is using the LPSS root clock as a functional clock. That's why
we have to register the clock device accordingly to the ACPI ID of the DMA
controller. The acpi_lpss.c module is responsible to do the job.

This patch also removes hardcoded name of the DMA device in clk-lpt.c and the
name of the root clock in acpi_lpss.c.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-05-14 10:23:58 +05:30
Linus Walleij
7690fbb293 ARM: nomadik: register clocksource from device tree
This switches the Nomadik platform to also registering its
clocksource from the device tree, removing unused support
code as we go along.

Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-12 21:49:56 +02:00
Linus Walleij
6e2b07a172 ARM: nomadik: convert all clocks except timer to dt
This moves all Nomadik clocks except the one used for the
timer/clocksource over to the device tree.

Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-05-12 21:49:56 +02:00
Linus Torvalds
bb9055b274 Merge tag 'multiplatform-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull late ARM Exynos multiplatform changes from Arnd Bergmann:
 "These continue the multiplatform support for exynos, adding support
  for building most of the essential drivers (clocksource, clk, irqchip)
  when combined with other platforms.  As a result, it should become
  really easy to add full multiplatform exynos support in 3.11, although
  we don't yet enable it for 3.10.

  The changes were not included in the earlier multiplatform series in
  order to avoid clashes with the other Exynos updates.

  This also includes work from Tomasz Figa to fix the pwm clocksource
  code on Exynos, which is not strictly required for multiplatform, but
  related to the other patches in this set and needed as a bug fix for
  at least one board."

* tag 'multiplatform-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (22 commits)
  ARM: dts: exynops4210: really add universal_c210 dts
  ARM: dts: exynos4210: Add basic dts file for universal_c210 board
  ARM: dts: exynos4: Add node for PWM device
  ARM: SAMSUNG: Do not register legacy timer interrupts on Exynos
  clocksource: samsung_pwm_timer: Work around rounding errors in clockevents core
  clocksource: samsung_pwm_timer: Correct programming of clock events
  clocksource: samsung_pwm_timer: Use proper clockevents max_delta
  clocksource: samsung_pwm_timer: Add support for non-DT platforms
  clocksource: samsung_pwm_timer: Drop unused samsung_pwm struct
  clocksource: samsung_pwm_timer: Keep all driver data in a structure
  clocksource: samsung_pwm_timer: Make PWM spinlock global
  clocksource: samsung_pwm_timer: Let platforms select the driver
  Documentation: Add device tree bindings for Samsung PWM timers
  clocksource: add samsung pwm timer driver
  irqchip: exynos: look up irq using irq_find_mapping
  irqchip: exynos: pass irq_base from platform
  irqchip: exynos: localize irq lookup for ATAGS
  irqchip: exynos: allocate combiner_data dynamically
  irqchip: exynos: pass max combiner number to combiner_init
  ARM: exynos: add missing properties for combiner IRQs
  ...
2013-05-07 11:28:42 -07:00
Linus Torvalds
150a8dcf10 Merge tag 'boards-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC board specific changes (part 1) from Olof Johansson:
 "These changes are all for board specific files.  These used to make up
  a large portion of the ARM changes in the past, but as we are
  generalizing the support and moving to device tree probing, this has
  gotten significantly smaller.

  The only platform actually adding new code here at the moment is
  Renesas shmobile, as they are still busy converting their code to
  device tree and have not come far enough to not need it."

* tag 'boards-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (43 commits)
  ARM: msm: USB_MSM_OTG needs USB_PHY
  ARM: davinci: da850 evm: fix const qualifier placement
  ARM: davinci: da850 board: add remoteproc support
  ARM: pxa: move debug uart code
  ARM: pxa: select PXA935 on saar & tavorevb
  ARM: mmp: add more compatible names in gpio driver
  ARM: pxa: move PXA_GPIO_TO_IRQ macro
  ARM: pxa: remove cpu_is_xxx in gpio driver
  ARM: Kirkwood: update Network Space Mini v2 description
  ARM: Kirkwood: DT board setup for CloudBox
  ARM: Kirkwood: sort board entries by ASCII-code order
  ARM: OMAP: board-4430sdp: Provide regulator to pwm-backlight
  ARM: OMAP: zoom: Use pwm stack for lcd and keyboard backlight
  ARM: OMAP2+: omap2plus_defconfig: Add support for BMP085 pressure sensor
  omap2+: Remove useless Makefile line
  omap2+: Remove useless Makefile line
  ARM: OMAP: RX-51: add missing regulator supply definitions for lis3lv02d
  ARM: OMAP1: fix omap_udc registration
  ARM: davinci: use is IS_ENABLED macro
  ARM: kirkwood: add MACH_GURUPLUG_DT to defconfig
  ...
2013-05-04 12:34:30 -07:00