Currently the documentation for the arch_timer devicetree binding only
lists "arm,armv7-timer".
Add "arm,armv8-timer" to the list of compatible strings.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
This moves over the MMC/SD card support to the device tree probe
path. The special GPIO to bias the card detect line is kept,
but the pin property is moved to the device tree as part of
the MMC/SD card node.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This converts the SMSC91x ethernet controller to use device
tree. The existing solution from the board file, to request the
GPIO triggering the ethernet IRQ from the board file is kept
for the time being, but the GPIO number assignment is moved
over to the device tree.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Support basic device tree boot on the Nomadik. Implement the
support in the cpu file with the intent of deleting the board
files later. At this stage IRQ controllers, system timer,
l2x0 cache, UARTs and thus console boot is fully functional.
Patch out the code adding devices by initcalls for now so
as not to disturb the boot.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This adds the device tree for the Toradex Iris carrier board used
together with a Colibri T20 512MB COM.
The Iris has the following features, in brackets the current status:
- DVI and VGA output through DVI-I connector (DVI-D enabled and tested)
- LVDS output
- 1 USB host port (enabled and tested)
- 1 USB OTG port (enabled)
- 100 MBit Ethernet (enabled and tested)
- 5 UART ports (2 on 10way headers enabled and tested)
- 1 MicroSD Slot (enabled and tested)
- Audio connectors (enabled, only HP out and Line-in tested)
- i2c RTC
- GPIO connector (enabled, only sparsely tested)
- external i2c bus
- 4 PWM out
- analog in
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This adds the device tree include file for the Toradex Colibri T20
Computer on Module (COM). It's only valid for the 512MB RAM version of
the module, as the 256MB version needs different EMC tables and flash
configuration. To make this clear the suffix -512 was added to the board
compatible string.
The Colibri T20 uses a Tegra20 SoC and has onboard USB Ethernet and AC97
sound.
Still some things like onboard NAND support missing, but should be a
good base for further development.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This patch adds support for Tegra30 Beaver board in upstream kernel.
Beaver board is a Tegra30 SoC based development board, it has
following features:
- T30 or T33 SoC (Qual core ARM Cortex A9)
- 2 GB DDR3L
- 16 GB EMMC
- 1 SD slot
- 1 USB Standart A port and 1 USB micro AB port
- PCI-E Gig Ethernet
- Audio input/output
- SATA port
- HDMI output
- UART and JTAG
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
The compatible properties of Tegra SoC based boards or machines need
to be documented. This patch adds these board levle compatible
properties into device tree binding document.
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
From Barry Song, this adds support for a new SoC from CSR; marco. It's
SMP, uses GIC instead of VIC and in general needs a bit of rework of
the platform code for setup, which this branch contains.
* 'marco-timer-cleanup-rebase' of git://gitorious.org/sirfprima2-kernel/sirfprima2-kernel:
ARM: PRIMA2: provide two DEBUG_LL ports for prima2 and marco
ARM: PRIMA2: add new SiRFmarco SMP SoC infrastructures
ARM: PRIMA2: irq: make prima2 irq can work even we enable GIC for Marco
ARM: PRIMA2: rtciobg: it is also compatible with marco
ARM: PRIMA2: rstc: enable the support for Marco
ARM: PRIMA2: mv timer to timer-prima2 as we will add timer-marco
ARM: PRIMA2: initialize l2x0 according to mach from DT
ARM: PRIMA2: enable AUTO_ZRELADDR for SIRF in Kconfig
ARM: PRIMA2: add CSR SiRFmarco device tree .dts
Signed-off-by: Olof Johansson <olof@lixom.net>
SiRFmarco is a dual-core cortex-a9 SMP SoC from CSR. this patch
adds the .dtsi and a basic evb board .dts for it.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
This patch adds support for the WM8750 (ARMv6) and WM8850 (ARMv7).
Devicetree documentation is updated for new SoCs.
Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
This patch adds a new devicetree binding for describing PSCI firmware
to Linux.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Pull MTD updates from David Woodhouse:
- Various cleanups especially in NAND tests
- Add support for NAND flash on BCMA bus
- DT support for sh_flctl and denali NAND drivers
- Kill obsolete/superceded drivers (fortunet, nomadik_nand)
- Fix JFFS2 locking bug in ENOMEM failure path
- New SPI flash chips, as usual
- Support writing in 'reliable mode' for DiskOnChip G4
- Debugfs support in nandsim
* tag 'for-linus-20121219' of git://git.infradead.org/linux-mtd: (96 commits)
mtd: nand: typo in nand_id_has_period() comments
mtd: nand/gpio: use io{read,write}*_rep accessors
mtd: block2mtd: throttle writes by calling balance_dirty_pages_ratelimited.
mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems
mtd: nand/docg4: fix and improve read of factory bbt
mtd: nand/docg4: reserve bb marker area in ecclayout
mtd: nand/docg4: add support for writing in reliable mode
mtd: mxc_nand: reorder part_probes to let cmdline override other sources
mtd: mxc_nand: fix unbalanced clk_disable() in error path
mtd: nandsim: Introduce debugfs infrastructure
mtd: physmap_of: error checking to prevent a NULL pointer dereference
mtg: docg3: potential divide by zero in doc_write_oob()
mtd: bcm47xxnflash: writing support
mtd: tests/read: initialize buffer for whole next page
mtd: at91: atmel_nand: return bit flips for the PMECC read_page()
mtd: fix recovery after failed write-buffer operation in cfi_cmdset_0002.c
mtd: nand: onfi need to be probed in 8 bits mode
mtd: nand: add NAND_BUSWIDTH_AUTO to autodetect bus width
mtd: nand: print flash size during detection
mted: nand_wait_ready timeout fix
...
Pull ARM SoC updates for Marvell mvebu/kirkwood from Olof Johansson:
"This is a branch with updates for Marvell's mvebu/kirkwood platforms.
They came in late-ish, and were heavily interdependent such that it
didn't make sense to split them up across the cross-platform topic
branches. So here they are (for the second release in a row) in a
branch on their own."
* tag 'mvebu' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (88 commits)
arm: l2x0: add aurora related properties to OF binding
arm: mvebu: add Aurora L2 Cache Controller to the DT
arm: mvebu: add L2 cache support
dma: mv_xor: fix error handling path
dma: mv_xor: fix error checking of irq_of_parse_and_map()
dma: mv_xor: use request_irq() instead of devm_request_irq()
dma: mv_xor: clear the window override control registers
arm: mvebu: fix address decoding armada_cfg_base() function
ARM: mvebu: update defconfig with I2C and RTC support
ARM: mvebu: Add SATA support for OpenBlocks AX3-4
ARM: mvebu: Add support for the RTC in OpenBlocks AX3-4
ARM: mvebu: Add support for I2C on OpenBlocks AX3-4
ARM: mvebu: Add support for I2C controllers in Armada 370/XP
arm: mvebu: Add hardware I/O Coherency support
arm: plat-orion: Add coherency attribute when setup mbus target
arm: dma mapping: Export a dma ops function arm_dma_set_mask
arm: mvebu: Add SMP support for Armada XP
arm: mm: Add support for PJ4B cpu and init routines
arm: mvebu: Add IPI support via doorbells
arm: mvebu: Add initial support for power managmement service unit
...
Pull ARM SoC device-tree updates, take 2, from Olof Johansson:
"This branch contains device-tree updates for the SPEAr platform. They
had dependencies on earlier branches from this merge window, which is
why they were broken out in a separate branch."
* tag 'dt2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: SPEAr3xx: Shirq: Move shirq controller out of plat/
ARM: SPEAr320: DT: Add SPEAr 320 HMI board support
ARM: SPEAr3xx: DT: add shirq node for interrupt multiplexor
ARM: SPEAr3xx: shirq: simplify and move the shared irq multiplexor to DT
ARM: SPEAr1310: Fix AUXDATA for compact flash controller
ARM: SPEAr13xx: Remove fields not required for ssp controller
ARM: SPEAr1310: Move 1310 specific misc register into machine specific files
ARM: SPEAr: DT: Update device nodes
ARM: SPEAr: DT: add uart state to fix warning
ARM: SPEAr: DT: Modify DT bindings for STMMAC
ARM: SPEAr: DT: Fix existing DT support
ARM: SPEAr: DT: Update partition info for MTD devices
ARM: SPEAr: DT: Update pinctrl list
ARM: SPEAr13xx: DT: Add spics gpio controller nodes
Pull ARM Soc updates, take 2, from Olof Johansson:
"This is the second batch of SoC updates for the 3.8 merge window,
containing parts that had dependencies on earlier branches such that
we couldn't include them with the first branch.
These are general updates for Samsung Exynos, Renesas/shmobile and a
topic branch that adds SMP support to Altera's socfpga platform."
Fix up conflicts mostly as per Olof.
* tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: EXYNOS: Clock settings for SATA and SATA PHY
ARM: EXYNOS: Add ARM down clock support
ARM: EXYNOS: Fix i2c suspend/resume for legacy controller
ARM: EXYNOS: Add aliases for i2c controller
ARM: EXYNOS: Setup legacy i2c controller interrupts
sh: clkfwk: fixup unsed variable warning
Revert "ARM: shmobile: r8a7779: Replace modify_scu_cpu_psr with scu_power_mode"
Revert "ARM: shmobile: sh73a0: Replace modify_scu_cpu_psr with scu_power_mode"
Revert "ARM: shmobile: emev2: Replace modify_scu_cpu_psr with scu_power_mode"
ARM: highbank: use common debug_ll_io_init
ARM: shmobile: sh7372: sh7372_fsiXck_clk become non-global
ARM: shmobile: sh7372: remove fsidivx clock
ARM: socfpga: mark secondary_trampoline as cpuinit
socfpga: map uart into virtual address space so that early_printk() works
ARM: socfpga: fix build break for allyesconfig
ARM: socfpga: Enable SMP for socfpga
ARM: EXYNOS: Add dp clock support for EXYNOS5
ARM: SAMSUNG: call clk_get_rate for debugfs rate files
ARM: SAMSUNG: add clock_tree debugfs file in clock
Merging in the smp-on-socfpga branch into soc2 since the topics are similar
and it's a short branch in the first place.
* next/smp:
ARM: socfpga: mark secondary_trampoline as cpuinit
socfpga: map uart into virtual address space so that early_printk() works
ARM: socfpga: fix build break for allyesconfig
ARM: socfpga: Enable SMP for socfpga
Signed-off-by: Olof Johansson <olof@lixom.net>
Pull ARM SoC device tree conversions and enablement from Olof Johansson:
"Continued device tree conversion and enablement across a number of
platforms; Kirkwood, tegra, i.MX, Exynos, zynq and a couple of other
smaller series as well.
ux500 has seen continued conversion for platforms. Several platforms
have seen pinctrl-via-devicetree conversions for simpler
multiplatform. Tegra is adding data for new devices/drivers, and
Exynos has a bunch of new bindings and devices added as well.
So, pretty much the same progression in the right direction as the
last few releases."
Fix up conflicts as per Olof.
* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (185 commits)
ARM: ux500: Rename dbx500 cpufreq code to be more generic
ARM: dts: add missing ux500 device trees
ARM: ux500: Stop registering the PCM driver from platform code
ARM: ux500: Move board specific GPIO info out to subordinate DTS files
ARM: ux500: Disable the MMCI gpio-regulator by default
ARM: Kirkwood: remove kirkwood_ehci_init() from new boards
ARM: Kirkwood: Add support LED of OpenBlocks A6
ARM: Kirkwood: Convert to EHCI via DT for OpenBlocks A6
ARM: kirkwood: Add NAND partiton map for OpenBlocks A6
ARM: kirkwood: Add support second I2C bus and RTC on OpenBlocks A6
ARM: kirkwood: Add support DT of second I2C bus
ARM: kirkwood: Convert mplcec4 board to pinctrl
ARM: Kirkwood: Convert km_kirkwood to pinctrl
ARM: Kirkwood: support 98DX412x kirkwoods with pinctrl
ARM: Kirkwood: Convert IX2-200 to pinctrl.
ARM: Kirkwood: Convert lsxl boards to pinctrl.
ARM: Kirkwood: Convert ib62x0 to pinctrl.
ARM: Kirkwood: Convert GoFlex Net to pinctrl.
ARM: Kirkwood: Convert dreamplug to pinctrl.
ARM: Kirkwood: Convert dockstar to pinctrl.
...
Pull ARM SoC board updates from Olof Johansson:
"This branch contains a set of various board updates for ARM platforms.
A few shmobile platforms that are stale have been removed, some
defconfig updates for various boards selecting new features such as
pinctrl subsystem support, and various updates enabling peripherals,
etc."
Fix up conflicts mostly as per Olof.
* tag 'boards' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (58 commits)
ARM: S3C64XX: Add dummy supplies for Glenfarclas LDOs
ARM: S3C64XX: Add registration of WM2200 Bells device on Cragganmore
ARM: kirkwood: Add Plat'Home OpenBlocks A6 support
ARM: Dove: update defconfig
ARM: Kirkwood: update defconfig for new boards
arm: orion5x: add DT related options in defconfig
arm: orion5x: convert 'LaCie Ethernet Disk mini v2' to Device Tree
arm: orion5x: basic Device Tree support
arm: orion5x: mechanical defconfig update
ARM: kirkwood: Add support for the MPL CEC4
arm: kirkwood: add support for ZyXEL NSA310
ARM: Kirkwood: new board USI Topkick
ARM: kirkwood: use gpio-fan DT binding on lsxl
ARM: Kirkwood: add Netspace boards to defconfig
ARM: kirkwood: DT board setup for Network Space Mini v2
ARM: kirkwood: DT board setup for Network Space Lite v2
ARM: kirkwood: DT board setup for Network Space v2 and parents
leds: leds-ns2: add device tree binding
ARM: Kirkwood: Enable the second I2C bus
ARM: mmp: select pinctrl driver
...
Pull ARM SoC updates from Olof Johansson:
"This contains the bulk of new SoC development for this merge window.
Two new platforms have been added, the sunxi platforms (Allwinner A1x
SoCs) by Maxime Ripard, and a generic Broadcom platform for a new
series of ARMv7 platforms from them, where the hope is that we can
keep the platform code generic enough to have them all share one mach
directory. The new Broadcom platform is contributed by Christian
Daudt.
Highbank has grown support for Calxeda's next generation of hardware,
ECX-2000.
clps711x has seen a lot of cleanup from Alexander Shiyan, and he's
also taken on maintainership of the platform.
Beyond this there has been a bunch of work from a number of people on
converting more platforms to IRQ domains, pinctrl conversion, cleanup
and general feature enablement across most of the active platforms."
Fix up trivial conflicts as per Olof.
* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (174 commits)
mfd: vexpress-sysreg: Remove LEDs code
irqchip: irq-sunxi: Add terminating entry for sunxi_irq_dt_ids
clocksource: sunxi_timer: Add terminating entry for sunxi_timer_dt_ids
irq: versatile: delete dangling variable
ARM: sunxi: add missing include for mdelay()
ARM: EXYNOS: Avoid early use of of_machine_is_compatible()
ARM: dts: add node for PL330 MDMA1 controller for exynos4
ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412
ARM: EXYNOS: add UART3 to DEBUG_LL ports
ARM: S3C24XX: Add clkdev entry for camif-upll clock
ARM: SAMSUNG: Add s3c24xx/s3c64xx CAMIF GPIO setup helpers
ARM: sunxi: Add missing sun4i.dtsi file
pinctrl: samsung: Do not initialise statics to 0
ARM i.MX6: remove gate_mask from pllv3
ARM i.MX6: Fix ethernet PLL clocks
ARM i.MX6: rename PLLs according to datasheet
ARM i.MX6: Add pwm support
ARM i.MX51: Add pwm support
ARM i.MX53: Add pwm support
ARM: mx5: Replace clk_register_clkdev with clock DT lookup
...
Pull ARM SoC cleanups on various subarchitectures from Olof Johansson:
"Cleanup patches for various ARM platforms and some of their associated
drivers. There's also a branch in here that enables Freescale i.MX to
be part of the multiplatform support -- the first "big" SoC that is
moved over (more multiplatform work comes in a separate branch later
during the merge window)."
Conflicts fixed as per Olof, including a silent semantic one in
arch/arm/mach-omap2/board-generic.c (omap_prcm_restart() was renamed to
omap3xxx_restart(), and a new user of the old name was added).
* tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (189 commits)
ARM: omap: fix typo on timer cleanup
ARM: EXYNOS: Remove unused regs-mem.h file
ARM: EXYNOS: Remove unused non-dt support for dwmci controller
ARM: Kirkwood: Use hw_pci.ops instead of hw_pci.scan
ARM: OMAP3: cm-t3517: use GPTIMER for system clock
ARM: OMAP2+: timer: remove CONFIG_OMAP_32K_TIMER
ARM: SAMSUNG: use devm_ functions for ADC driver
ARM: EXYNOS: no duplicate mask/unmask in eint0_15
ARM: S3C24XX: SPI clock channel setup is fixed for S3C2443
ARM: EXYNOS: Remove i2c0 resource information and setting of device names
ARM: Kirkwood: checkpatch cleanups
ARM: Kirkwood: Fix sparse warnings.
ARM: Kirkwood: Remove unused includes
ARM: kirkwood: cleanup lsxl board includes
ARM: integrator: use BUG_ON where possible
ARM: integrator: push down SC dependencies
ARM: integrator: delete static UART1 mapping
ARM: integrator: delete SC mapping on the CP
ARM: integrator: remove static CP syscon mapping
ARM: integrator: remove static AP syscon mapping
...
Pull ARM updates from Russell King:
"Here's the updates for ARM for this merge window, which cover quite a
variety of areas.
There's a bunch of patch series from Will tackling various bugs like
the PROT_NONE handling, ASID allocation, cluster boot protocol and
ASID TLB tagging updates.
We move to a build-time sorted exception table rather than doing the
sorting at run-time, add support for the secure computing filter, and
some updates to the perf code. We also have sorted out the placement
of some headers, fixed some build warnings, fixed some hotplug
problems with the per-cpu TWD code."
* 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (73 commits)
ARM: 7594/1: Add .smp entry for REALVIEW_EB
ARM: 7599/1: head: Remove boot-time HYP mode check for v5 and below
ARM: 7598/1: net: bpf_jit_32: fix sp-relative load/stores offsets.
ARM: 7595/1: syscall: rework ordering in syscall_trace_exit
ARM: 7596/1: mmci: replace readsl/writesl with ioread32_rep/iowrite32_rep
ARM: 7597/1: net: bpf_jit_32: fix kzalloc gfp/size mismatch.
ARM: 7593/1: nommu: do not enable DCACHE_WORD_ACCESS when !CONFIG_MMU
ARM: 7592/1: nommu: prevent generation of kernel unaligned memory accesses
ARM: 7591/1: nommu: Enable the strict alignment (CR_A) bit only if ARCH < v6
ARM: 7590/1: /proc/interrupts: limit the display of IPIs to online CPUs only
ARM: 7587/1: implement optimized percpu variable access
ARM: 7589/1: integrator: pass the lm resource to amba
ARM: 7588/1: amba: create a resource parent registrator
ARM: 7582/2: rename kvm_seq to vmalloc_seq so to avoid confusion with KVM
ARM: 7585/1: kernel: fix nr_cpu_ids check in DT logical map init
ARM: 7584/1: perf: fix link error when CONFIG_HW_PERF_EVENTS is not selected
ARM: gic: use a private mapping for CPU target interfaces
ARM: kernel: add logical mappings look-up
ARM: kernel: add cpu logical map DT init in setup_arch
ARM: kernel: add device tree init map function
...
Pull device tree changes from Grant Likely:
"Here are the DT changes I've got queued up for v3.8. As described
below, there are a lot of bug fixes here and documentation updates but
nothing major:
Bug fixes, little cleanups, and documentation changes. The most
invasive thing here touches a bunch of the arch directories to use a
common build rule for .dtb files. There are no major changes to
functionality here other than a few new helper functions."
* tag 'devicetree-for-linus' of git://git.secretlab.ca/git/linux-2.6: (34 commits)
arm64: Fix the dtbs target building
mtd: nand: davinci: fix the binding documentation
rtc: rtc-mv: Add the device tree binding documentation
devicetree/bindings: Move gpio-leds binding into leds directory
of/vendor-prefixes: add Imagination Technologies
microblaze: use new common dtc rule
c6x: use new common dtc rule
openrisc: use new common dtc rule
arm64: Add dtbs target for building all the enabled dtb files
arm64: use new common dtc rule
ARM: dt: change .dtb build rules to build in dts directory
kbuild: centralize .dts->.dtb rule
Fix build when CONFIG_W1_MASTER_GPIO=m b exporting "allnodes"
of/spi: Honour "status=disabled" property of device
of_mdio: Honour "status=disabled" property of device
of_i2c: Honour "status=disabled" property of device
powerpc: Fix fallout from device_node->name constification
of: add 'const' for of_parse_phandle parameter *np
Documentation: correct of_platform_populate() argument list
script: dtc: clean generated files
...
Since the aemif driver conversion to DT along with
its movement to drivers/ folder is not yet done,
fix NAND binding documentation to have NAND specific
DT details only.
Signed-off-by: Kumar, Anil <anilkumar.v@ti.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Timer clean-up to get us closer to moving timer code to drivers,
and to get rid of CONFIG_OMAP_32K_TIMER and rely on the board
or devicetree provided timer configuration.
Note that these changes are on top of the recent timer fixes.
By Jon Hunter (32) and others
via Tony Lindgren
* tag 'omap-for-v3.8/cleanup-timer-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (71 commits)
ARM: OMAP3: cm-t3517: use GPTIMER for system clock
ARM: OMAP2+: timer: remove CONFIG_OMAP_32K_TIMER
ARM: OMAP2+: Fix compiler warning for 32k timer
ARM: OMAP: Remove unnecessary inclusion of dmtimer.h
ARM: OMAP: Add platform data header for DMTIMERs
ARM: OMAP: Remove unnecessary omap_dm_timer structure declaration
ARM: OMAP2+: Remove unnecessary local variable in timer code
ARM: OMAP: Don't store timers physical address
ARM: OMAP: Define omap_dm_timer_prepare function as static
ARM: OMAP: Clean-up dmtimer reset code
ARM: OMAP: Remove __omap_dm_timer_set_source function
ARM: OMAP: Remove unnecessary call to clk_get()
ARM: OMAP: Add dmtimer interrupt disable function
ARM: OMAP: Fix spurious interrupts when using timer match feature
ARM: OMAP: Don't restore DMTIMER interrupt status register
ARM: OMAP: Don't restore of DMTIMER TISTAT register
ARM: OMAP: Fix dmtimer reset for timer1
ARM: OMAP2+: Don't use __omap_dm_timer_reset()
ARM: OMAP2/3: Define HWMOD software reset status for DMTIMERs
ARM: OMAP3: Correct HWMOD DMTIMER SYSC register declarations
...
Change/change conflict in arch/arm/mach-omap2/board-cm-t3517.c.
Signed-off-by: Olof Johansson <olof@lixom.net>
From Linus Walleij <linus.walleij@linaro.org>:
This series will do the following:
- Switch the Integrator/AP and /CP to use the SoC bus
when booting from device tree.
- Group all devices on the SoC below this bus so as to
set a good example of how to do this. The bus was
invented by Lee Jones, let's show how it's to be used
on a DT:ed SoC.
- Fetch the special system controller offsets from two
special device tree nodes for each case and replace
the static mappings with these at boot.
- Move some static remaps to the ATAG-only code path
and delete some static maps that aren't used.
- Push dependencies on system controller remaps down
to the Integrator/AP board file and the PCIv3 driver
respectively and use only dynamic remappings.
- Fix up conditional BUG() usage in the PCIv3 driver
to be simpler and more to the point.
* tag 'integrator-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: integrator: use BUG_ON where possible
ARM: integrator: push down SC dependencies
ARM: integrator: delete static UART1 mapping
ARM: integrator: delete SC mapping on the CP
ARM: integrator: remove static CP syscon mapping
ARM: integrator: remove static AP syscon mapping
ARM: integrator: hook the CP into the SoC bus
ARM: integrator: hook the AP into the SoC bus
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
SPEAr3xx architecture includes shared/multiplexed irqs for certain set
of devices. The multiplexor provides a single interrupt to parent
interrupt controller (VIC) on behalf of a group of devices.
There can be multiple groups available on SPEAr3xx variants but not
exceeding 4. The number of devices in a group can differ, further they
may share same set of status/mask registers spanning across different
bit masks. Also in some cases the group may not have enable or other
registers. This makes software little complex.
Present implementation was non-DT and had few complex data structures to
decipher banks, number of irqs supported, mask and registers involved.
This patch simplifies the overall design and convert it in to DT. It
also removes all registration from individual SoC files and bring them
in to common shirq.c.
Also updated the corresponding documentation for DT binding of shirq.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
From Kukjin Kim:
Here is second Samsung DT stuff for v3.8.
This is including power domain DT support for exynos and Google ARM
Chromebook, Snow board and exynos4210-origen updates.
* 'next/dt-samsung-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: dts: Use drive strength 3 for SD pins for exynos4
ARM: dts: Set up power domains for exynos4
ARM: EXYNOS: Bind devices to power domains using DT
ARM: EXYNOS: Fix power domain name initialization
ARM: EXYNOS: Detect power domain state on registration from DT
ARM: dts: Add vmmc fixed voltage regulator for exynos4210-origen
ARM: dts: Update sdhci nodes for current bindings for exynos4210-origen
ARM: dts: Update for pinctrl-samsung driver for exynos4210-origen
ARM: dts: Split memory sections for exynos4210-origen
ARM: EXYNOS: add all i2c busses to auxdata for DT
ARM: dts: Add aliases for i2c controller for exynos4
ARM: dts: Add board dts file for Snow board (ARM Chromebook)
ARM: dts: Move the dwmmc aliases from smdk5250 dts to exynos
Add/add conflicts resolved in arch/arm/boot/dts/exynos5250-smdk5250.dts
and arch/arm/mach-exynos/mach-exynos5-dt.c.
Signed-off-by: Olof Johansson <olof@lixom.net>
Armada 370 and XP come with an unit called coherency fabric. This unit
allows to use the Armada 370/XP as a nearly coherent architecture. The
coherency mechanism uses snoop filters to ensure the coherency between
caches, DRAM and devices. This mechanism needs a synchronization
barrier which guarantees that all the memory writes initiated by the
devices have reached their target and do not reside in intermediate
write buffers. That's why the architecture is not totally coherent and
we need to provide our own functions for some DMA operations.
Beside the use of the coherency fabric, the device units will have to
set the attribute flag of the decoding address window to select the
accurate coherency process for the memory transaction. This is done
each device driver programs the DRAM address windows. The value of the
attribute set by the driver is retrieved through the
orion_addr_map_cfg struct filled during the early initialization of
the platform.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Yehuda Yitschak <yehuday@marvell.com>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
This patch enhances the IRQ controller driver to add support for
Inter-Processor-Interrupts that are needed to enable SMP support.
Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Armada 370 and Armada XP SOCs have a power management service unit
which is responsible for powering down and waking up CPUs and other
SOC units. This patch adds support for this unit.
Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The Armada 370 and Armada XP SOCs have a coherency fabric unit which
is responsible for ensuring hardware coherency between all CPUs and
between CPUs and I/O masters. This patch provides the basic support
needed for SMP.
Signed-off-by: Yehuda Yitschak <yehuday@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Reviewed-by: Will Deacon <will.deacon@arm.com>
This patch adds a way to specify bindings between devices and power
domains using device tree.
A device can be bound to particular power domain by adding a
power-domain property containing a phandle to the domain. The device
will be bound to the domain before binding a driver to it and unbound
after unbinding a driver from it.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Initial state of power domains might vary on different boards and with
different bootloaders.
This patch adds detection of initial state of power domains when being
registered from DT.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
From Pawel Moll:
* 'vexpress-clk-soc' of git://git.linaro.org/people/pawelmoll/linux:
ARM: vexpress: Remove motherboard dependencies in the DTS files
ARM: vexpress: Start using new Versatile Express infrastructure
ARM: vexpress: Add config bus components and clocks to DTs
mfd: Versatile Express system registers driver
mfd: Versatile Express config infrastructure
In order to start upstreaming Broadcom SoC support, create
a starting hierarchy, arch and dts files.
The first support SoC family that is planned is the
BCM281XX (BCM11130/11140/11351/28145/28155) family of dual A9 mobile
SoC cores.
This code is just the skeleton code for get the machine upstreamed. It
has been made MULTIPLATFORM compatible.
Next steps
----------
Upstream a basic set of drivers - sufficient for a console boot to
ramdisk. These will includer timer, gpio, i2c drivers.
After this basic set, we will proceed with a more comprehensive set
of drivers for the 281XX SoC family.
v2 patch mods
--------
- Remove l2x0_of_init call as there were problems with the code.
A separate patch will be submitted with cache init code
- Rename capri files and refs to bcm281xx-based names
- Add bcm281xx binding doc
- various misc cleanups
v3 patch mods
-------------
- Remove extra #include lines
- Remove remaining references to capri
- dt uart chipset string added
- cleaned up chip # references
v4 patch mods
-------------
- swap order of compatible definitions for uart
- fix typo
v5 patch mods
-------------
- Rename bcm281xx to bcm11351 in dts+code,
leaving references to bcm281xx only in help+comments.
v6 patch mods
-------------
- fix typo in uart 'compatible' string
Signed-off-by: Christian Daudt <csd@broadcom.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
From Sekhar Nori:
This change enables DT related options in DA8XX
defconfig.
* tag 'davinci-for-v3.8/defconfig' of git://gitorious.org/linux-davinci/linux-davinci:
ARM: davinci: da8xx defconfig: enable DT config options
Signed-off-by: Olof Johansson <olof@lixom.net>
From Sekhar Nori:
These changes add DT boot support to DaVinci DA850
SoC.
* tag 'davinci-for-v3.8/dt' of git://gitorious.org/linux-davinci/linux-davinci:
ARM: davinci: da850: generate dtbs for da850 boards
ARM: davinci: add support for am1808 based EnBW CMC board
ARM: davinci: da850 evm: add DT data
ARM: davinci: da850: add SoC DT data
ARM: davinci: da850: add DT boot support
ARM: davinci: da8xx: add DA850 PRUSS support
ARM: davinci: add platform hook to fetch the SRAM pool
ARM: davinci: da850: changed SRAM allocator to shared ram.
ARM: davinci: sram: switch from iotable to ioremapped regions
uio: uio_pruss: replace private SRAM API with genalloc
ARM: davinci: serial: provide API to initialze UART clocks
ARM: davinci: convert platform code to use clk_prepare/clk_unprepare
Signed-off-by: Olof Johansson <olof@lixom.net>
When booting through a device tree, the kernel cpu logical id map can be
initialized using device tree data passed by FW or through an embedded blob.
This patch adds a function that parses device tree "cpu" nodes and
retrieves the corresponding CPUs hardware identifiers (MPIDR).
It sets the possible cpus and the cpu logical map values according to
the number of CPUs defined in the device tree and respective properties.
The device tree HW identifiers are considered valid if all CPU nodes contain
a "reg" property, there are no duplicate "reg" entries and the DT defines a
CPU node whose "reg" property matches the MPIDR[23:0] of the boot CPU.
The primary CPU is assigned cpu logical number 0 to keep the current convention
valid.
Current bindings documentation is included in the patch:
Documentation/devicetree/bindings/arm/cpus.txt
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Based on AT91 PIT DT patch from Jean-Christophe PLAGNIOL-VILLARD.
Signed-off-by: Joachim Eastwood <manabian@gmail.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This hooks the Integrator/CP into the SoC bus when booting from
device tree, by mapping the CP controller registers first,
then registering the SoC device, and then populating the device
tree with the SoC device as parent.
Cc: Lee Jones <lee.jones@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
From Shawn Guo <shawn.guo@linaro.org>:
It's based on imx/multiplatform branch. Most of them are dts changes.
There are also a few imx6 improvement patches in there.
* tag 'imx-dt-3.8' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx6q: select ARM and PL310 errata
ARM: imx6q: print silicon version on boot
ARM i.MX dts: Consistently add labels to devicenodes
ARM: dts: imx6q-sabresd: add volume up/down gpio keys
ARM: dts: imx53: pinctl update
ARM: imx: enable cpufreq for imx6q
ARM: dts: imx6q: enable snvs lp rtc
ARM: dts: imx6q-sabreauto: Add basic support
ARM: imx6q: let users input debug uart port number
ARM: dts: imx53-qsb: Make DA9053 regulator functional
ARM: dts: imx53-qsb: Use pinctrl for gpio-led
ARM i.MX dtsi: Add default bus-width property for esdhc controller
Signed-off-by: Arnd Bregmann <arnd@arndb.de>
mx6qsabreauto is a board based on mx6q SoC with the following features:
- 2GB of DDR3
- 2 USB ports
- 1 HDMI output port
- SPI NOR
- 2 LVDS LCD ports
- Gigabit Ethernet
- Camera
- eMMC and SD card slot
- Multichannel Audio
- CAN
- SATA
- NAND
- PCIE
- Video Input
Add very basic support for it.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
The way the VE motherboard Device Trees were constructed
enforced naming and structure of daughterboard files. This
patch makes it possible to simply include the motherboard
description anywhere in the main Device Tree and retires
the "arm,v2m-timer" alias - any of the motherboard SP804
timers will be used instead.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
