This patch adds support to blsp2_i2c0, which is used on some of the
APQ8096 based boards.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds support to blsp2_i2c1, which is used in one of the
apq8096 based boards.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds blsp1_i2c2 support, as this bus is used on some of the
apq8096 boards.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds bslp2_uart2 node in soc so that boards that use this
uart can enable it.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds msmgpio label for pin and gpio controller so that
it can referenced in dedicated pins file and other board level gpios.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Update reserved-memory in accordance with memory the detailed memory map
for 8916, so that we will be able to reference the firmware memory
regions.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch enables bam dma node, dma is used for both tx and rx on spi
and on high speed serial.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The qcom-spmi-mpp driver is now using string "digital" to denote
old "normal" functionality. Update DTS file.
Also update the powersource.
Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org>
This patch updates the digital voltage levels from corner values to
microvolts as we are going to use s1 regulator directly for vddcx
instead of s1_corner.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
This patch enables the lpass on DB410C. LPASS is used as cpu dai for
both analog and digital audio.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
This patch adds manual pull up setting for usb otg indicating that the
vbus is vbus is not routed to USB controller/phy therefore enables
pull-up explicitly before starting controller.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Add the RPM Clock Controller DT node and include the necessary header
file for clocks.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The #size-cells for the pmics are 0, but we specify a size in the
reg property so that MPP and GPIO modules can figure out how many
pins there are. Now that we've done that by counting irqs, we can
remove the size elements in the reg properties and be DT
compliant.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add #power-domain-cells property for both the gcc and mmcc
clock controller nodes as they both supports power domains (gdsc's)
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
To be consistent with other nodes move sdhci node under the soc node,
rather than using lable references.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
96boards mezzanine boards on LS expansion require 1.8v as per 96boards
specifications, so enable the corresponding regulators and make them
always-on.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds label to smd rpm regulators so that the board level file
can use the label directly to populate the regulators, rather than
having deep nesting.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
s2 is spmi controller regulator on msm8916 according to downstream 3.10
kernel, so remove it from the dt to avoid confusion an use of it.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2mA drive strenght is not enough to drive chipselect low on hardware
configurations with level shifters, 16mA should give good range to
allow such configurations to work.
This issue was noticed while testing spi on db410c with sensor board.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch removes redundant pins from spi pinconf as these are already
specified in pinconf_cs.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch adds aliases to spi device so that it can get proper bus
number rather than a random number.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add the skeleton nodes for the PMICs found on msm8996-mtp
devices.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Add initial device tree support for the Qualcomm MSM8996 SoC and
MTP8996 evaluation board.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Qualcomm ARM64 Updates for v4.5
* Add fixed rate oscillators to dts
* Fixup PMIC alias and properties
* Change 8916-MTP compatible to be compliant with new scheme
* Fix 8x16 UART pinctrl configuration
* Add SMEM, RPM/SMD, and PM8916 support on MSM8916
* tag 'qcom-arm64-for-4.5' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
arm64: dts: Add PM8916 support on MSM8916
arm64: dts: qcom: Add RPM/SMD support on MSM8916
arm64: dts: qcom: Add MSM8916 SMEM nodes
arm64: dts: set the default i2c pin drive strength to 16mA
arm64: dts: fix the i2c aliasing to match to schematics.
arm64: dts: qcom: msm8916: Add fixed rate on-board oscillators
arm64: dts: qcom: Alias pm8916 on msm8916 devices
arm64: dts: qcom: Make msm8916-mtp compatible string compliant
arm64: dts: qcom: 8x16: UART1 and UART2 use DMA for RX and TX
arm64: dts: qcom: 8x16: UART1 add CTS_N, RTS_N pin configurations
Signed-off-by: Olof Johansson <olof@lixom.net>
Add label properties to provide a way to identify UART, I2C and SPI
ports based on their connector names. This follows naming convention in
96boards CE spec. Ports without external connections are not labelled.
Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: Andy Gross <agross@codeaurora.org>
Acked-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2mA drive strength is not enough when we connect multiple i2c devices
on the bus with different pull up resistors.
This issue was detected when multiple i2c devices connected on the other side
of level shifters on Linaro sensor board. Maxing up to 16mA made i2c much stable.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This patch fixes the i2c bus number aliasing so that it matches with the
schematics bus naming.
Without this patch the user might would get bus numbers depending on
the order the devices are probed.
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Currently the rates of the xo and sleep clocks are hard-coded in the
GCC driver, but this is a board layout description that actually should
be in the DT. Moving them into DT also allows us to insert the RPM
controlled clocks between the DT and GCC clocks.
Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
