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18 Commits

Author SHA1 Message Date
Olof Johansson
9cbcb077bf Merge tag 'renesas-arm64-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt64 
Second Round of Renesas ARM64 Based SoC DT Updates for v4.11

r8a779[56] SoCs:
* Mark EthernetAVB device node disabled in DT for r8a779[56] SoCs
  - They are enabled as appropriate in board DT files
* Link ARM GIC to clock and clock domain on r8a779[56] SoCs
* Add thermal support

r8a7795 SoC:
* Tidyup audma definition order on r8a7795 SoC
* Add missing power-domains property for SATA

r8a7795/h3ulcb board:
* Add MIX/CTU support as per support present in DT for r8a7796

* tag 'renesas-arm64-dt2-for-v4.11' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  arm64: dts: r8a7796: Mark EthernetAVB device node disabled
  arm64: dts: r8a7795: Mark EthernetAVB device node disabled
  arm64: dts: r8a7795: tidyup audma definition order
  arm64: dts: r8a7796: Link ARM GIC to clock and clock domain
  arm64: dts: r8a7795: Link ARM GIC to clock and clock domain
  arm64: dts: r8a7796: Add R-Car Gen3 thermal support
  arm64: dts: r8a7795: Add R-Car Gen3 thermal support
  arm64: dts: r8a7795: Add missing power-domains property for sata
  arm64: dts: h3ulcb: follow sound CTU/MIX supports

Signed-off-by: Olof Johansson <olof@lixom.net>
 2017-01-29 20:57:26 -08:00
Kuninori Morimoto
b1980ff0c3 arm64: dts: h3ulcb: follow sound CTU/MIX supports 
commit 5bcd74e8a30d9259 ("arm64: dts: r8a7795: add sound MIX support")
commit 5be5ee41d011f26b ("arm64: dts: r8a7795: add sound CTU support")
added MIX/CTU support, and it updated clocks on SoC level.
Thus, h3ulcb should be updated

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2017-01-10 08:59:15 +01:00
Simon Horman
8ebcb400af arm64: dts: h3ulcb: Provide sd0_uhs node 
Provide separaate sd0 and sd0_uhs nodes rather than duplicate sd0 nodes.

Cc: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Cc: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Fixes: 93373c309a ("arm64: dts: h3ulcb: rename SDHI0 pins")
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-12-08 14:29:17 +01:00
Vladimir Barinov
93373c309a arm64: dts: h3ulcb: rename SDHI0 pins 
This changes SDHI0 pin names for H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-11-21 10:18:52 +01:00
Vladimir Barinov
274dc8916d arm64: dts: h3ulcb: enable SDHI2 
This supports SDHI2 for H3ULCB onboard eMMC

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-11-21 10:18:51 +01:00
Vladimir Barinov
c77c975576 arm64: dts: h3ulcb: update header 
This updates H3ULCB device tree header with official board name

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-11-21 10:18:45 +01:00
Vladimir Barinov
e8c841f5ac arm64: dts: h3ulcb: enable GPIO leds 
This supports GPIO leds on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-09-08 09:35:25 +02:00
Vladimir Barinov
2627d5179f arm64: dts: h3ulcb: Sound SSI support 
This supports SSI sound for H3ULCB board.
SSI DMA mode used. CS2000 used as AUDIO_CLK_B.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-09-08 09:35:24 +02:00
Vladimir Barinov
5709436319 arm64: dts: h3ulcb: enable SDHI0 
This supports SDHI0 on H3ULCB board SD card slot

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-09-08 09:35:18 +02:00
Vladimir Barinov
0e3886a981 arm64: dts: h3ulcb: enable GPIO keys 
This supports GPIO keys on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-09-08 09:35:17 +02:00
Vladimir Barinov
15907f1f87 arm64: dts: h3ulcb: enable USB2.0 Host channel 1 
This supports USB2.0 Host channel 1 on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-09-08 09:35:06 +02:00
Vladimir Barinov
0baa64d8d2 arm64: dts: h3ulcb: enable USB2 PHY of channel 1 
This supports USB2 PHY channel #1 on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-09-06 12:57:28 +02:00
Vladimir Barinov
4bdb25d0f1 arm64: dts: h3ulcb: enable WDT 
This supports watchdog timer for H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-09-06 12:57:27 +02:00
Vladimir Barinov
b00d23f71f arm64: dts: h3ulcb: enable EXTALR clk 
This enables EXTALR clock that can be used for the watchdog.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-09-06 12:57:26 +02:00
Vladimir Barinov
eb3f0f199f arm64: dts: h3ulcb: enable I2C2 
This supports I2C2 bus on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-09-06 12:57:26 +02:00
Vladimir Barinov
144bf6ccb1 arm64: dts: h3ulcb: enable EthernetAVB 
This supports Ethernet AVB on H3ULCB board

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-09-06 12:57:25 +02:00
Vladimir Barinov
af111bce54 arm64: dts: h3ulcb: enable SCIF clk and pins 
This enables the external crystal for the SCIF_CLK and its pinctrl, to
be used by the Baud Rate Generator for External Clock (BRG) on (H)SCIF.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-09-06 12:57:24 +02:00
Vladimir Barinov
b10690d11f arm64: dts: h3ulcb: initial device tree 
Add the initial device tree for the R8A7795 SoC based H3ULCB low cost
board.

This commit supports the following peripherals:
- SCIF (console)

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
 2016-09-06 12:57:24 +02:00