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Author SHA1 Message Date
Rafael J. Wysocki
5ece239918 Merge back earlier cpufreq material. 
Conflicts:
	arch/mips/loongson/lemote-2f/clock.c
	drivers/cpufreq/intel_pstate.c
 2014-06-03 15:03:27 +02:00
Linus Torvalds
425553209b Merge tag 'pci-v3.16-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci into next 
Pull PCI changes from Bjorn Helgaas:
 "Enumeration
    - Notify driver before and after device reset (Keith Busch)
    - Use reset notification in NVMe (Keith Busch)

  NUMA
    - Warn if we have to guess host bridge node information (Myron Stowe)
    - Work around AMD Fam15h BIOSes that fail to provide _PXM (Suravee
      Suthikulpanit)
    - Clean up and mark early_root_info_init() as deprecated (Suravee
      Suthikulpanit)

  Driver binding
    - Add "driver_override" for force specific binding (Alex Williamson)
    - Fail "new_id" addition for devices we already know about (Bandan
      Das)

  Resource management
    - Support BAR sizes up to 8GB (Nikhil Rao, Alan Cox)
    - Don't move IORESOURCE_PCI_FIXED resources (Bjorn Helgaas)
    - Mark SBx00 HPET BAR as IORESOURCE_PCI_FIXED (Bjorn Helgaas)
    - Fail safely if we can't handle BARs larger than 4GB (Bjorn Helgaas)
    - Reject BAR above 4GB if dma_addr_t is too small (Bjorn Helgaas)
    - Don't convert BAR address to resource if dma_addr_t is too small
      (Bjorn Helgaas)
    - Don't set BAR to zero if dma_addr_t is too small (Bjorn Helgaas)
    - Don't print anything while decoding is disabled (Bjorn Helgaas)
    - Don't add disabled subtractive decode bus resources (Bjorn Helgaas)
    - Add resource allocation comments (Bjorn Helgaas)
    - Restrict 64-bit prefetchable bridge windows to 64-bit resources
      (Yinghai Lu)
    - Assign i82875p_edac PCI resources before adding device (Yinghai Lu)

  PCI device hotplug
    - Remove unnecessary "dev->bus" test (Bjorn Helgaas)
    - Use PCI_EXP_SLTCAP_PSN define (Bjorn Helgaas)
    - Fix rphahp endianess issues (Laurent Dufour)
    - Acknowledge spurious "cmd completed" event (Rajat Jain)
    - Allow hotplug service drivers to operate in polling mode (Rajat Jain)
    - Fix cpqphp possible NULL dereference (Rickard Strandqvist)

  MSI
    - Replace pci_enable_msi_block() by pci_enable_msi_exact()
      (Alexander Gordeev)
    - Replace pci_enable_msix() by pci_enable_msix_exact() (Alexander Gordeev)
    - Simplify populate_msi_sysfs() (Jan Beulich)

  Virtualization
    - Add Intel Patsburg (X79) root port ACS quirk (Alex Williamson)
    - Mark RTL8110SC INTx masking as broken (Alex Williamson)

  Generic host bridge driver
    - Add generic PCI host controller driver (Will Deacon)

  Freescale i.MX6
    - Use new clock names (Lucas Stach)
    - Drop old IRQ mapping (Lucas Stach)
    - Remove optional (and unused) IRQs (Lucas Stach)
    - Add support for MSI (Lucas Stach)
    - Fix imx6_add_pcie_port() section mismatch warning (Sachin Kamat)

  Renesas R-Car
    - Add gen2 device tree support (Ben Dooks)
    - Use new OF interrupt mapping when possible (Lucas Stach)
    - Add PCIe driver (Phil Edworthy)
    - Add PCIe MSI support (Phil Edworthy)
    - Add PCIe device tree bindings (Phil Edworthy)

  Samsung Exynos
    - Remove unnecessary OOM messages (Jingoo Han)
    - Fix add_pcie_port() section mismatch warning (Sachin Kamat)

  Synopsys DesignWare
    - Make MSI ISR shared IRQ aware (Lucas Stach)

  Miscellaneous
    - Check for broken config space aliasing (Alex Williamson)
    - Update email address (Ben Hutchings)
    - Fix Broadcom CNB20LE unintended sign extension (Bjorn Helgaas)
    - Fix incorrect vgaarb conditional in WARN_ON() (Bjorn Helgaas)
    - Remove unnecessary __ref annotations (Bjorn Helgaas)
    - Add arch/x86/kernel/quirks.c to MAINTAINERS PCI file patterns
      (Bjorn Helgaas)
    - Fix use of uninitialized MPS value (Bjorn Helgaas)
    - Tidy x86/gart messages (Bjorn Helgaas)
    - Fix return value from pci_user_{read,write}_config_*() (Gavin Shan)
    - Turn pcibios_penalize_isa_irq() into a weak function (Hanjun Guo)
    - Remove unused serial device IDs (Jean Delvare)
    - Use designated initialization in PCI_VDEVICE (Mark Rustad)
    - Fix powerpc NULL dereference in pci_root_buses traversal (Mike Qiu)
    - Configure MPS on ARM (Murali Karicheri)
    - Remove unnecessary includes of <linux/init.h> (Paul Gortmaker)
    - Move Open Firmware devspec attribute to PCI common code (Sebastian Ott)
    - Use pdev->dev.groups for attribute creation on s390 (Sebastian Ott)
    - Remove pcibios_add_platform_entries() (Sebastian Ott)
    - Add new ID for Intel GPU "spurious interrupt" quirk (Thomas Jarosch)
    - Rename pci_is_bridge() to pci_has_subordinate() (Yijing Wang)
    - Add and use new pci_is_bridge() interface (Yijing Wang)
    - Make pci_bus_add_device() void (Yijing Wang)

  DMA API
    - Clarify physical/bus address distinction in docs (Bjorn Helgaas)
    - Fix typos in docs (Emilio López)
    - Update dma_pool_create ()and dma_pool_alloc() descriptions (Gioh Kim)
    - Change dma_declare_coherent_memory() CPU address to phys_addr_t
      (Bjorn Helgaas)
    - Pass GAPSPCI_DMA_BASE CPU & bus address to dma_declare_coherent_memory()
      (Bjorn Helgaas)"

* tag 'pci-v3.16-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (92 commits)
  MAINTAINERS: Add generic PCI host controller driver
  PCI: generic: Add generic PCI host controller driver
  PCI: imx6: Add support for MSI
  PCI: designware: Make MSI ISR shared IRQ aware
  PCI: imx6: Remove optional (and unused) IRQs
  PCI: imx6: Drop old IRQ mapping
  PCI: imx6: Use new clock names
  i82875p_edac: Assign PCI resources before adding device
  ARM/PCI: Call pcie_bus_configure_settings() to set MPS
  PCI: imx6: Fix imx6_add_pcie_port() section mismatch warning
  PCI: Make pci_bus_add_device() void
  PCI: exynos: Fix add_pcie_port() section mismatch warning
  PCI: Introduce new device binding path using pci_dev.driver_override
  PCI: rcar: Add gen2 device tree support
  PCI: cpqphp: Fix possible null pointer dereference
  PCI: rcar: Add R-Car PCIe device tree bindings
  PCI: rcar: Add MSI support for PCIe
  PCI: rcar: Add Renesas R-Car PCIe driver
  PCI: Fix return value from pci_user_{read,write}_config_*()
  PCI: exynos: Remove unnecessary OOM messages
  ...
 2014-06-02 12:15:19 -07:00
Geert Uytterhoeven
5e888e8fb5 mips: Update the email address of Geert Uytterhoeven 
All my Sony addresses are defunct.

Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6817/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-06-02 16:34:41 +02:00
Andreas Herrmann
a1eace4ba5 MIPS: Add minimal defconfig for mips_paravirt 
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7008/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-06-02 13:40:03 +02:00
David Daney
9bc463be7d MIPS: Enable build for new system 'paravirt' 
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7015/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-06-02 12:34:20 +02:00
David Daney
ae6e7e635c MIPS: paravirt: Add pci controller for virtio 
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7011/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-06-02 12:34:20 +02:00
David Daney
18280edafe MIPS: Add code for new system 'paravirt' 
For para-virtualized guests running under KVM or other equivalent
hypervisor.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7004/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-06-02 12:34:20 +02:00
Linus Torvalds
568180a517 Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus 
Pull MIPS fixes from Ralf Baechle:
 "A fair number of fixes across the field.  Nothing terribly
  complicated; the one liners in below changelog should be fairly
  descriptive.

  Noteworthy is the SB1 change which the result of changes to binutils
  resulting in one big gas warning for most files being assembled as
  well as the asid_cache and branch emulation fixes which fix corruption
  or possible uninteded behaviour of kernel or application code.  The
  remainder of fixes are more platforms or subsystem specific"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  MIPS: R46000: Fix Micro-assembler field overflow for R4600 V2
  MIPS: ptrace: Avoid smp_processor_id() in preemptible code
  MIPS: Lemote 2F: cs5536: mfgpt: use raw locks
  MIPS: SB1: Fix excessive kernel warnings.
  MIPS: RC32434: fix broken PCI resource initialization
  MIPS: malta: memory.c: Initialize the 'memsize' variable
  MIPS: Fix typo when reporting cache and ftlb errors for ImgTec cores
  MIPS: Fix inconsistancy of __NR_Linux_syscalls value
  MIPS: Fix branch emulation of branch likely instructions.
  MIPS: Fix a typo error in AUDIT_ARCH definition
  MIPS: Change type of asid_cache to unsigned long
 2014-06-01 18:28:58 -07:00
David Daney
90dfdc7ceb MIPS: Add functions for hypervisor call 
Introduce kvm_hypercall[0-3].
Define three new hypercalls for MIPS: GET_CLOCK_FREQ, EXIT_VM, and
CONSOLE_OUTPUT.

[andreas.herrmann:
  * Properly define hypercalls and HC numbers for MIPS
    in kvm_para.h header files]

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7005/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 21:01:11 +02:00
Andreas Herrmann
cd3f538948 MIPS: OCTEON: Add OCTEON3 to __get_cpu_type 
Otherwise __builtin_unreachable might be called.

Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7014/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 21:01:11 +02:00
David Daney
45b585c8dc MIPS: Add function get_ebase_cpunum 
This returns the CPUNum from the low order Ebase bits.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7012/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 21:01:11 +02:00
David Daney
18a8cd63c0 MIPS: Add minimal support for OCTEON3 to c-r4k.c 
These are needed to boot a generic mips64r2 kernel on OCTEONIII.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7003/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 21:01:10 +02:00
David Daney
35d0470668 MIPS: Don't build fast TLB refill handler with 32-bit kernels 
The fast handler only supports 64-bit kernels.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7010/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 21:01:10 +02:00
David Daney
a68d09a156 MIPS: Don't use RI/XI with 32-bit kernels on 64-bit CPUs 
The TLB handlers cannot handle this case, so disable it for now.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7007/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 21:01:10 +02:00
David Daney
8a837cdb0a MIPS: OCTEON: Move CAVIUM_OCTEON_CVMSEG_SIZE to CPU_CAVIUM_OCTEON 
CVMSEG is related to the CPU core not the SoC system.  So needs to be
configurable there.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7013/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 21:01:10 +02:00
David Daney
6e5111636d MIPS: Move system level config items from CPU_CAVIUM_OCTEON to CAVIUM_OCTEON_SOC 
They are a property of the SoC not the CPU itself.

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7009/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 21:01:10 +02:00
David Daney
a36d8225bc MIPS: OCTEON: Enable use of FPU 
Some versions of the assembler will not assemble CFC1 for OCTEON, so
override the ISA for these.

Add r4k_fpu.o to handle low level FPU initialization.

Modify octeon_switch.S to save the FPU registers.  And include
r4k_switch.S to pick up more FPU support.

Get rid of "#define cpu_has_fpu		0"

Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7006/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 21:01:09 +02:00
Paul Burton
dadaa1c2c0 MIPS: Malta: support powering down 
This patch powers down the Malta in response to a power off command (eg.
poweroff or shutdown -P). It may then be powered back up by pressing the
"ON/NMI" button (S4) on the board. In cases where the power off state
cannot be entered (eg. because the required PCI support is disabled) the
current reset behaviour will be used as a fallback.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Tested-by: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6907/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 21:01:09 +02:00
Paul Burton
37e5c835bb MIPS: Malta: hang on halt 
When the system is halted it makes little sense to reset it. Instead,
hang by executing an infinite loop.

[ralf@linux-mips.org: Remove printk from mips_machine_halt() - this is not
the place to communicate with the user.]

Suggested-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6906/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 21:01:09 +02:00
Paul Burton
9e53481eea MIPS: Malta: Let PIIX4 respond to PCI special cycles 
This patch enables the PIIX4 to respond to special cycles on the PCI
bus. One such special cycle must be used in order to enter a suspend
state, and if response to it is not enabled then the suspend state will
never be entered.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6904/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 21:01:09 +02:00
Paul Burton
b6911bba59 MIPS: Malta: add suspend state entry code 
This patch introduces code which will enter a suspend state via the
PIIX4. This can only be done when PCI support is enabled since it
requires access to PCI I/O space and the generation of a special cycle
on the PCI bus. In cases where PCI is disabled the mips_pm_suspend
function will simply always return an error.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6905/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 21:01:09 +02:00
Paul Burton
643c5705bc MIPS: Define some more PIIX4 registers & values 
This patch simply adds definitions for some I/O registers in the PIIX4
PM device, and the magic data for a special cycle which must occur on
the PCI bus in order for the PIIX4 to enter a suspend state.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6903/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 21:01:08 +02:00
Maciej W. Rozycki
76ad023b89 MIPS: DEC: Remove the Halt button interrupt on R4k systems 
On R4k DECstations the Halt button is wired to the NMI processor input
rather than an ordinary interrupt input such as on R3k DECstations.  This
is possible with a different design of the CPU daughtercard that routes
the Halt button line from the baseboard connector.  Additionally the
interrupt input has been reused for a different purpose on the KN04 and
KN05 R4k CPU daughtercards so it is better kept masked.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6705/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 21:01:08 +02:00
Maciej W. Rozycki
81d10bad0a MIPS: DEC: Only select the R4k clock event/source on R4k systems 
R3k systems have no R4k timer so there's no point in pulling code that's
going to be dead.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6704/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 21:01:08 +02:00
Maciej W. Rozycki
e496453d3e MIPS: __delay ABI-dependent subtraction simplification 
This small update to the previous fix to __delay removes a conditional
around the ABI-dependent subtraction operation within an inline asm in
favor to the standard <asm/asm.h> LONG_SUBU macro.  No change in code
produced.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6703/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 21:01:08 +02:00
Maciej W. Rozycki
06947aaaf9 MIPS: Implement random_get_entropy with CP0 Random 
Update to commit 9c9b415c50 [MIPS:
Reimplement get_cycles().]

On systems were for whatever reasons we can't use the cycle counter, fall
back to the c0_random register as an entropy source.  It has however a
very small range that makes it suitable for random_get_entropy only and
not get_cycles.

This optimised version compiles to 8 instructions in the fast path even in
the worst case of all the conditions to check being variable (including a
MFC0 move delay slot that is only required for very old processors):

     828:	8cf90000 	lw	t9,0(a3)
			828: R_MIPS_LO16	jiffies
     82c:	40057800 	mfc0	a1,c0_prid
     830:	3c0200ff 	lui	v0,0xff
     834:	00a21024 	and	v0,a1,v0
     838:	1040007d 	beqz	v0,a30 <add_interrupt_randomness+0x22c>
     83c:	3c030000 	lui	v1,0x0
			83c: R_MIPS_HI16	cpu_data
     840:	40024800 	mfc0	v0,c0_count
     844:	00000000 	nop
     848:	00409021 	move	s2,v0
     84c:	8ce20000 	lw	v0,0(a3)
			84c: R_MIPS_LO16	jiffies

On most targets the sequence will be shorter and on some it will reduce to
a single `MFC0 <reg>,c0_count', as all MIPS architecture (i.e. non-legacy
MIPS) processors require the CP0 Count register to be present.

The only known exception that reports MIPS architecture compliance, but
contrary to that lacks CP0 Count is the Ingenic JZ4740 thingy.  For broken
platforms like that this code requires cpu_has_counter to be hardcoded to
0 (i.e. no variable setting is permitted) so as not to penalise all the
other good platforms out there.

The asm barrier is required so that the compiler does not pull any
potentially costly (cold cache!) `cpu_data' variable access into the fast
path.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: Theodore Ts'o <tytso@mit.edu>
Cc: John Crispin <blogic@openwrt.org>
Cc: Andrew McGregor <andrewmcgr@gmail.com>
Cc: Dave Taht <dave.taht@bufferbloat.net>
Cc: Felix Fietkau <nbd@nbd.name>
Cc: Simon Kelley <simon@thekelleys.org.uk>
Cc: Jim Gettys <jg@freedesktop.org>
Cc: David Daney <ddaney@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6702/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 18:21:30 +02:00
Ganesan Ramalingam
fedfcb1137 MIPS: Netlogic: XLP9XX on-chip SATA support 
The XLP9XX SoC has an on-chip SATA controller with two ports. Add
ahci-init-xlp2.c to initialize the controller, setup the glue logic
registers, fixup PCI quirks and setup interrupt ack logic.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6913/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 16:51:47 +02:00
Ganesan Ramalingam
a951440971 MIPS: Netlogic: Support for XLP3XX on-chip SATA 
XLP3XX includes an on-chip SATA controller with 4 ports. The
controller needs glue logic initialization and PCI fixup before
it can be used with the standard AHCI driver.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6872/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 16:51:25 +02:00
Ganesan Ramalingam
d66f3f0e10 MIPS: Add MSI support for XLP9XX 
In XLP9XX, the interrupt routing table for MSI-X has been moved to the
PCIe controller's config space from PIC. There are also 32 MSI-X
interrupts available per link on XLP9XX.

Update XLP MSI/MSI-X code to handle this.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: g@linux-mips.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6912/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 16:51:02 +02:00
Yonghong Song
1c98398662 MIPS: Netlogic: Add support for XLP5XX 
Add support for the XLP5XX processor which is an 8 core variant of the
XLP9XX. Add XLP5XX cases to code which earlier handled XLP9XX.

Signed-off-by: Yonghong Song <ysong@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6871/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 16:50:38 +02:00
Jayachandran C
edf3ed5e69 MIPS: Netlogic: Update XLP9XX/2XX core freq calculation 
Calculate XLP 9XX and 2XX core frequency from the per-core PLL. This
should give the correct value for all board configurations.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6870/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 16:50:13 +02:00
Ganesan Ramalingam
c065909e47 MIPS: Netlogic: PIC freq calculation for XLP 9XX/2XX 
Update PIC frequency calculation for XLP9XX and 2XX processors using
the correct PLL registers. This should work for all possible board
configurations.

Signed-off-by: Ganesan Ramalingam <ganesanr@broadcom.com>
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6876/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 16:49:41 +02:00
Jayachandran C
77bef0e4b5 MIPS: Netlogic: Fix XLP9XX pic entry 
Add the compatible property to the PIC entry. Also fix up the nodename
to use the correct address.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6869/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 16:49:21 +02:00
Jayachandran C
5874743ea8 MIPS: Netlogic: Use PRID_IMP_MASK macro 
Use PRID_IMP_MASK macro instead of 0xff00 to extract the processor
type.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6868/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 16:49:02 +02:00
Jayachandran C
0d57eba02d MIPS: Netlogic: IRQ mapping for some more SoC blocks 
Add IRQ to IRT (PIC interupt table index) mapping for SATA, GPIO, NAND
and SPI interfaces on the XLP SoC. Fix offsets for few blocks and add
device IDs for a few blocks.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6911/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 16:48:42 +02:00
Jayachandran C
e9126418dd MIPS: Netlogic: Enable access to more than 64GB 
The ELPA bit needs to be set in the PAGEGRAIN register to enable
access to >64GB physical address. Update reset.S to do this from
every hardware thread.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6866/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 16:48:25 +02:00
Jayachandran C
a3deecfaa3 MIPS: Netlogic: Reduce size of reset code 
Update thread wakeup function to use scratch registers for saving SP and
RA. Move the register restore code needed for thread 0 to the calling
function. This reduces the size of code copied to the reset vector.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6910/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 16:47:56 +02:00
Jayachandran C
2e240ddd09 MIPS: Netlogic: Use cpumask_scnprintf for wakeup_mask 
Use standard function to print cpumask. Also fixup a typo in the same
file.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: g@linux-mips.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6909/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 16:47:36 +02:00
Jayachandran C
9de10ffb54 MIPS: Netlogic: Warn on invalid irq 
Warn and return if invalid IRQ is passed to nlm_set_pic_extra_ack.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6862/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 16:46:07 +02:00
Jayachandran C
3e468567c2 MIPS: Netlogic: Move coremask setup to nlm_node_init 
This is needed for nlm_node_present(0) to work on uniprocessor compile.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6861/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 16:45:19 +02:00
Jayachandran C
f9fab7e4ed MIPS: Netlogic: Fix uniprocessor compilation 
The macros in topology.h need CONFIG_SMP, and the uniprocessor compilation
fails due to this. Wrap the macros in an ifdef so that uniprocessor works.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6863/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 16:44:55 +02:00
Jayachandran C
a91796a919 MIPS: Support upto 256 CPUs 
This is needed for two node XLP9xx configurations.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6860/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 16:44:36 +02:00
Markos Chandras
3f5fdb4bd1 MIPS: Enable the BPF_JIT symbol for MIPS 
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6743/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 16:10:20 +02:00
Markos Chandras
c6610de353 MIPS: net: Add BPF JIT 
This adds initial support for BPF-JIT on MIPS

Tested on mips32 LE/BE and mips64 BE/n64 using
dhcp, ping and various tcpdump filters.

Benchmarking:

Assuming the remote MIPS target uses 192.168.154.181
as its IP address, and the local host uses 192.168.154.136,
the following results can be obtained using the following
tcpdump filter (catches no frames) and a simple
'time ping -f -c 1000000' command.

[root@(none) ~]# tcpdump -p -n -s 0 -i eth0 net 10.0.0.0/24 -d
(000) ldh      [12]
(001) jeq      #0x800           jt 2	jf 8
(002) ld       [26]
(003) and      #0xffffff00
(004) jeq      #0xa000000       jt 16	jf 5
(005) ld       [30]
(006) and      #0xffffff00
(007) jeq      #0xa000000       jt 16	jf 17
(008) jeq      #0x806           jt 10	jf 9
(009) jeq      #0x8035          jt 10	jf 17
(010) ld       [28]
(011) and      #0xffffff00
(012) jeq      #0xa000000       jt 16	jf 13
(013) ld       [38]
(014) and      #0xffffff00
(015) jeq      #0xa000000       jt 16	jf 17
(016) ret      #65535

- BPF-JIT Disabled

real    1m38.005s
user    0m1.510s
sys     0m6.710s

- BPF-JIT Enabled

real    1m35.215s
user    0m1.200s
sys     0m4.140s

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
 2014-05-30 16:10:20 +02:00
Markos Chandras
8248881835 MIPS: uasm: Add lb uasm instruction 
It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
 2014-05-30 16:10:19 +02:00
Markos Chandras
16d21a812f MIPS: uasm: Add mflo uasm instruction 
It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
 2014-05-30 15:57:44 +02:00
Markos Chandras
a8e897ad00 MIPS: uasm: Add mul uasm instruction 
It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6736/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 15:54:39 +02:00
Markos Chandras
d6b3314b49 MIPS: uasm: Add lh uam instruction 
It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6733/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 15:54:38 +02:00
Markos Chandras
ab9e4fa092 MIPS: uasm: Add wsbh uasm instruction 
It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6732/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 15:54:38 +02:00
Markos Chandras
e8ef868b47 MIPS: uasm: Add sltu uasm instruction 
It will be used later on by bpf-jit

[ralf@linux-mips.org: Resolved conflict.]

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/6731/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2014-05-30 15:54:38 +02:00