Jiancheng Xue
224b3b262c
clk: hisilicon: hi3519: add driver remove path and fix some issues
...
1. Add driver remove path.
2. Fix some issues.
-Fix the ordering issue about clock provider being published.
-Add error checking upon registering clocks.
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com >
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org >
2016-06-30 12:35:20 -07:00
Jiancheng Xue
97b7129cd2
reset: hisilicon: change the definition of hisi_reset_init
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Change the input arguments type to struct platform_device pointer.
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com >
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org >
2016-06-30 12:33:22 -07:00
Jiancheng Xue
6c9da387c8
clk: hisilicon: add CRG driver for hi3519 soc
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The CRG(Clock and Reset Generator) block provides clock
and reset signals for other modules in hi3519 soc.
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com >
Acked-by: Rob Herring <robh@kernel.org >
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org >
2016-05-06 11:13:32 -07:00
